llvm.org GIT mirror llvm / 1f6a329
Silence a bunch (but not all) "variable written but not read" warnings when building with assertions disabled. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137460 91177308-0d34-0410-b5e6-96231b3b80d8 Duncan Sands 9 years ago
20 changed file(s) with 36 addition(s) and 19 deletion(s). Raw diff Collapse all Expand all
230230 }
231231
232232 assert(Removed && "Register is not used by this instruction!");
233 (void)Removed;
233234 return true;
234235 }
235236
264265 }
265266 }
266267 assert(Removed && "Register is not defined by this instruction!");
268 (void)Removed;
267269 return true;
268270 }
269271
349349 dbgs() << "CGSCCPASSMGR: SCC Refresh didn't change call graph.\n";
350350 }
351351 );
352 (void)MadeChange;
352353
353354 return DevirtualizedCall;
354355 }
611611 }
612612
613613 // Remove the loop from the top-level LoopInfo object.
614 for (LoopInfo::iterator I = LI.begin(), E = LI.end();; ++I) {
615 assert(I != E && "Couldn't find loop");
614 for (LoopInfo::iterator I = LI.begin();; ++I) {
615 assert(I != LI.end() && "Couldn't find loop");
616616 if (*I == Unloop) {
617617 LI.removeLoop(I);
618618 break;
639639
640640 // Remove unloop from its parent loop.
641641 Loop *ParentLoop = Unloop->getParentLoop();
642 for (Loop::iterator I = ParentLoop->begin(), E = ParentLoop->end();; ++I) {
643 assert(I != E && "Couldn't find loop");
642 for (Loop::iterator I = ParentLoop->begin();; ++I) {
643 assert(I != ParentLoop->end() && "Couldn't find loop");
644644 if (*I == Unloop) {
645645 ParentLoop->removeChildLoop(I);
646646 break;
661661 if (TargetRegisterInfo::isVirtualRegister(Reg)) {
662662 bool removed = getVarInfo(Reg).removeKill(MI);
663663 assert(removed && "kill not in register's VarInfo?");
664 removed = true;
664 (void)removed;
665665 }
666666 }
667667 }
205205 break;
206206 }
207207 assert(SubUsed && "Using an undefined register!");
208 (void)SubUsed;
208209 }
209210 assert((!EarlyClobberRegs.test(Reg) || MI->isRegTiedToDefOperand(i)) &&
210211 "Using an early clobbered register!");
139139 break;
140140 }
141141 assert(FoundSucc && "Mismatching preds / succs lists!");
142 (void)FoundSucc;
142143 Preds.erase(I);
143144 // Update the bookkeeping.
144145 if (P.getKind() == SDep::Data) {
12901290 GetExpandedFloat(NewLHS, LHSLo, LHSHi);
12911291 GetExpandedFloat(NewRHS, RHSLo, RHSHi);
12921292
1293 EVT VT = NewLHS.getValueType();
1294 assert(VT == MVT::ppcf128 && "Unsupported setcc type!");
1293 assert(NewLHS.getValueType() == MVT::ppcf128 && "Unsupported setcc type!");
12951294
12961295 // FIXME: This generated code sucks. We want to generate
12971296 // FCMPU crN, hi1, hi2
14441443 ST->getValue().getValueType());
14451444 assert(NVT.isByteSized() && "Expanded type not byte sized!");
14461445 assert(ST->getMemoryVT().bitsLE(NVT) && "Float type not round?");
1446 (void)NVT;
14471447
14481448 SDValue Lo, Hi;
14491449 GetExpandedOp(ST->getValue(), Lo, Hi);
19681968 assert(InOp1.getValueType() == WidenInVT &&
19691969 InOp2.getValueType() == WidenInVT &&
19701970 "Input not widened to expected type!");
1971 (void)WidenInVT;
19711972 return DAG.getNode(ISD::VSETCC, N->getDebugLoc(),
19721973 WidenVT, InOp1, InOp2, N->getOperand(2));
19731974 }
462462 GroupName = "Instruction Selection and Scheduling";
463463 std::string BlockName;
464464 int BlockNumber = -1;
465 (void)BlockNumber;
465466 #ifdef NDEBUG
466467 if (ViewDAGCombine1 || ViewLegalizeTypesDAGs || ViewLegalizeDAGs ||
467468 ViewDAGCombine2 || ViewDAGCombineLT || ViewISelDAGs || ViewSchedDAGs ||
667667 DEBUG(dbgs() << "JIT: Lazily resolving function '" << F->getName()
668668 << "' In stub ptr = " << Stub << " actual ptr = "
669669 << ActualPtr << "\n");
670 (void)ActualPtr;
670671
671672 Result = JR->TheJIT->getPointerToFunction(F);
672673 }
831831
832832 /* Our callers should never cause us to overflow. */
833833 assert(carry == 0);
834 (void)carry;
834835 }
835836
836837 /* Add the significand of the RHS. Returns the carry flag. */
925926 APFloat extendedAddend(*addend);
926927 status = extendedAddend.convert(extendedSemantics, rmTowardZero, &ignored);
927928 assert(status == opOK);
929 (void)status;
928930 lost_fraction = addOrSubtractSignificand(extendedAddend, false);
929931
930932 /* Restore our state. */
13881390 /* The code above is intended to ensure that no borrow is
13891391 necessary. */
13901392 assert(!carry);
1393 (void)carry;
13911394 } else {
13921395 if (bits > 0) {
13931396 APFloat temp_rhs(rhs);
14011404
14021405 /* We have a guard bit; generating a carry cannot happen. */
14031406 assert(!carry);
1407 (void)carry;
14041408 }
14051409
14061410 return lost_fraction;
11291129 Done = rewriteT2FrameIndex(MI, i, BaseReg, Off, TII);
11301130 }
11311131 assert (Done && "Unable to resolve frame index!");
1132 (void)Done;
11321133 }
11331134
11341135 bool ARMBaseRegisterInfo::isFrameOffsetLegal(const MachineInstr *MI,
29822982 EVT VT = Op.getValueType();
29832983 DebugLoc dl = Op.getDebugLoc();
29842984
2985 EVT OperandVT = Op.getOperand(0).getValueType();
2986 assert(OperandVT == MVT::v4i16 && "Invalid type for custom lowering!");
2985 assert(Op.getOperand(0).getValueType() == MVT::v4i16 &&
2986 "Invalid type for custom lowering!");
29872987 if (VT != MVT::v4f32)
29882988 return DAG.UnrollVectorOp(Op.getNode());
29892989
543543 ++i;
544544 assert(i < MI.getNumOperands() && "Instr doesn't have FrameIndex operand!");
545545 }
546 bool Done = false;
547 Done = rewriteFrameIndex(MI, i, BaseReg, Off, TII);
546 bool Done = rewriteFrameIndex(MI, i, BaseReg, Off, TII);
548547 assert (Done && "Unable to resolve frame index!");
548 (void)Done;
549549 }
550550
551551 /// saveScavengerRegister - Spill the register so it can be used by the
27272727 // the type to extend from needs to be i64 or i32.
27282728 assert((OpVT == MVT::i128 && (Op0VT == MVT::i64 || Op0VT == MVT::i32)) &&
27292729 "LowerSIGN_EXTEND: input and/or output operand have wrong size");
2730 (void)OpVT;
27302731
27312732 // Create shuffle mask
27322733 unsigned mask1 = 0x10101010; // byte 0 - 3 and 4 - 7
360360
361361 MachineFunction& MF = DAG.getMachineFunction();
362362 PTXMachineFunctionInfo *MFI = MF.getInfo();
363 const PTXSubtarget& ST = getTargetMachine().getSubtarget();
364
365 assert(ST.callsAreHandled() && "Calls are not handled for the target device");
363
364 assert(getTargetMachine().getSubtarget().callsAreHandled() &&
365 "Calls are not handled for the target device");
366366
367367 // Is there a more "LLVM"-way to create a variable-length array of values?
368368 SDValue* ops = new SDValue[OutVals.size() + 2];
479479 }
480480 dumpStack();
481481 );
482 (void)PrevMI;
482483
483484 Changed = true;
484485 }
308308 std::swap(LHS, RHS);
309309 bool Success = !I->swapOperands();
310310 assert(Success && "swapOperands failed");
311 Success = false;
311 (void)Success;
312312 MadeChange = true;
313313 } else if (RHSBO) {
314314 // Turn (A+B)+(C+D) -> (((A+B)+C)+D). This guarantees the RHS is not
742742 }
743743 assert(HasIndBrPred &&
744744 "LoopSimplify has no excuse for missing loop header info!");
745 (void)HasIndBrPred;
745746 }
746747
747748 // Indirectbr can interfere with exit block canonicalization.
756757 }
757758 assert(HasIndBrExiting &&
758759 "LoopSimplify has no excuse for missing exit block info!");
759 }
760 }
760 (void)HasIndBrExiting;
761 }
762 }
194194 DifferenceEngine::Context C(Engine, L, R);
195195
196196 BasicBlock::iterator LI = L->begin(), LE = L->end();
197 BasicBlock::iterator RI = R->begin(), RE = R->end();
197 BasicBlock::iterator RI = R->begin();
198198
199199 llvm::SmallVector, 20> TentativePairs;
200200
201201 do {
202 assert(LI != LE && RI != RE);
202 assert(LI != LE && RI != R->end());
203203 Instruction *LeftI = &*LI, *RightI = &*RI;
204204
205205 // If the instructions differ, start the more sophisticated diff