llvm.org GIT mirror llvm / 1f10480
Put a bunch of calls to ToggleFeature behind proper if statements. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141527 91177308-0d34-0410-b5e6-96231b3b80d8 Craig Topper 8 years ago
1 changed file(s) with 42 addition(s) and 17 deletion(s). Raw diff Collapse all Expand all
186186
187187 X86_MC::GetCpuIDAndInfo(0x1, &EAX, &EBX, &ECX, &EDX);
188188
189 if ((EDX >> 15) & 1) HasCMov = true; ToggleFeature(X86::FeatureCMOV);
190 if ((EDX >> 23) & 1) X86SSELevel = MMX; ToggleFeature(X86::FeatureMMX);
191 if ((EDX >> 25) & 1) X86SSELevel = SSE1; ToggleFeature(X86::FeatureSSE1);
192 if ((EDX >> 26) & 1) X86SSELevel = SSE2; ToggleFeature(X86::FeatureSSE2);
193 if (ECX & 0x1) X86SSELevel = SSE3; ToggleFeature(X86::FeatureSSE3);
194 if ((ECX >> 9) & 1) X86SSELevel = SSSE3; ToggleFeature(X86::FeatureSSSE3);
195 if ((ECX >> 19) & 1) X86SSELevel = SSE41; ToggleFeature(X86::FeatureSSE41);
196 if ((ECX >> 20) & 1) X86SSELevel = SSE42; ToggleFeature(X86::FeatureSSE42);
189 if ((EDX >> 15) & 1) { HasCMov = true; ToggleFeature(X86::FeatureCMOV); }
190 if ((EDX >> 23) & 1) { X86SSELevel = MMX; ToggleFeature(X86::FeatureMMX); }
191 if ((EDX >> 25) & 1) { X86SSELevel = SSE1; ToggleFeature(X86::FeatureSSE1); }
192 if ((EDX >> 26) & 1) { X86SSELevel = SSE2; ToggleFeature(X86::FeatureSSE2); }
193 if (ECX & 0x1) { X86SSELevel = SSE3; ToggleFeature(X86::FeatureSSE3); }
194 if ((ECX >> 9) & 1) { X86SSELevel = SSSE3; ToggleFeature(X86::FeatureSSSE3);}
195 if ((ECX >> 19) & 1) { X86SSELevel = SSE41; ToggleFeature(X86::FeatureSSE41);}
196 if ((ECX >> 20) & 1) { X86SSELevel = SSE42; ToggleFeature(X86::FeatureSSE42);}
197197 // FIXME: AVX codegen support is not ready.
198 //if ((ECX >> 28) & 1) { HasAVX = true; } ToggleFeature(X86::FeatureAVX);
198 //if ((ECX >> 28) & 1) { HasAVX = true; ToggleFeature(X86::FeatureAVX); }
199199
200200 bool IsIntel = memcmp(text.c, "GenuineIntel", 12) == 0;
201201 bool IsAMD = !IsIntel && memcmp(text.c, "AuthenticAMD", 12) == 0;
202202
203 HasCLMUL = IsIntel && ((ECX >> 1) & 0x1); ToggleFeature(X86::FeatureCLMUL);
204 HasFMA3 = IsIntel && ((ECX >> 12) & 0x1); ToggleFeature(X86::FeatureFMA3);
205 HasMOVBE = IsIntel && ((ECX >> 22) & 0x1); ToggleFeature(X86::FeatureMOVBE);
206 HasPOPCNT = IsIntel && ((ECX >> 23) & 0x1); ToggleFeature(X86::FeaturePOPCNT);
207 HasAES = IsIntel && ((ECX >> 25) & 0x1); ToggleFeature(X86::FeatureAES);
208 HasF16C = IsIntel && ((ECX >> 29) & 0x1); ToggleFeature(X86::FeatureF16C);
209 HasRDRAND = IsIntel && ((ECX >> 30) & 0x1); ToggleFeature(X86::FeatureRDRAND);
210 HasCmpxchg16b = ((ECX >> 13) & 0x1); ToggleFeature(X86::FeatureCMPXCHG16B);
203 if (IsIntel && ((ECX >> 1) & 0x1)) {
204 HasCLMUL = true;
205 ToggleFeature(X86::FeatureCLMUL);
206 }
207 if (IsIntel && ((ECX >> 12) & 0x1)) {
208 HasFMA3 = true;
209 ToggleFeature(X86::FeatureFMA3);
210 }
211 if (IsIntel && ((ECX >> 22) & 0x1)) {
212 HasMOVBE = true;
213 ToggleFeature(X86::FeatureMOVBE);
214 }
215 if (IsIntel && ((ECX >> 23) & 0x1)) {
216 HasPOPCNT = true;
217 ToggleFeature(X86::FeaturePOPCNT);
218 }
219 if (IsIntel && ((ECX >> 25) & 0x1)) {
220 HasAES = true;
221 ToggleFeature(X86::FeatureAES);
222 }
223 if (IsIntel && ((ECX >> 29) & 0x1)) {
224 HasF16C = true;
225 ToggleFeature(X86::FeatureF16C);
226 }
227 if (IsIntel && ((ECX >> 30) & 0x1)) {
228 HasRDRAND = true;
229 ToggleFeature(X86::FeatureRDRAND);
230 }
231
232 if ((ECX >> 13) & 0x1) {
233 HasCmpxchg16b = true;
234 ToggleFeature(X86::FeatureCMPXCHG16B);
235 }
211236
212237 if (IsIntel || IsAMD) {
213238 // Determine if bit test memory instructions are slow.