llvm.org GIT mirror llvm / 1ed57f6
Constify AArch64CollectLOH.cpp. NFC git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231969 91177308-0d34-0410-b5e6-96231b3b80d8 Pete Cooper 5 years ago
1 changed file(s) with 7 addition(s) and 7 deletion(s). Raw diff Collapse all Expand all
278278 /// definition. It also consider definitions of ADRP instructions as uses and
279279 /// ignore other uses. The ADRPMode is used to collect the information for LHO
280280 /// that involve ADRP operation only.
281 static void initReachingDef(MachineFunction &MF,
281 static void initReachingDef(const MachineFunction &MF,
282282 InstrToInstrs *ColorOpToReachedUses,
283283 BlockToInstrPerColor &Gen, BlockToRegSet &Kill,
284284 BlockToSetOfInstrsPerColor &ReachableUses,
287287 const TargetRegisterInfo *TRI = MF.getSubtarget().getRegisterInfo();
288288 unsigned NbReg = RegToId.size();
289289
290 for (MachineBasicBlock &MBB : MF) {
290 for (const MachineBasicBlock &MBB : MF) {
291291 auto &BBGen = Gen[&MBB];
292292 BBGen = make_unique(NbReg);
293293 std::fill(BBGen.get(), BBGen.get() + NbReg, nullptr);
381381 /// op.reachedUses
382382 ///
383383 /// Out[bb] = Gen[bb] U (In[bb] - Kill[bb])
384 static void reachingDefAlgorithm(MachineFunction &MF,
384 static void reachingDefAlgorithm(const MachineFunction &MF,
385385 InstrToInstrs *ColorOpToReachedUses,
386386 BlockToSetOfInstrsPerColor &In,
387387 BlockToSetOfInstrsPerColor &Out,
391391 bool HasChanged;
392392 do {
393393 HasChanged = false;
394 for (MachineBasicBlock &MBB : MF) {
394 for (const MachineBasicBlock &MBB : MF) {
395395 unsigned CurReg;
396396 for (CurReg = 0; CurReg < NbReg; ++CurReg) {
397397 SetOfMachineInstr &BBInSet = getSet(In, MBB, CurReg, NbReg);
400400 SetOfMachineInstr &BBOutSet = getSet(Out, MBB, CurReg, NbReg);
401401 unsigned Size = BBOutSet.size();
402402 // In[bb][color] = U Out[bb.predecessors][color]
403 for (MachineBasicBlock *PredMBB : MBB.predecessors()) {
403 for (const MachineBasicBlock *PredMBB : MBB.predecessors()) {
404404 SetOfMachineInstr &PredOutSet = getSet(Out, *PredMBB, CurReg, NbReg);
405405 BBInSet.insert(PredOutSet.begin(), PredOutSet.end());
406406 }
432432 /// @p DummyOp.
433433 /// \pre ColorOpToReachedUses is an array of at least number of registers of
434434 /// InstrToInstrs.
435 static void reachingDef(MachineFunction &MF,
435 static void reachingDef(const MachineFunction &MF,
436436 InstrToInstrs *ColorOpToReachedUses,
437437 const MapRegToId &RegToId, bool ADRPMode = false,
438438 const MachineInstr *DummyOp = nullptr) {
982982 /// Look for every register defined by potential LOHs candidates.
983983 /// Map these registers with dense id in @p RegToId and vice-versa in
984984 /// @p IdToReg. @p IdToReg is populated only in DEBUG mode.
985 static void collectInvolvedReg(MachineFunction &MF, MapRegToId &RegToId,
985 static void collectInvolvedReg(const MachineFunction &MF, MapRegToId &RegToId,
986986 MapIdToReg &IdToReg,
987987 const TargetRegisterInfo *TRI) {
988988 unsigned CurRegId = 0;