llvm.org GIT mirror llvm / 1e93df6
Move per-function state out of TargetLowering subclasses and into MachineFunctionInfo subclasses. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101634 91177308-0d34-0410-b5e6-96231b3b80d8 Dan Gohman 10 years ago
29 changed file(s) with 352 addition(s) and 176 deletion(s). Raw diff Collapse all Expand all
15731573 return Res;
15741574 }
15751575
1576 static SDValue LowerVASTART(SDValue Op, SelectionDAG &DAG,
1577 unsigned VarArgsFrameIndex) {
1576 static SDValue LowerVASTART(SDValue Op, SelectionDAG &DAG) {
1577 MachineFunction &MF = DAG.getMachineFunction();
1578 ARMFunctionInfo *FuncInfo = MF.getInfo();
1579
15781580 // vastart just stores the address of the VarArgsFrameIndex slot into the
15791581 // memory location argument.
15801582 DebugLoc dl = Op.getDebugLoc();
15811583 EVT PtrVT = DAG.getTargetLoweringInfo().getPointerTy();
1582 SDValue FR = DAG.getFrameIndex(VarArgsFrameIndex, PtrVT);
1584 SDValue FR = DAG.getFrameIndex(FuncInfo->getVarArgsFrameIndex(), PtrVT);
15831585 const Value *SV = cast(Op.getOperand(2))->getValue();
15841586 return DAG.getStore(Op.getOperand(0), dl, FR, Op.getOperand(1), SV, 0,
15851587 false, false, 0);
18041806 // to their spots on the stack so that they may be loaded by deferencing
18051807 // the result of va_next.
18061808 AFI->setVarArgsRegSaveSize(VARegSaveSize);
1807 VarArgsFrameIndex = MFI->CreateFixedObject(VARegSaveSize, ArgOffset +
1808 VARegSaveSize - VARegSize,
1809 true, false);
1810 SDValue FIN = DAG.getFrameIndex(VarArgsFrameIndex, getPointerTy());
1809 AFI->setVarArgsFrameIndex(
1810 MFI->CreateFixedObject(VARegSaveSize,
1811 ArgOffset + VARegSaveSize - VARegSize,
1812 true, false));
1813 SDValue FIN = DAG.getFrameIndex(AFI->getVarArgsFrameIndex(),
1814 getPointerTy());
18111815
18121816 SmallVector MemOps;
18131817 for (; NumGPRs < 4; ++NumGPRs) {
18191823
18201824 unsigned VReg = MF.addLiveIn(GPRArgRegs[NumGPRs], RC);
18211825 SDValue Val = DAG.getCopyFromReg(Chain, dl, VReg, MVT::i32);
1822 SDValue Store = DAG.getStore(Val.getValue(1), dl, Val, FIN,
1823 PseudoSourceValue::getFixedStack(VarArgsFrameIndex), 0,
1824 false, false, 0);
1826 SDValue Store =
1827 DAG.getStore(Val.getValue(1), dl, Val, FIN,
1828 PseudoSourceValue::getFixedStack(AFI->getVarArgsFrameIndex()), 0,
1829 false, false, 0);
18251830 MemOps.push_back(Store);
18261831 FIN = DAG.getNode(ISD::ADD, dl, getPointerTy(), FIN,
18271832 DAG.getConstant(4, getPointerTy()));
18311836 &MemOps[0], MemOps.size());
18321837 } else
18331838 // This will point to the next argument passed via stack.
1834 VarArgsFrameIndex = MFI->CreateFixedObject(4, ArgOffset, true, false);
1839 AFI->setVarArgsFrameIndex(MFI->CreateFixedObject(4, ArgOffset,
1840 true, false));
18351841 }
18361842
18371843 return Chain;
31353141 case ISD::BR_CC: return LowerBR_CC(Op, DAG);
31363142 case ISD::BR_JT: return LowerBR_JT(Op, DAG);
31373143 case ISD::DYNAMIC_STACKALLOC: return LowerDYNAMIC_STACKALLOC(Op, DAG);
3138 case ISD::VASTART: return LowerVASTART(Op, DAG, VarArgsFrameIndex);
3144 case ISD::VASTART: return LowerVASTART(Op, DAG);
31393145 case ISD::MEMBARRIER: return LowerMEMBARRIER(Op, DAG, Subtarget);
31403146 case ISD::SINT_TO_FP:
31413147 case ISD::UINT_TO_FP: return LowerINT_TO_FP(Op, DAG);
158158 // ARMTargetLowering - ARM Implementation of the TargetLowering interface
159159
160160 class ARMTargetLowering : public TargetLowering {
161 int VarArgsFrameIndex; // FrameIndex for start of varargs area.
162161 public:
163162 explicit ARMTargetLowering(TargetMachine &TM);
164163
8383 unsigned JumpTableUId;
8484
8585 unsigned ConstPoolEntryUId;
86
87 /// VarArgsFrameIndex - FrameIndex for start of varargs area.
88 int VarArgsFrameIndex;
8689
8790 public:
8891 ARMFunctionInfo() :
9396 FramePtrSpillOffset(0), GPRCS1Offset(0), GPRCS2Offset(0), DPRCSOffset(0),
9497 GPRCS1Size(0), GPRCS2Size(0), DPRCSSize(0),
9598 GPRCS1Frames(0), GPRCS2Frames(0), DPRCSFrames(0),
96 JumpTableUId(0), ConstPoolEntryUId(0) {}
99 JumpTableUId(0), ConstPoolEntryUId(0), VarArgsFrameIndex(0) {}
97100
98101 explicit ARMFunctionInfo(MachineFunction &MF) :
99102 isThumb(MF.getTarget().getSubtarget().isThumb()),
104107 GPRCS1Size(0), GPRCS2Size(0), DPRCSSize(0),
105108 GPRCS1Frames(32), GPRCS2Frames(32), DPRCSFrames(32),
106109 SpilledCSRegs(MF.getTarget().getRegisterInfo()->getNumRegs()),
107 JumpTableUId(0), ConstPoolEntryUId(0) {}
110 JumpTableUId(0), ConstPoolEntryUId(0), VarArgsFrameIndex(0) {}
108111
109112 bool isThumbFunction() const { return isThumb; }
110113 bool isThumb1OnlyFunction() const { return isThumb && !hasThumb2; }
222225 unsigned createConstPoolEntryUId() {
223226 return ConstPoolEntryUId++;
224227 }
228
229 int getVarArgsFrameIndex() const { return VarArgsFrameIndex; }
230 void setVarArgsFrameIndex(int Index) { VarArgsFrameIndex = Index; }
225231 };
226232 } // End llvm namespace
227233
1212
1313 #include "AlphaISelLowering.h"
1414 #include "AlphaTargetMachine.h"
15 #include "AlphaMachineFunctionInfo.h"
1516 #include "llvm/CodeGen/CallingConvLower.h"
1617 #include "llvm/CodeGen/MachineFrameInfo.h"
1718 #include "llvm/CodeGen/MachineFunction.h"
388389
389390 MachineFunction &MF = DAG.getMachineFunction();
390391 MachineFrameInfo *MFI = MF.getFrameInfo();
392 AlphaMachineFunctionInfo *FuncInfo = MF.getInfo();
391393
392394 unsigned args_int[] = {
393395 Alpha::R16, Alpha::R17, Alpha::R18, Alpha::R19, Alpha::R20, Alpha::R21};
434436
435437 // If the functions takes variable number of arguments, copy all regs to stack
436438 if (isVarArg) {
437 VarArgsOffset = Ins.size() * 8;
439 FuncInfo->setVarArgsOffset(Ins.size() * 8);
438440 std::vector LS;
439441 for (int i = 0; i < 6; ++i) {
440442 if (TargetRegisterInfo::isPhysicalRegister(args_int[i]))
441443 args_int[i] = AddLiveIn(MF, args_int[i], &Alpha::GPRCRegClass);
442444 SDValue argt = DAG.getCopyFromReg(Chain, dl, args_int[i], MVT::i64);
443445 int FI = MFI->CreateFixedObject(8, -8 * (6 - i), true, false);
444 if (i == 0) VarArgsBase = FI;
446 if (i == 0) FuncInfo->setVarArgsBase(FI);
445447 SDValue SDFI = DAG.getFrameIndex(FI, MVT::i64);
446448 LS.push_back(DAG.getStore(Chain, dl, argt, SDFI, NULL, 0,
447449 false, false, 0));
724726 false, false, 0);
725727 }
726728 case ISD::VASTART: {
729 MachineFunction &MF = DAG.getMachineFunction();
730 AlphaMachineFunctionInfo *FuncInfo = MF.getInfo();
731
727732 SDValue Chain = Op.getOperand(0);
728733 SDValue VAListP = Op.getOperand(1);
729734 const Value *VAListS = cast(Op.getOperand(2))->getValue();
730735
731736 // vastart stores the address of the VarArgsBase and VarArgsOffset
732 SDValue FR = DAG.getFrameIndex(VarArgsBase, MVT::i64);
737 SDValue FR = DAG.getFrameIndex(FuncInfo->getVarArgsBase(), MVT::i64);
733738 SDValue S1 = DAG.getStore(Chain, dl, FR, VAListP, VAListS, 0,
734739 false, false, 0);
735740 SDValue SA2 = DAG.getNode(ISD::ADD, dl, MVT::i64, VAListP,
736741 DAG.getConstant(8, MVT::i64));
737 return DAG.getTruncStore(S1, dl, DAG.getConstant(VarArgsOffset, MVT::i64),
742 return DAG.getTruncStore(S1, dl,
743 DAG.getConstant(FuncInfo->getVarArgsOffset(),
744 MVT::i64),
738745 SA2, NULL, 0, MVT::i32, false, false, 0);
739746 }
740747 case ISD::RETURNADDR:
5959 }
6060
6161 class AlphaTargetLowering : public TargetLowering {
62 int VarArgsOffset; // What is the offset to the first vaarg
63 int VarArgsBase; // What is the base FrameIndex
6462 public:
6563 explicit AlphaTargetLowering(TargetMachine &TM);
6664
2929 /// the return address value.
3030 unsigned GlobalRetAddr;
3131
32 /// VarArgsOffset - What is the offset to the first vaarg
33 int VarArgsOffset;
34 /// VarArgsBase - What is the base FrameIndex
35 int VarArgsBase;
36
3237 public:
33 AlphaMachineFunctionInfo() : GlobalBaseReg(0), GlobalRetAddr(0) {}
38 AlphaMachineFunctionInfo() : GlobalBaseReg(0), GlobalRetAddr(0),
39 VarArgsOffset(0), VarArgsBase(0) {}
3440
3541 explicit AlphaMachineFunctionInfo(MachineFunction &MF) : GlobalBaseReg(0),
36 GlobalRetAddr(0) {}
42 GlobalRetAddr(0),
43 VarArgsOffset(0),
44 VarArgsBase(0) {}
3745
3846 unsigned getGlobalBaseReg() const { return GlobalBaseReg; }
3947 void setGlobalBaseReg(unsigned Reg) { GlobalBaseReg = Reg; }
4048
4149 unsigned getGlobalRetAddr() const { return GlobalRetAddr; }
4250 void setGlobalRetAddr(unsigned Reg) { GlobalRetAddr = Reg; }
51
52 int getVarArgsOffset() const { return VarArgsOffset; }
53 void setVarArgsOffset(int Offset) { VarArgsOffset = Offset; }
54
55 int getVarArgsBase() const { return VarArgsBase; }
56 void setVarArgsBase(int Base) { VarArgsBase = Base; }
4357 };
4458
4559 } // End llvm namespace
2929 }
3030
3131 class BlackfinTargetLowering : public TargetLowering {
32 int VarArgsFrameOffset; // Frame offset to start of varargs area.
3332 public:
3433 BlackfinTargetLowering(TargetMachine &TM);
3534 virtual MVT::SimpleValueType getSetCCResultType(EVT VT) const;
3736 virtual void ReplaceNodeResults(SDNode *N,
3837 SmallVectorImpl &Results,
3938 SelectionDAG &DAG);
40
41 int getVarArgsFrameOffset() const { return VarArgsFrameOffset; }
4239
4340 ConstraintType getConstraintType(const std::string &Constraint) const;
4441 std::pair
1414 #include "SPUISelLowering.h"
1515 #include "SPUTargetMachine.h"
1616 #include "SPUFrameInfo.h"
17 #include "SPUMachineFunction.h"
1718 #include "llvm/Constants.h"
1819 #include "llvm/Function.h"
1920 #include "llvm/Intrinsics.h"
10081009 MachineFunction &MF = DAG.getMachineFunction();
10091010 MachineFrameInfo *MFI = MF.getFrameInfo();
10101011 MachineRegisterInfo &RegInfo = MF.getRegInfo();
1012 SPUFunctionInfo *FuncInfo = MF.getInfo();
10111013
10121014 const unsigned *ArgRegs = SPURegisterInfo::getArgRegs();
10131015 const unsigned NumArgRegs = SPURegisterInfo::getNumArgRegs();
10901092 // Create the frame slot
10911093
10921094 for (; ArgRegIdx != NumArgRegs; ++ArgRegIdx) {
1093 VarArgsFrameIndex = MFI->CreateFixedObject(StackSlotSize, ArgOffset,
1094 true, false);
1095 SDValue FIN = DAG.getFrameIndex(VarArgsFrameIndex, PtrVT);
1095 FuncInfo->setVarArgsFrameIndex(
1096 MFI->CreateFixedObject(StackSlotSize, ArgOffset,
1097 true, false));
1098 SDValue FIN = DAG.getFrameIndex(FuncInfo->getVarArgsFrameIndex(), PtrVT);
10961099 unsigned VReg = MF.addLiveIn(ArgRegs[ArgRegIdx], &SPU::R32CRegClass);
10971100 SDValue ArgVal = DAG.getRegister(VReg, MVT::v16i8);
10981101 SDValue Store = DAG.getStore(Chain, dl, ArgVal, FIN, NULL, 0,
2525 ///
2626 bool UsesLR;
2727
28 // VarArgsFrameIndex - FrameIndex for start of varargs area.
29 int VarArgsFrameIndex;
30
2831 public:
2932 SPUFunctionInfo(MachineFunction& MF)
30 : UsesLR(false)
33 : UsesLR(false),
34 VarArgsFrameIndex(0)
3135 {}
3236
3337 void setUsesLR(bool U) { UsesLR = U; }
3438 bool usesLR() { return UsesLR; }
3539
40 int getVarArgsFrameIndex() const { return VarArgsFrameIndex; }
41 void setVarArgsFrameIndex(int Index) { VarArgsFrameIndex = Index; }
3642 };
3743
3844 } // end of namespace llvm
455455 }
456456
457457 SDValue MBlazeTargetLowering::LowerVASTART(SDValue Op, SelectionDAG &DAG) {
458 MachineFunction &MF = DAG.getMachineFunction();
459 MBlazeFunctionInfo *FuncInfo = MF.getInfo();
460
458461 DebugLoc dl = Op.getDebugLoc();
459 SDValue FI = DAG.getFrameIndex(VarArgsFrameIndex, getPointerTy());
462 SDValue FI = DAG.getFrameIndex(FuncInfo->getVarArgsFrameIndex(),
463 getPointerTy());
460464
461465 // vastart just stores the address of the VarArgsFrameIndex slot into the
462466 // memory location argument.
704708 MBlazeFunctionInfo *MBlazeFI = MF.getInfo();
705709
706710 unsigned StackReg = MF.getTarget().getRegisterInfo()->getFrameRegister(MF);
707 VarArgsFrameIndex = 0;
711 MBlazeFI->setVarArgsFrameIndex(0);
708712
709713 // Used with vargs to acumulate store chains.
710714 std::vector OutChains;
817821
818822 // Record the frame index of the first variable argument
819823 // which is a value necessary to VASTART.
820 if (!VarArgsFrameIndex)
821 VarArgsFrameIndex = FI;
824 if (!MBlazeFI->getVarArgsFrameIndex())
825 MBlazeFI->setVarArgsFrameIndex(FI);
822826 }
823827 }
824828
6262 //===--------------------------------------------------------------------===//
6363
6464 class MBlazeTargetLowering : public TargetLowering {
65 int VarArgsFrameIndex; // FrameIndex for start of varargs area.
66
6765 public:
68
6966 explicit MBlazeTargetLowering(MBlazeTargetMachine &TM);
7067
7168 /// LowerOperation - Provide custom lowering hooks for some operations.
7878 /// relocation models.
7979 unsigned GlobalBaseReg;
8080
81 // VarArgsFrameIndex - FrameIndex for start of varargs area.
82 int VarArgsFrameIndex;
83
8184 public:
8285 MBlazeFunctionInfo(MachineFunction& MF)
8386 : FPStackOffset(0), RAStackOffset(0), CPUTopSavedRegOff(0),
8487 GPHolder(-1,-1), HasLoadArgs(false), HasStoreVarArgs(false),
85 SRetReturnReg(0), GlobalBaseReg(0)
88 SRetReturnReg(0), GlobalBaseReg(0), VarArgsFrameIndex(0)
8689 {}
8790
8891 int getFPStackOffset() const { return FPStackOffset; }
128131
129132 unsigned getGlobalBaseReg() const { return GlobalBaseReg; }
130133 void setGlobalBaseReg(unsigned Reg) { GlobalBaseReg = Reg; }
134
135 int getVarArgsFrameIndex() const { return VarArgsFrameIndex; }
136 void setVarArgsFrameIndex(int Index) { VarArgsFrameIndex = Index; }
131137 };
132138
133139 } // end of namespace llvm
596596 }
597597
598598 SDValue MipsTargetLowering::LowerVASTART(SDValue Op, SelectionDAG &DAG) {
599 MachineFunction &MF = DAG.getMachineFunction();
600 MipsFunctionInfo *FuncInfo = MF.getInfo();
601
599602 DebugLoc dl = Op.getDebugLoc();
600 SDValue FI = DAG.getFrameIndex(VarArgsFrameIndex, getPointerTy());
603 SDValue FI = DAG.getFrameIndex(FuncInfo->getVarArgsFrameIndex(),
604 getPointerTy());
601605
602606 // vastart just stores the address of the VarArgsFrameIndex slot into the
603607 // memory location argument.
10011005 MipsFunctionInfo *MipsFI = MF.getInfo();
10021006
10031007 unsigned StackReg = MF.getTarget().getRegisterInfo()->getFrameRegister(MF);
1004 VarArgsFrameIndex = 0;
1008 MipsFI->setVarArgsFrameIndex(0);
10051009
10061010 // Used with vargs to acumulate store chains.
10071011 std::vector OutChains;
11421146
11431147 // Record the frame index of the first variable argument
11441148 // which is a value necessary to VASTART.
1145 if (!VarArgsFrameIndex)
1146 VarArgsFrameIndex = FI;
1149 if (!MipsFI->getVarArgsFrameIndex())
1150 MipsFI->setVarArgsFrameIndex(FI);
11471151 }
11481152 }
11491153
6767 //===--------------------------------------------------------------------===//
6868
6969 class MipsTargetLowering : public TargetLowering {
70 int VarArgsFrameIndex; // FrameIndex for start of varargs area.
71
7270 public:
73
7471 explicit MipsTargetLowering(MipsTargetMachine &TM);
7572
7673 /// LowerOperation - Provide custom lowering hooks for some operations.
7979 /// relocation models.
8080 unsigned GlobalBaseReg;
8181
82 /// VarArgsFrameIndex - FrameIndex for start of varargs area.
83 int VarArgsFrameIndex;
84
8285 public:
8386 MipsFunctionInfo(MachineFunction& MF)
8487 : FPStackOffset(0), RAStackOffset(0), CPUTopSavedRegOff(0),
8588 FPUTopSavedRegOff(0), GPHolder(-1,-1), HasLoadArgs(false),
86 HasStoreVarArgs(false), SRetReturnReg(0), GlobalBaseReg(0)
89 HasStoreVarArgs(false), SRetReturnReg(0), GlobalBaseReg(0),
90 VarArgsFrameIndex(0)
8791 {}
8892
8993 int getFPStackOffset() const { return FPStackOffset; }
132136
133137 unsigned getGlobalBaseReg() const { return GlobalBaseReg; }
134138 void setGlobalBaseReg(unsigned Reg) { GlobalBaseReg = Reg; }
139
140 int getVarArgsFrameIndex() const { return VarArgsFrameIndex; }
141 void setVarArgsFrameIndex(int Index) { VarArgsFrameIndex = Index; }
135142 };
136143
137144 } // end of namespace llvm
1515 #include "PIC16AsmPrinter.h"
1616 #include "PIC16Section.h"
1717 #include "PIC16MCAsmInfo.h"
18 #include "PIC16MachineFunctionInfo.h"
1819 #include "llvm/DerivedTypes.h"
1920 #include "llvm/Function.h"
2021 #include "llvm/Module.h"
378379 void PIC16AsmPrinter::EmitFunctionFrame(MachineFunction &MF) {
379380 const Function *F = MF.getFunction();
380381 const TargetData *TD = TM.getTargetData();
382 PIC16MachineFunctionInfo *FuncInfo = MF.getInfo();
383
381384 // Emit the data section name.
382385
383386 PIC16Section *fPDataSection =
419422 Twine(" RES ") + Twine(ArgSize));
420423
421424 // Emit temporary space
422 int TempSize = PTLI->GetTmpSize();
425 int TempSize = FuncInfo->getTmpSize();
423426 if (TempSize > 0)
424427 OutStreamer.EmitRawText(PAN::getTempdataLabel(CurrentFnSym->getName()) +
425428 Twine(" RES ") + Twine(TempSize));
1515 #include "PIC16ISelLowering.h"
1616 #include "PIC16TargetObjectFile.h"
1717 #include "PIC16TargetMachine.h"
18 #include "PIC16MachineFunctionInfo.h"
1819 #include "llvm/DerivedTypes.h"
1920 #include "llvm/GlobalValue.h"
2021 #include "llvm/Function.h"
143144
144145 // PIC16TargetLowering Constructor.
145146 PIC16TargetLowering::PIC16TargetLowering(PIC16TargetMachine &TM)
146 : TargetLowering(TM, new PIC16TargetObjectFile()), TmpSize(0) {
147 : TargetLowering(TM, new PIC16TargetObjectFile()) {
147148
148149 Subtarget = &TM.getSubtarget();
149150
320321 return Flag;
321322 }
322323 // Get the TmpOffset for FrameIndex
323 unsigned PIC16TargetLowering::GetTmpOffsetForFI(unsigned FI, unsigned size) {
324 unsigned PIC16TargetLowering::GetTmpOffsetForFI(unsigned FI, unsigned size,
325 MachineFunction &MF) {
326 PIC16MachineFunctionInfo *FuncInfo = MF.getInfo();
327 std::map &FiTmpOffsetMap = FuncInfo->getFiTmpOffsetMap();
328
324329 std::map::iterator
325330 MapIt = FiTmpOffsetMap.find(FI);
326331 if (MapIt != FiTmpOffsetMap.end())
327332 return MapIt->second;
328333
329334 // This FI (FrameIndex) is not yet mapped, so map it
330 FiTmpOffsetMap[FI] = TmpSize;
331 TmpSize += size;
335 FiTmpOffsetMap[FI] = FuncInfo->getTmpSize();
336 FuncInfo->setTmpSize(FuncInfo->getTmpSize() + size);
332337 return FiTmpOffsetMap[FI];
338 }
339
340 void PIC16TargetLowering::ResetTmpOffsetMap(SelectionDAG &DAG) {
341 MachineFunction &MF = DAG.getMachineFunction();
342 PIC16MachineFunctionInfo *FuncInfo = MF.getInfo();
343 FuncInfo->getFiTmpOffsetMap().clear();
344 FuncInfo->setTmpSize(0);
333345 }
334346
335347 // To extract chain value from the SDValue Nodes
724736 MachineFunction &MF = DAG.getMachineFunction();
725737 const Function *Func = MF.getFunction();
726738 MachineFrameInfo *MFI = MF.getFrameInfo();
739 PIC16MachineFunctionInfo *FuncInfo = MF.getInfo();
727740 const std::string Name = Func->getName();
728741
729742 FrameIndexSDNode *FR = dyn_cast(Op);
735748 // the list and add their requested size.
736749 unsigned FIndex = FR->getIndex();
737750 const char *tmpName;
738 if (FIndex < ReservedFrameCount) {
751 if (FIndex < FuncInfo->getReservedFrameCount()) {
739752 tmpName = ESNames::createESName(PAN::getFrameLabel(Name));
740753 ES = DAG.getTargetExternalSymbol(tmpName, MVT::i8);
741754 Offset = 0;
746759 // FrameIndex has been made for some temporary storage
747760 tmpName = ESNames::createESName(PAN::getTempdataLabel(Name));
748761 ES = DAG.getTargetExternalSymbol(tmpName, MVT::i8);
749 Offset = GetTmpOffsetForFI(FIndex, MFI->getObjectSize(FIndex));
762 Offset = GetTmpOffsetForFI(FIndex, MFI->getObjectSize(FIndex), MF);
750763 }
751764
752765 return;
10841097 DAG.getEntryNode(),
10851098 Op, ES,
10861099 DAG.getConstant (1, MVT::i8), // Banksel.
1087 DAG.getConstant (GetTmpOffsetForFI(FI, 1),
1100 DAG.getConstant (GetTmpOffsetForFI(FI, 1, MF),
10881101 MVT::i8));
10891102
10901103 // Load the value from ES.
10911104 SDVTList Tys = DAG.getVTList(MVT::i8, MVT::Other);
10921105 SDValue Load = DAG.getNode(PIC16ISD::PIC16Load, dl, Tys, Store,
10931106 ES, DAG.getConstant (1, MVT::i8),
1094 DAG.getConstant (GetTmpOffsetForFI(FI, 1),
1107 DAG.getConstant (GetTmpOffsetForFI(FI, 1, MF),
10951108 MVT::i8));
10961109
10971110 return Load.getValue(0);
16461659 return Op;
16471660 }
16481661
1649 void PIC16TargetLowering::InitReservedFrameCount(const Function *F) {
1662 void PIC16TargetLowering::InitReservedFrameCount(const Function *F,
1663 SelectionDAG &DAG) {
1664 MachineFunction &MF = DAG.getMachineFunction();
1665 PIC16MachineFunctionInfo *FuncInfo = MF.getInfo();
1666
16501667 unsigned NumArgs = F->arg_size();
16511668
16521669 bool isVoidFunc = (F->getReturnType()->getTypeID() == Type::VoidTyID);
16531670
16541671 if (isVoidFunc)
1655 ReservedFrameCount = NumArgs;
1672 FuncInfo->setReservedFrameCount(NumArgs);
16561673 else
1657 ReservedFrameCount = NumArgs + 1;
1674 FuncInfo->setReservedFrameCount(NumArgs + 1);
16581675 }
16591676
16601677 // LowerFormalArguments - Argument values are loaded from the
16771694 std::string FuncName = F->getName();
16781695
16791696 // Reset the map of FI and TmpOffset
1680 ResetTmpOffsetMap();
1697 ResetTmpOffsetMap(DAG);
16811698 // Initialize the ReserveFrameCount
1682 InitReservedFrameCount(F);
1699 InitReservedFrameCount(F, DAG);
16831700
16841701 // Create the .args external symbol.
16851702 const char *tmpName = ESNames::createESName(PAN::getArgsLabel(FuncName));
167167 // This function returns the Tmp Offset for FrameIndex. If any TmpOffset
168168 // already exists for the FI then it returns the same else it creates the
169169 // new offset and returns.
170 unsigned GetTmpOffsetForFI(unsigned FI, unsigned slot_size);
171 void ResetTmpOffsetMap() { FiTmpOffsetMap.clear(); SetTmpSize(0); }
172 void InitReservedFrameCount(const Function *F);
173
174 // Return the size of Tmp variable
175 unsigned GetTmpSize() { return TmpSize; }
176 void SetTmpSize(unsigned Size) { TmpSize = Size; }
170 unsigned GetTmpOffsetForFI(unsigned FI, unsigned slot_size,
171 MachineFunction &MF);
172 void ResetTmpOffsetMap(SelectionDAG &DAG);
173 void InitReservedFrameCount(const Function *F,
174 SelectionDAG &DAG);
177175
178176 /// getFunctionAlignment - Return the Log2 alignment of this function.
179177 virtual unsigned getFunctionAlignment(const Function *) const {
246244 // Keep a pointer to SelectionDAGISel to access its public
247245 // interface (It is required during legalization)
248246 SelectionDAGISel *ISel;
249
250 private:
251 // The frameindexes generated for spill/reload are stack based.
252 // This maps maintain zero based indexes for these FIs.
253 std::map FiTmpOffsetMap;
254 unsigned TmpSize;
255
256 // These are the frames for return value and argument passing
257 // These FrameIndices will be expanded to foo.frame external symbol
258 // and all others will be expanded to foo.tmp external symbol.
259 unsigned ReservedFrameCount;
260247 };
261248 } // namespace llvm
262249
8585 //MachineRegisterInfo &RI = MF.getRegInfo();
8686 BuildMI(MBB, I, DL, get(PIC16::movwf))
8787 .addReg(SrcReg, getKillRegState(isKill))
88 .addImm(PTLI->GetTmpOffsetForFI(FI, 1))
88 .addImm(PTLI->GetTmpOffsetForFI(FI, 1, *MBB.getParent()))
8989 .addExternalSymbol(tmpName)
9090 .addImm(1); // Emit banksel for it.
9191 }
100100 : PIC16::save_fsr1;
101101 BuildMI(MBB, I, DL, get(opcode))
102102 .addReg(SrcReg, getKillRegState(isKill))
103 .addImm(PTLI->GetTmpOffsetForFI(FI, 3))
103 .addImm(PTLI->GetTmpOffsetForFI(FI, 3, *MBB.getParent()))
104104 .addExternalSymbol(tmpName)
105105 .addImm(1); // Emit banksel for it.
106106 }
126126 //MachineFunction &MF = *MBB.getParent();
127127 //MachineRegisterInfo &RI = MF.getRegInfo();
128128 BuildMI(MBB, I, DL, get(PIC16::movf), DestReg)
129 .addImm(PTLI->GetTmpOffsetForFI(FI, 1))
129 .addImm(PTLI->GetTmpOffsetForFI(FI, 1, *MBB.getParent()))
130130 .addExternalSymbol(tmpName)
131131 .addImm(1); // Emit banksel for it.
132132 }
140140 unsigned opcode = (DestReg == PIC16::FSR0) ? PIC16::restore_fsr0
141141 : PIC16::restore_fsr1;
142142 BuildMI(MBB, I, DL, get(opcode), DestReg)
143 .addImm(PTLI->GetTmpOffsetForFI(FI, 3))
143 .addImm(PTLI->GetTmpOffsetForFI(FI, 3, *MBB.getParent()))
144144 .addExternalSymbol(tmpName)
145145 .addImm(1); // Emit banksel for it.
146146 }
0 //====- PIC16MachineFuctionInfo.h - PIC16 machine function info -*- C++ -*-===//
1 //
2 // The LLVM Compiler Infrastructure
3 //
4 // This file is distributed under the University of Illinois Open Source
5 // License. See LICENSE.TXT for details.
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file declares PIC16-specific per-machine-function information.
10 //
11 //===----------------------------------------------------------------------===//
12
13 #ifndef PIC16MACHINEFUNCTIONINFO_H
14 #define PIC16MACHINEFUNCTIONINFO_H
15
16 #include "llvm/CodeGen/MachineFunction.h"
17
18 namespace llvm {
19
20 /// PIC16MachineFunctionInfo - This class is derived from MachineFunction
21 /// private PIC16 target-specific information for each MachineFunction.
22 class PIC16MachineFunctionInfo : public MachineFunctionInfo {
23 // The frameindexes generated for spill/reload are stack based.
24 // This maps maintain zero based indexes for these FIs.
25 std::map FiTmpOffsetMap;
26 unsigned TmpSize;
27
28 // These are the frames for return value and argument passing
29 // These FrameIndices will be expanded to foo.frame external symbol
30 // and all others will be expanded to foo.tmp external symbol.
31 unsigned ReservedFrameCount;
32
33 public:
34 PIC16MachineFunctionInfo()
35 : TmpSize(0), ReservedFrameCount(0) {}
36
37 explicit PIC16MachineFunctionInfo(MachineFunction &MF)
38 : TmpSize(0), ReservedFrameCount(0) {}
39
40 std::map &getFiTmpOffsetMap() { return FiTmpOffsetMap; }
41
42 unsigned getTmpSize() const { return TmpSize; }
43 void setTmpSize(unsigned Size) { TmpSize = Size; }
44
45 unsigned getReservedFrameCount() const { return ReservedFrameCount; }
46 void setReservedFrameCount(unsigned Count) { ReservedFrameCount = Count; }
47 };
48
49 } // End llvm namespace
50
51 #endif
12901290 }
12911291
12921292 SDValue PPCTargetLowering::LowerVAARG(SDValue Op, SelectionDAG &DAG,
1293 int VarArgsFrameIndex,
1294 int VarArgsStackOffset,
1295 unsigned VarArgsNumGPR,
1296 unsigned VarArgsNumFPR,
1297 const PPCSubtarget &Subtarget) {
1293 const PPCSubtarget &Subtarget) {
12981294
12991295 llvm_unreachable("VAARG not yet implemented for the SVR4 ABI!");
13001296 return SDValue(); // Not reached
13421338 }
13431339
13441340 SDValue PPCTargetLowering::LowerVASTART(SDValue Op, SelectionDAG &DAG,
1345 int VarArgsFrameIndex,
1346 int VarArgsStackOffset,
1347 unsigned VarArgsNumGPR,
1348 unsigned VarArgsNumFPR,
13491341 const PPCSubtarget &Subtarget) {
1342 MachineFunction &MF = DAG.getMachineFunction();
1343 PPCFunctionInfo *FuncInfo = MF.getInfo();
1344
13501345 DebugLoc dl = Op.getDebugLoc();
13511346
13521347 if (Subtarget.isDarwinABI() || Subtarget.isPPC64()) {
13531348 // vastart just stores the address of the VarArgsFrameIndex slot into the
13541349 // memory location argument.
13551350 EVT PtrVT = DAG.getTargetLoweringInfo().getPointerTy();
1356 SDValue FR = DAG.getFrameIndex(VarArgsFrameIndex, PtrVT);
1351 SDValue FR = DAG.getFrameIndex(FuncInfo->getVarArgsFrameIndex(), PtrVT);
13571352 const Value *SV = cast(Op.getOperand(2))->getValue();
13581353 return DAG.getStore(Op.getOperand(0), dl, FR, Op.getOperand(1), SV, 0,
13591354 false, false, 0);
13841379 // } va_list[1];
13851380
13861381
1387 SDValue ArgGPR = DAG.getConstant(VarArgsNumGPR, MVT::i32);
1388 SDValue ArgFPR = DAG.getConstant(VarArgsNumFPR, MVT::i32);
1382 SDValue ArgGPR = DAG.getConstant(FuncInfo->getVarArgsNumGPR(), MVT::i32);
1383 SDValue ArgFPR = DAG.getConstant(FuncInfo->getVarArgsNumFPR(), MVT::i32);
13891384
13901385
13911386 EVT PtrVT = DAG.getTargetLoweringInfo().getPointerTy();
13921387
1393 SDValue StackOffsetFI = DAG.getFrameIndex(VarArgsStackOffset, PtrVT);
1394 SDValue FR = DAG.getFrameIndex(VarArgsFrameIndex, PtrVT);
1388 SDValue StackOffsetFI = DAG.getFrameIndex(FuncInfo->getVarArgsStackOffset(),
1389 PtrVT);
1390 SDValue FR = DAG.getFrameIndex(FuncInfo->getVarArgsFrameIndex(),
1391 PtrVT);
13951392
13961393 uint64_t FrameOffset = PtrVT.getSizeInBits()/8;
13971394 SDValue ConstFrameOffset = DAG.getConstant(FrameOffset, PtrVT);
15741571
15751572 MachineFunction &MF = DAG.getMachineFunction();
15761573 MachineFrameInfo *MFI = MF.getFrameInfo();
1574 PPCFunctionInfo *FuncInfo = MF.getInfo();
15771575
15781576 EVT PtrVT = DAG.getTargetLoweringInfo().getPointerTy();
15791577 // Potential tail calls could cause overwriting of argument stack slots.
16871685 };
16881686 const unsigned NumFPArgRegs = array_lengthof(FPArgRegs);
16891687
1690 VarArgsNumGPR = CCInfo.getFirstUnallocated(GPArgRegs, NumGPArgRegs);
1691 VarArgsNumFPR = CCInfo.getFirstUnallocated(FPArgRegs, NumFPArgRegs);
1688 FuncInfo->setVarArgsNumGPR(CCInfo.getFirstUnallocated(GPArgRegs,
1689 NumGPArgRegs));
1690 FuncInfo->setVarArgsNumFPR(CCInfo.getFirstUnallocated(FPArgRegs,
1691 NumFPArgRegs));
16921692
16931693 // Make room for NumGPArgRegs and NumFPArgRegs.
16941694 int Depth = NumGPArgRegs * PtrVT.getSizeInBits()/8 +
16951695 NumFPArgRegs * EVT(MVT::f64).getSizeInBits()/8;
16961696
1697 VarArgsStackOffset = MFI->CreateFixedObject(PtrVT.getSizeInBits()/8,
1698 CCInfo.getNextStackOffset(),
1699 true, false);
1700
1701 VarArgsFrameIndex = MFI->CreateStackObject(Depth, 8, false);
1702 SDValue FIN = DAG.getFrameIndex(VarArgsFrameIndex, PtrVT);
1697 FuncInfo->setVarArgsStackOffset(
1698 MFI->CreateFixedObject(PtrVT.getSizeInBits()/8,
1699 CCInfo.getNextStackOffset(),
1700 true, false));
1701
1702 FuncInfo->setVarArgsFrameIndex(MFI->CreateStackObject(Depth, 8, false));
1703 SDValue FIN = DAG.getFrameIndex(FuncInfo->getVarArgsFrameIndex(), PtrVT);
17031704
17041705 // The fixed integer arguments of a variadic function are
17051706 // stored to the VarArgsFrameIndex on the stack.
17061707 unsigned GPRIndex = 0;
1707 for (; GPRIndex != VarArgsNumGPR; ++GPRIndex) {
1708 for (; GPRIndex != FuncInfo->getVarArgsNumGPR(); ++GPRIndex) {
17081709 SDValue Val = DAG.getRegister(GPArgRegs[GPRIndex], PtrVT);
17091710 SDValue Store = DAG.getStore(Chain, dl, Val, FIN, NULL, 0,
17101711 false, false, 0);
17351736 // The double arguments are stored to the VarArgsFrameIndex
17361737 // on the stack.
17371738 unsigned FPRIndex = 0;
1738 for (FPRIndex = 0; FPRIndex != VarArgsNumFPR; ++FPRIndex) {
1739 for (FPRIndex = 0; FPRIndex != FuncInfo->getVarArgsNumFPR(); ++FPRIndex) {
17391740 SDValue Val = DAG.getRegister(FPArgRegs[FPRIndex], MVT::f64);
17401741 SDValue Store = DAG.getStore(Chain, dl, Val, FIN, NULL, 0,
17411742 false, false, 0);
17791780 //
17801781 MachineFunction &MF = DAG.getMachineFunction();
17811782 MachineFrameInfo *MFI = MF.getFrameInfo();
1783 PPCFunctionInfo *FuncInfo = MF.getInfo();
17821784
17831785 EVT PtrVT = DAG.getTargetLoweringInfo().getPointerTy();
17841786 bool isPPC64 = PtrVT == MVT::i64;
20892091 if (isVarArg) {
20902092 int Depth = ArgOffset;
20912093
2092 VarArgsFrameIndex = MFI->CreateFixedObject(PtrVT.getSizeInBits()/8,
2093 Depth, true, false);
2094 SDValue FIN = DAG.getFrameIndex(VarArgsFrameIndex, PtrVT);
2094 FuncInfo->setVarArgsFrameIndex(
2095 MFI->CreateFixedObject(PtrVT.getSizeInBits()/8,
2096 Depth, true, false));
2097 SDValue FIN = DAG.getFrameIndex(FuncInfo->getVarArgsFrameIndex(), PtrVT);
20952098
20962099 // If this function is vararg, store any remaining integer argument regs
20972100 // to their spots on the stack so that they may be loaded by deferencing the
43724375 case ISD::SETCC: return LowerSETCC(Op, DAG);
43734376 case ISD::TRAMPOLINE: return LowerTRAMPOLINE(Op, DAG);
43744377 case ISD::VASTART:
4375 return LowerVASTART(Op, DAG, VarArgsFrameIndex, VarArgsStackOffset,
4376 VarArgsNumGPR, VarArgsNumFPR, PPCSubTarget);
4378 return LowerVASTART(Op, DAG, PPCSubTarget);
43774379
43784380 case ISD::VAARG:
4379 return LowerVAARG(Op, DAG, VarArgsFrameIndex, VarArgsStackOffset,
4380 VarArgsNumGPR, VarArgsNumFPR, PPCSubTarget);
4381 return LowerVAARG(Op, DAG, PPCSubTarget);
43814382
43824383 case ISD::STACKRESTORE: return LowerSTACKRESTORE(Op, DAG, PPCSubTarget);
43834384 case ISD::DYNAMIC_STACKALLOC:
232232 }
233233
234234 class PPCTargetLowering : public TargetLowering {
235 int VarArgsFrameIndex; // FrameIndex for start of varargs area.
236 int VarArgsStackOffset; // StackOffset for start of stack
237 // arguments.
238 unsigned VarArgsNumGPR; // Index of the first unused integer
239 // register for parameter passing.
240 unsigned VarArgsNumFPR; // Index of the first unused double
241 // register for parameter passing.
242235 const PPCSubtarget &PPCSubTarget;
236
243237 public:
244238 explicit PPCTargetLowering(PPCTargetMachine &TM);
245239
395389 SDValue LowerSETCC(SDValue Op, SelectionDAG &DAG);
396390 SDValue LowerTRAMPOLINE(SDValue Op, SelectionDAG &DAG);
397391 SDValue LowerVASTART(SDValue Op, SelectionDAG &DAG,
398 int VarArgsFrameIndex, int VarArgsStackOffset,
399 unsigned VarArgsNumGPR, unsigned VarArgsNumFPR,
400 const PPCSubtarget &Subtarget);
401 SDValue LowerVAARG(SDValue Op, SelectionDAG &DAG, int VarArgsFrameIndex,
402 int VarArgsStackOffset, unsigned VarArgsNumGPR,
403 unsigned VarArgsNumFPR, const PPCSubtarget &Subtarget);
392 const PPCSubtarget &Subtarget);
393 SDValue LowerVAARG(SDValue Op, SelectionDAG &DAG,
394 const PPCSubtarget &Subtarget);
404395 SDValue LowerSTACKRESTORE(SDValue Op, SelectionDAG &DAG,
405396 const PPCSubtarget &Subtarget);
406397 SDValue LowerDYNAMIC_STACKALLOC(SDValue Op, SelectionDAG &DAG,
5757 /// how the caller's stack pointer should be calculated (epilog/dynamicalloc).
5858 bool HasFastCall;
5959
60 /// VarArgsFrameIndex - FrameIndex for start of varargs area.
61 int VarArgsFrameIndex;
62 /// VarArgsStackOffset - StackOffset for start of stack
63 /// arguments.
64 int VarArgsStackOffset;
65 /// VarArgsNumGPR - Index of the first unused integer
66 /// register for parameter passing.
67 unsigned VarArgsNumGPR;
68 /// VarArgsNumFPR - Index of the first unused double
69 /// register for parameter passing.
70 unsigned VarArgsNumFPR;
71
6072 public:
6173 explicit PPCFunctionInfo(MachineFunction &MF)
6274 : FramePointerSaveIndex(0),
6577 LRStoreRequired(false),
6678 MinReservedArea(0),
6779 TailCallSPDelta(0),
68 HasFastCall(false) {}
80 HasFastCall(false),
81 VarArgsFrameIndex(0),
82 VarArgsStackOffset(0),
83 VarArgsNumGPR(0),
84 VarArgsNumFPR(0) {}
6985
7086 int getFramePointerSaveIndex() const { return FramePointerSaveIndex; }
7187 void setFramePointerSaveIndex(int Idx) { FramePointerSaveIndex = Idx; }
95111
96112 void setHasFastCall() { HasFastCall = true; }
97113 bool hasFastCall() const { return HasFastCall;}
114
115 int getVarArgsFrameIndex() const { return VarArgsFrameIndex; }
116 void setVarArgsFrameIndex(int Index) { VarArgsFrameIndex = Index; }
117
118 int getVarArgsStackOffset() const { return VarArgsStackOffset; }
119 void setVarArgsStackOffset(int Offset) { VarArgsStackOffset = Offset; }
120
121 unsigned getVarArgsNumGPR() const { return VarArgsNumGPR; }
122 void setVarArgsNumGPR(unsigned Num) { VarArgsNumGPR = Num; }
123
124 unsigned getVarArgsNumFPR() const { return VarArgsNumFPR; }
125 void setVarArgsNumFPR(unsigned Num) { VarArgsNumFPR = Num; }
98126 };
99127
100128 } // end of namespace llvm
1313
1414 #include "SparcISelLowering.h"
1515 #include "SparcTargetMachine.h"
16 #include "SparcMachineFunctionInfo.h"
1617 #include "llvm/Function.h"
1718 #include "llvm/CodeGen/CallingConvLower.h"
1819 #include "llvm/CodeGen/MachineFrameInfo.h"
8889
8990 MachineFunction &MF = DAG.getMachineFunction();
9091 MachineRegisterInfo &RegInfo = MF.getRegInfo();
92 SparcMachineFunctionInfo *FuncInfo = MF.getInfo();
9193
9294 // Assign locations to all of the incoming arguments.
9395 SmallVector ArgLocs;
225227 // Store remaining ArgRegs to the stack if this is a varargs function.
226228 if (isVarArg) {
227229 // Remember the vararg offset for the va_start implementation.
228 VarArgsFrameOffset = ArgOffset;
230 FuncInfo->setVarArgsFrameOffset(ArgOffset);
229231
230232 std::vector OutChains;
231233
873875
874876 static SDValue LowerVASTART(SDValue Op, SelectionDAG &DAG,
875877 SparcTargetLowering &TLI) {
878 MachineFunction &MF = DAG.getMachineFunction();
879 SparcMachineFunctionInfo *FuncInfo = MF.getInfo();
880
876881 // vastart just stores the address of the VarArgsFrameIndex slot into the
877882 // memory location argument.
878883 DebugLoc dl = Op.getDebugLoc();
879 SDValue Offset = DAG.getNode(ISD::ADD, dl, MVT::i32,
880 DAG.getRegister(SP::I6, MVT::i32),
881 DAG.getConstant(TLI.getVarArgsFrameOffset(),
882 MVT::i32));
884 SDValue Offset =
885 DAG.getNode(ISD::ADD, dl, MVT::i32,
886 DAG.getRegister(SP::I6, MVT::i32),
887 DAG.getConstant(FuncInfo->getVarArgsFrameOffset(),
888 MVT::i32));
883889 const Value *SV = cast(Op.getOperand(2))->getValue();
884890 return DAG.getStore(Op.getOperand(0), dl, Offset, Op.getOperand(1), SV, 0,
885891 false, false, 0);
4040 }
4141
4242 class SparcTargetLowering : public TargetLowering {
43 int VarArgsFrameOffset; // Frame offset to start of varargs area.
4443 public:
4544 SparcTargetLowering(TargetMachine &TM);
4645 virtual SDValue LowerOperation(SDValue Op, SelectionDAG &DAG);
47
48 int getVarArgsFrameOffset() const { return VarArgsFrameOffset; }
4946
5047 /// computeMaskedBitsForTargetNode - Determine which of the bits specified
5148 /// in Mask are known to be either zero or one and return them in the
1919 class SparcMachineFunctionInfo : public MachineFunctionInfo {
2020 private:
2121 unsigned GlobalBaseReg;
22
23 /// VarArgsFrameOffset - Frame offset to start of varargs area.
24 int VarArgsFrameOffset;
25
2226 public:
23 SparcMachineFunctionInfo() : GlobalBaseReg(0) {}
24 explicit SparcMachineFunctionInfo(MachineFunction &MF) : GlobalBaseReg(0) {}
27 SparcMachineFunctionInfo() : GlobalBaseReg(0), VarArgsFrameOffset(0) {}
28 explicit SparcMachineFunctionInfo(MachineFunction &MF)
29 : GlobalBaseReg(0), VarArgsFrameOffset(0) {}
2530
2631 unsigned getGlobalBaseReg() const { return GlobalBaseReg; }
2732 void setGlobalBaseReg(unsigned Reg) { GlobalBaseReg = Reg; }
33
34 int getVarArgsFrameOffset() const { return VarArgsFrameOffset; }
35 void setVarArgsFrameOffset(int Offset) { VarArgsFrameOffset = Offset; }
2836 };
2937 }
3038
12031203 CallingConv::ID CallConv, bool isVarArg,
12041204 const SmallVectorImpl &Outs,
12051205 DebugLoc dl, SelectionDAG &DAG) {
1206 MachineFunction &MF = DAG.getMachineFunction();
1207 X86MachineFunctionInfo *FuncInfo = MF.getInfo();
12061208
12071209 SmallVector RVLocs;
12081210 CCState CCInfo(CallConv, isVarArg, getTargetMachine(),
12201222 SmallVector RetOps;
12211223 RetOps.push_back(Chain); // Operand #0 = Chain (updated below)
12221224 // Operand #1 = Bytes To Pop
1223 RetOps.push_back(DAG.getTargetConstant(getBytesToPopOnReturn(), MVT::i16));
1225 RetOps.push_back(DAG.getTargetConstant(FuncInfo->getBytesToPopOnReturn(),
1226 MVT::i16));
12241227
12251228 // Copy the result values into the output registers.
12261229 for (unsigned i = 0; i != RVLocs.size(); ++i) {
16161619 // the start of the first vararg value... for expansion of llvm.va_start.
16171620 if (isVarArg) {
16181621 if (Is64Bit || CallConv != CallingConv::X86_FastCall) {
1619 VarArgsFrameIndex = MFI->CreateFixedObject(1, StackSize, true, false);
1622 FuncInfo->setVarArgsFrameIndex(MFI->CreateFixedObject(1, StackSize,
1623 true, false));
16201624 }
16211625 if (Is64Bit) {
16221626 unsigned TotalNumIntRegs = 0, TotalNumXMMRegs = 0;
16641668 // For X86-64, if there are vararg parameters that are passed via
16651669 // registers, then we must store them to their spots on the stack so they
16661670 // may be loaded by deferencing the result of va_next.
1667 VarArgsGPOffset = NumIntRegs * 8;
1668 VarArgsFPOffset = TotalNumIntRegs * 8 + NumXMMRegs * 16;
1669 RegSaveFrameIndex = MFI->CreateStackObject(TotalNumIntRegs * 8 +
1670 TotalNumXMMRegs * 16, 16,
1671 false);
1671 FuncInfo->setVarArgsGPOffset(NumIntRegs * 8);
1672 FuncInfo->setVarArgsFPOffset(TotalNumIntRegs * 8 + NumXMMRegs * 16);
1673 FuncInfo->setRegSaveFrameIndex(
1674 MFI->CreateStackObject(TotalNumIntRegs * 8 + TotalNumXMMRegs * 16, 16,
1675 false));
16721676
16731677 // Store the integer parameter registers.
16741678 SmallVector MemOps;
1675 SDValue RSFIN = DAG.getFrameIndex(RegSaveFrameIndex, getPointerTy());
1676 unsigned Offset = VarArgsGPOffset;
1679 SDValue RSFIN = DAG.getFrameIndex(FuncInfo->getRegSaveFrameIndex(),
1680 getPointerTy());
1681 unsigned Offset = FuncInfo->getVarArgsGPOffset();
16771682 for (; NumIntRegs != TotalNumIntRegs; ++NumIntRegs) {
16781683 SDValue FIN = DAG.getNode(ISD::ADD, dl, getPointerTy(), RSFIN,
16791684 DAG.getIntPtrConstant(Offset));
16821687 SDValue Val = DAG.getCopyFromReg(Chain, dl, VReg, MVT::i64);
16831688 SDValue Store =
16841689 DAG.getStore(Val.getValue(1), dl, Val, FIN,
1685 PseudoSourceValue::getFixedStack(RegSaveFrameIndex),
1690 PseudoSourceValue::getFixedStack(
1691 FuncInfo->getRegSaveFrameIndex()),
16861692 Offset, false, false, 0);
16871693 MemOps.push_back(Store);
16881694 Offset += 8;
16971703 SDValue ALVal = DAG.getCopyFromReg(DAG.getEntryNode(), dl, AL, MVT::i8);
16981704 SaveXMMOps.push_back(ALVal);
16991705
1700 SaveXMMOps.push_back(DAG.getIntPtrConstant(RegSaveFrameIndex));
1701 SaveXMMOps.push_back(DAG.getIntPtrConstant(VarArgsFPOffset));
1706 SaveXMMOps.push_back(DAG.getIntPtrConstant(
1707 FuncInfo->getRegSaveFrameIndex()));
1708 SaveXMMOps.push_back(DAG.getIntPtrConstant(
1709 FuncInfo->getVarArgsFPOffset()));
17021710
17031711 for (; NumXMMRegs != TotalNumXMMRegs; ++NumXMMRegs) {
17041712 unsigned VReg = MF.addLiveIn(XMMArgRegs[NumXMMRegs],
17191727
17201728 // Some CCs need callee pop.
17211729 if (IsCalleePop(isVarArg, CallConv)) {
1722 BytesToPopOnReturn = StackSize; // Callee pops everything.
1730 FuncInfo->setBytesToPopOnReturn(StackSize); // Callee pops everything.
17231731 } else {
1724 BytesToPopOnReturn = 0; // Callee pops nothing.
1732 FuncInfo->setBytesToPopOnReturn(0); // Callee pops nothing.
17251733 // If this is an sret function, the return should pop the hidden pointer.
17261734 if (!Is64Bit && !IsTailCallConvention(CallConv) && ArgsAreStructReturn(Ins))
1727 BytesToPopOnReturn = 4;
1735 FuncInfo->setBytesToPopOnReturn(4);
17281736 }
17291737
17301738 if (!Is64Bit) {
1731 RegSaveFrameIndex = 0xAAAAAAA; // RegSaveFrameIndex is X86-64 only.
1739 // RegSaveFrameIndex is X86-64 only.
1740 FuncInfo->setRegSaveFrameIndex(0xAAAAAAA);
17321741 if (CallConv == CallingConv::X86_FastCall)
1733 VarArgsFrameIndex = 0xAAAAAAA; // fastcc functions can't have varargs.
1734 }
1735
1736 FuncInfo->setBytesToPopOnReturn(BytesToPopOnReturn);
1742 // fastcc functions can't have varargs.
1743 FuncInfo->setVarArgsFrameIndex(0xAAAAAAA);
1744 }
17371745
17381746 return Chain;
17391747 }
67756783 }
67766784
67776785 SDValue X86TargetLowering::LowerVASTART(SDValue Op, SelectionDAG &DAG) {
6786 MachineFunction &MF = DAG.getMachineFunction();
6787 X86MachineFunctionInfo *FuncInfo = MF.getInfo();
6788
67786789 const Value *SV = cast(Op.getOperand(2))->getValue();
67796790 DebugLoc dl = Op.getDebugLoc();
67806791
67816792 if (!Subtarget->is64Bit()) {
67826793 // vastart just stores the address of the VarArgsFrameIndex slot into the
67836794 // memory location argument.
6784 SDValue FR = DAG.getFrameIndex(VarArgsFrameIndex, getPointerTy());
6795 SDValue FR = DAG.getFrameIndex(FuncInfo->getVarArgsFrameIndex(),
6796 getPointerTy());
67856797 return DAG.getStore(Op.getOperand(0), dl, FR, Op.getOperand(1), SV, 0,
67866798 false, false, 0);
67876799 }
67956807 SDValue FIN = Op.getOperand(1);
67966808 // Store gp_offset
67976809 SDValue Store = DAG.getStore(Op.getOperand(0), dl,
6798 DAG.getConstant(VarArgsGPOffset, MVT::i32),
6810 DAG.getConstant(FuncInfo->getVarArgsGPOffset(),
6811 MVT::i32),
67996812 FIN, SV, 0, false, false, 0);
68006813 MemOps.push_back(Store);
68016814
68036816 FIN = DAG.getNode(ISD::ADD, dl, getPointerTy(),
68046817 FIN, DAG.getIntPtrConstant(4));
68056818 Store = DAG.getStore(Op.getOperand(0), dl,
6806 DAG.getConstant(VarArgsFPOffset, MVT::i32),
6819 DAG.getConstant(FuncInfo->getVarArgsFPOffset(),
6820 MVT::i32),
68076821 FIN, SV, 0, false, false, 0);
68086822 MemOps.push_back(Store);
68096823
68106824 // Store ptr to overflow_arg_area
68116825 FIN = DAG.getNode(ISD::ADD, dl, getPointerTy(),
68126826 FIN, DAG.getIntPtrConstant(4));
6813 SDValue OVFIN = DAG.getFrameIndex(VarArgsFrameIndex, getPointerTy());
6827 SDValue OVFIN = DAG.getFrameIndex(FuncInfo->getVarArgsFrameIndex(),
6828 getPointerTy());
68146829 Store = DAG.getStore(Op.getOperand(0), dl, OVFIN, FIN, SV, 0,
68156830 false, false, 0);
68166831 MemOps.push_back(Store);
68186833 // Store ptr to reg_save_area.
68196834 FIN = DAG.getNode(ISD::ADD, dl, getPointerTy(),
68206835 FIN, DAG.getIntPtrConstant(8));
6821 SDValue RSFIN = DAG.getFrameIndex(RegSaveFrameIndex, getPointerTy());
6836 SDValue RSFIN = DAG.getFrameIndex(FuncInfo->getRegSaveFrameIndex(),
6837 getPointerTy());
68226838 Store = DAG.getStore(Op.getOperand(0), dl, RSFIN, FIN, SV, 0,
68236839 false, false, 0);
68246840 MemOps.push_back(Store);
373373 //===--------------------------------------------------------------------===//
374374 // X86TargetLowering - X86 Implementation of the TargetLowering interface
375375 class X86TargetLowering : public TargetLowering {
376 int VarArgsFrameIndex; // FrameIndex for start of varargs area.
377 int RegSaveFrameIndex; // X86-64 vararg func register save area.
378 unsigned VarArgsGPOffset; // X86-64 vararg func int reg offset.
379 unsigned VarArgsFPOffset; // X86-64 vararg func fp reg offset.
380 int BytesToPopOnReturn; // Number of arg bytes ret should pop.
381
382376 public:
383377 explicit X86TargetLowering(X86TargetMachine &TM);
384378
400394 getPICJumpTableRelocBaseExpr(const MachineFunction *MF,
401395 unsigned JTI, MCContext &Ctx) const;
402396
403 // Return the number of bytes that a function should pop when it returns (in
404 // addition to the space used by the return address).
405 //
406 unsigned getBytesToPopOnReturn() const { return BytesToPopOnReturn; }
407
408397 /// getStackPtrReg - Return the stack pointer register we are using: either
409398 /// ESP or RSP.
410399 unsigned getStackPtrReg() const { return X86StackPtr; }
3030 /// stack frame in bytes.
3131 unsigned CalleeSavedFrameSize;
3232
33 /// BytesToPopOnReturn - Number of bytes function pops on return.
33 /// BytesToPopOnReturn - Number of bytes function pops on return (in addition
34 /// to the space used by the return address).
3435 /// Used on windows platform for stdcall & fastcall name decoration
3536 unsigned BytesToPopOnReturn;
3637
5556 /// when allocating, even if there may not actually be a frame pointer used.
5657 bool ReserveFP;
5758
59 /// VarArgsFrameIndex - FrameIndex for start of varargs area.
60 int VarArgsFrameIndex;
61 /// RegSaveFrameIndex - X86-64 vararg func register save area.
62 int RegSaveFrameIndex;
63 /// VarArgsGPOffset - X86-64 vararg func int reg offset.
64 unsigned VarArgsGPOffset;
65 /// VarArgsFPOffset - X86-64 vararg func fp reg offset.
66 unsigned VarArgsFPOffset;
67
5868 public:
5969 X86MachineFunctionInfo() : ForceFramePointer(false),
6070 CalleeSavedFrameSize(0),
6272 ReturnAddrIndex(0),
6373 TailCallReturnAddrDelta(0),
6474 SRetReturnReg(0),
65 GlobalBaseReg(0) {}
75 GlobalBaseReg(0),
76 VarArgsFrameIndex(0),
77 RegSaveFrameIndex(0),
78 VarArgsGPOffset(0),
79 VarArgsFPOffset(0) {}
6680
6781 explicit X86MachineFunctionInfo(MachineFunction &MF)
6882 : ForceFramePointer(false),
7286 TailCallReturnAddrDelta(0),
7387 SRetReturnReg(0),
7488 GlobalBaseReg(0),
75 ReserveFP(false) {}
89 ReserveFP(false),
90 VarArgsFrameIndex(0),
91 RegSaveFrameIndex(0),
92 VarArgsGPOffset(0),
93 VarArgsFPOffset(0) {}
7694
7795 bool getForceFramePointer() const { return ForceFramePointer;}
7896 void setForceFramePointer(bool forceFP) { ForceFramePointer = forceFP; }
97115
98116 bool getReserveFP() const { return ReserveFP; }
99117 void setReserveFP(bool reserveFP) { ReserveFP = reserveFP; }
118
119 int getVarArgsFrameIndex() const { return VarArgsFrameIndex; }
120 void setVarArgsFrameIndex(int Idx) { VarArgsFrameIndex = Idx; }
121
122 int getRegSaveFrameIndex() const { return RegSaveFrameIndex; }
123 void setRegSaveFrameIndex(int Idx) { RegSaveFrameIndex = Idx; }
124
125 unsigned getVarArgsGPOffset() const { return VarArgsGPOffset; }
126 void setVarArgsGPOffset(unsigned Offset) { VarArgsGPOffset = Offset; }
127
128 unsigned getVarArgsFPOffset() const { return VarArgsFPOffset; }
129 void setVarArgsFPOffset(unsigned Offset) { VarArgsFPOffset = Offset; }
100130 };
101131
102132 } // End llvm namespace