llvm.org GIT mirror llvm / 1e81966
Remove arm_apcscc from the test files. It is the default and doing this matches what llvm-gcc and clang now produce. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106221 91177308-0d34-0410-b5e6-96231b3b80d8 Rafael Espindola 9 years ago
110 changed file(s) with 375 addition(s) and 375 deletion(s). Raw diff Collapse all Expand all
22 %struct.rtunion = type { i64 }
33 %struct.rtx_def = type { i16, i8, i8, [1 x %struct.rtunion] }
44
5 define arm_apcscc void @simplify_unary_real(i8* nocapture %p) nounwind {
5 define void @simplify_unary_real(i8* nocapture %p) nounwind {
66 entry:
77 %tmp121 = load i64* null, align 4 ; [#uses=1]
88 %0 = getelementptr %struct.rtx_def* null, i32 0, i32 3, i32 3, i32 0 ; [#uses=1]
77 @"\01LC16" = external constant [33 x i8], align 1 ; <[33 x i8]*> [#uses=1]
88 @"\01LC17" = external constant [47 x i8], align 1 ; <[47 x i8]*> [#uses=1]
99
10 declare arm_apcscc i32 @printf(i8* nocapture, ...) nounwind
10 declare i32 @printf(i8* nocapture, ...) nounwind
1111
12 declare arm_apcscc void @diff(i8*, i8*, i32, i32, i32, i32) nounwind
12 declare void @diff(i8*, i8*, i32, i32, i32, i32) nounwind
1313
14 define arm_apcscc void @SIM(i8* %A, i8* %B, i32 %M, i32 %N, i32 %K, [256 x i32]* %V, i32 %Q, i32 %R, i32 %nseq) nounwind {
14 define void @SIM(i8* %A, i8* %B, i32 %M, i32 %N, i32 %K, [256 x i32]* %V, i32 %Q, i32 %R, i32 %nseq) nounwind {
1515 entry:
1616 br i1 undef, label %bb5, label %bb
1717
4343 store i32 0, i32* @no_mat, align 4
4444 store i32 0, i32* @no_mis, align 4
4545 %3 = getelementptr i8* %B, i32 %0 ; [#uses=1]
46 tail call arm_apcscc void @diff(i8* undef, i8* %3, i32 undef, i32 undef, i32 undef, i32 undef) nounwind
46 tail call void @diff(i8* undef, i8* %3, i32 undef, i32 undef, i32 undef, i32 undef) nounwind
4747 %4 = sitofp i32 undef to double ; [#uses=1]
4848 %5 = fdiv double %4, 1.000000e+01 ; [#uses=1]
49 %6 = tail call arm_apcscc i32 (i8*, ...)* @printf(i8* getelementptr ([29 x i8]* @"\01LC12", i32 0, i32 0), double %5) nounwind ; [#uses=0]
49 %6 = tail call i32 (i8*, ...)* @printf(i8* getelementptr ([29 x i8]* @"\01LC12", i32 0, i32 0), double %5) nounwind ; [#uses=0]
5050 %7 = load i32* @al_len, align 4 ; [#uses=1]
5151 %8 = load i32* @no_mat, align 4 ; [#uses=1]
5252 %9 = load i32* @no_mis, align 4 ; [#uses=1]
5353 %10 = sub i32 %7, %8 ; [#uses=1]
5454 %11 = sub i32 %10, %9 ; [#uses=1]
55 %12 = tail call arm_apcscc i32 (i8*, ...)* @printf(i8* getelementptr ([33 x i8]* @"\01LC16", i32 0, i32 0), i32 %11) nounwind ; [#uses=0]
56 %13 = tail call arm_apcscc i32 (i8*, ...)* @printf(i8* getelementptr ([47 x i8]* @"\01LC17", i32 0, i32 0), i32 undef, i32 %1, i32 undef, i32 undef) nounwind ; [#uses=0]
55 %12 = tail call i32 (i8*, ...)* @printf(i8* getelementptr ([33 x i8]* @"\01LC16", i32 0, i32 0), i32 %11) nounwind ; [#uses=0]
56 %13 = tail call i32 (i8*, ...)* @printf(i8* getelementptr ([47 x i8]* @"\01LC17", i32 0, i32 0), i32 undef, i32 %1, i32 undef, i32 undef) nounwind ; [#uses=0]
5757 br i1 undef, label %bb15, label %bb12
5858
5959 bb12: ; preds = %bb11
55 @"\01LC15" = external constant [33 x i8], align 1 ; <[33 x i8]*> [#uses=1]
66 @"\01LC17" = external constant [47 x i8], align 1 ; <[47 x i8]*> [#uses=1]
77
8 declare arm_apcscc i32 @printf(i8* nocapture, ...) nounwind
8 declare i32 @printf(i8* nocapture, ...) nounwind
99
10 declare arm_apcscc void @diff(i8*, i8*, i32, i32, i32, i32) nounwind
10 declare void @diff(i8*, i8*, i32, i32, i32, i32) nounwind
1111
12 define arm_apcscc void @SIM(i8* %A, i8* %B, i32 %M, i32 %N, i32 %K, [256 x i32]* %V, i32 %Q, i32 %R, i32 %nseq) nounwind {
12 define void @SIM(i8* %A, i8* %B, i32 %M, i32 %N, i32 %K, [256 x i32]* %V, i32 %Q, i32 %R, i32 %nseq) nounwind {
1313 entry:
1414 br i1 undef, label %bb5, label %bb
1515
4040 store i32 0, i32* @no_mat, align 4
4141 store i32 0, i32* @no_mis, align 4
4242 %4 = getelementptr i8* %B, i32 %0 ; [#uses=1]
43 tail call arm_apcscc void @diff(i8* undef, i8* %4, i32 undef, i32 %3, i32 undef, i32 undef) nounwind
44 %5 = tail call arm_apcscc i32 (i8*, ...)* @printf(i8* getelementptr ([33 x i8]* @"\01LC11", i32 0, i32 0), i32 %tmp13) nounwind ; [#uses=0]
43 tail call void @diff(i8* undef, i8* %4, i32 undef, i32 %3, i32 undef, i32 undef) nounwind
44 %5 = tail call i32 (i8*, ...)* @printf(i8* getelementptr ([33 x i8]* @"\01LC11", i32 0, i32 0), i32 %tmp13) nounwind ; [#uses=0]
4545 %6 = load i32* @no_mis, align 4 ; [#uses=1]
46 %7 = tail call arm_apcscc i32 (i8*, ...)* @printf(i8* getelementptr ([33 x i8]* @"\01LC15", i32 0, i32 0), i32 %6) nounwind ; [#uses=0]
47 %8 = tail call arm_apcscc i32 (i8*, ...)* @printf(i8* getelementptr ([47 x i8]* @"\01LC17", i32 0, i32 0), i32 undef, i32 %1, i32 undef, i32 %2) nounwind ; [#uses=0]
46 %7 = tail call i32 (i8*, ...)* @printf(i8* getelementptr ([33 x i8]* @"\01LC15", i32 0, i32 0), i32 %6) nounwind ; [#uses=0]
47 %8 = tail call i32 (i8*, ...)* @printf(i8* getelementptr ([47 x i8]* @"\01LC17", i32 0, i32 0), i32 undef, i32 %1, i32 undef, i32 %2) nounwind ; [#uses=0]
4848 br i1 undef, label %bb15, label %bb12
4949
5050 bb12: ; preds = %bb11
11
22 @JJ = external global i32* ; [#uses=1]
33
4 define arm_apcscc void @SIM(i8* %A, i8* %B, i32 %M, i32 %N, i32 %K, [256 x i32]* %V, i32 %Q, i32 %R, i32 %nseq) nounwind {
4 define void @SIM(i8* %A, i8* %B, i32 %M, i32 %N, i32 %K, [256 x i32]* %V, i32 %Q, i32 %R, i32 %nseq) nounwind {
55 entry:
66 br i1 undef, label %bb5, label %bb
77
55 @no_mis = external global i32 ; [#uses=1]
66 @name1 = external global i8* ; [#uses=1]
77
8 declare arm_apcscc void @diff(i8*, i8*, i32, i32, i32, i32) nounwind
8 declare void @diff(i8*, i8*, i32, i32, i32, i32) nounwind
99
10 define arm_apcscc void @SIM(i8* %A, i8* %B, i32 %M, i32 %N, i32 %K, [256 x i32]* %V, i32 %Q, i32 %R, i32 %nseq) nounwind {
10 define void @SIM(i8* %A, i8* %B, i32 %M, i32 %N, i32 %K, [256 x i32]* %V, i32 %Q, i32 %R, i32 %nseq) nounwind {
1111 entry:
1212 br i1 undef, label %bb5, label %bb
1313
3434 store i32 0, i32* @no_mis, align 4
3535 %1 = getelementptr i8* %A, i32 0 ; [#uses=1]
3636 %2 = getelementptr i8* %B, i32 0 ; [#uses=1]
37 tail call arm_apcscc void @diff(i8* %1, i8* %2, i32 undef, i32 undef, i32 undef, i32 undef) nounwind
37 tail call void @diff(i8* %1, i8* %2, i32 undef, i32 undef, i32 undef, i32 undef) nounwind
3838 br i1 undef, label %bb15, label %bb12
3939
4040 bb12: ; preds = %bb11
11
22 @XX = external global i32* ; [#uses=1]
33
4 define arm_apcscc void @SIM(i8* %A, i8* %B, i32 %M, i32 %N, i32 %K, [256 x i32]* %V, i32 %Q, i32 %R, i32 %nseq) nounwind {
4 define void @SIM(i8* %A, i8* %B, i32 %M, i32 %N, i32 %K, [256 x i32]* %V, i32 %Q, i32 %R, i32 %nseq) nounwind {
55 entry:
66 br i1 undef, label %bb5, label %bb
77
33 @II = external global i32* ; [#uses=1]
44 @JJ = external global i32* ; [#uses=1]
55
6 define arm_apcscc void @SIM(i8* %A, i8* %B, i32 %M, i32 %N, i32 %K, [256 x i32]* %V, i32 %Q, i32 %R, i32 %nseq) nounwind {
6 define void @SIM(i8* %A, i8* %B, i32 %M, i32 %N, i32 %K, [256 x i32]* %V, i32 %Q, i32 %R, i32 %nseq) nounwind {
77 entry:
88 br i1 undef, label %bb5, label %bb
99
77 @_2E_str7 = internal constant [21 x i8] c"ERROR: Only 1 point!\00", section "__TEXT,__cstring,cstring_literals", align 1 ; <[21 x i8]*> [#uses=1]
88 @llvm.used = appending global [1 x i8*] [i8* bitcast (void (%struct.EDGE_PAIR*, %struct.VERTEX*, %struct.VERTEX*)* @build_delaunay to i8*)], section "llvm.metadata" ; <[1 x i8*]*> [#uses=0]
99
10 define arm_apcscc void @build_delaunay(%struct.EDGE_PAIR* noalias nocapture sret %agg.result, %struct.VERTEX* %tree, %struct.VERTEX* %extra) nounwind {
10 define void @build_delaunay(%struct.EDGE_PAIR* noalias nocapture sret %agg.result, %struct.VERTEX* %tree, %struct.VERTEX* %extra) nounwind {
1111 entry:
1212 %delright = alloca %struct.EDGE_PAIR, align 8 ; <%struct.EDGE_PAIR*> [#uses=3]
1313 %delleft = alloca %struct.EDGE_PAIR, align 8 ; <%struct.EDGE_PAIR*> [#uses=3]
2828 br i1 %6, label %get_low.exit, label %bb1.i
2929
3030 get_low.exit: ; preds = %bb1.i
31 call arm_apcscc void @build_delaunay(%struct.EDGE_PAIR* noalias sret %delright, %struct.VERTEX* %2, %struct.VERTEX* %extra) nounwind
31 call void @build_delaunay(%struct.EDGE_PAIR* noalias sret %delright, %struct.VERTEX* %2, %struct.VERTEX* %extra) nounwind
3232 %7 = getelementptr %struct.VERTEX* %tree, i32 0, i32 1 ; <%struct.VERTEX**> [#uses=1]
3333 %8 = load %struct.VERTEX** %7, align 4 ; <%struct.VERTEX*> [#uses=1]
34 call arm_apcscc void @build_delaunay(%struct.EDGE_PAIR* noalias sret %delleft, %struct.VERTEX* %8, %struct.VERTEX* %tree) nounwind
34 call void @build_delaunay(%struct.EDGE_PAIR* noalias sret %delleft, %struct.VERTEX* %8, %struct.VERTEX* %tree) nounwind
3535 %9 = getelementptr %struct.EDGE_PAIR* %delleft, i32 0, i32 0 ; <%struct.edge_rec**> [#uses=1]
3636 %10 = load %struct.edge_rec** %9, align 8 ; <%struct.edge_rec*> [#uses=2]
3737 %11 = getelementptr %struct.EDGE_PAIR* %delleft, i32 0, i32 1 ; <%struct.edge_rec**> [#uses=1]
140140 %85 = inttoptr i32 %84 to %struct.edge_rec* ; <%struct.edge_rec*> [#uses=1]
141141 %86 = getelementptr %struct.edge_rec* %ldi_addr.0.i, i32 0, i32 0 ; <%struct.VERTEX**> [#uses=1]
142142 %87 = load %struct.VERTEX** %86, align 4 ; <%struct.VERTEX*> [#uses=1]
143 %88 = call arm_apcscc %struct.edge_rec* @alloc_edge() nounwind ; <%struct.edge_rec*> [#uses=6]
143 %88 = call %struct.edge_rec* @alloc_edge() nounwind ; <%struct.edge_rec*> [#uses=6]
144144 %89 = getelementptr %struct.edge_rec* %88, i32 0, i32 1 ; <%struct.edge_rec**> [#uses=4]
145145 store %struct.edge_rec* %88, %struct.edge_rec** %89, align 4
146146 %90 = getelementptr %struct.edge_rec* %88, i32 0, i32 0 ; <%struct.VERTEX**> [#uses=2]
779779 %592 = and i32 %589, -64 ; [#uses=1]
780780 %593 = or i32 %591, %592 ; [#uses=1]
781781 %594 = inttoptr i32 %593 to %struct.edge_rec* ; <%struct.edge_rec*> [#uses=1]
782 %595 = call arm_apcscc %struct.edge_rec* @alloc_edge() nounwind ; <%struct.edge_rec*> [#uses=5]
782 %595 = call %struct.edge_rec* @alloc_edge() nounwind ; <%struct.edge_rec*> [#uses=5]
783783 %596 = getelementptr %struct.edge_rec* %595, i32 0, i32 1 ; <%struct.edge_rec**> [#uses=4]
784784 store %struct.edge_rec* %595, %struct.edge_rec** %596, align 4
785785 %597 = getelementptr %struct.edge_rec* %595, i32 0, i32 0 ; <%struct.VERTEX**> [#uses=1]
881881 %677 = and i32 %674, -64 ; [#uses=1]
882882 %678 = or i32 %676, %677 ; [#uses=1]
883883 %679 = inttoptr i32 %678 to %struct.edge_rec* ; <%struct.edge_rec*> [#uses=1]
884 %680 = call arm_apcscc %struct.edge_rec* @alloc_edge() nounwind ; <%struct.edge_rec*> [#uses=4]
884 %680 = call %struct.edge_rec* @alloc_edge() nounwind ; <%struct.edge_rec*> [#uses=4]
885885 %681 = getelementptr %struct.edge_rec* %680, i32 0, i32 1 ; <%struct.edge_rec**> [#uses=5]
886886 store %struct.edge_rec* %680, %struct.edge_rec** %681, align 4
887887 %682 = getelementptr %struct.edge_rec* %680, i32 0, i32 0 ; <%struct.VERTEX**> [#uses=1]
10041004 %762 = getelementptr %struct.VERTEX* %tree, i32 0, i32 1 ; <%struct.VERTEX**> [#uses=1]
10051005 %763 = load %struct.VERTEX** %762, align 4 ; <%struct.VERTEX*> [#uses=4]
10061006 %764 = icmp eq %struct.VERTEX* %763, null ; [#uses=1]
1007 %765 = call arm_apcscc %struct.edge_rec* @alloc_edge() nounwind ; <%struct.edge_rec*> [#uses=5]
1007 %765 = call %struct.edge_rec* @alloc_edge() nounwind ; <%struct.edge_rec*> [#uses=5]
10081008 %766 = getelementptr %struct.edge_rec* %765, i32 0, i32 1 ; <%struct.edge_rec**> [#uses=4]
10091009 store %struct.edge_rec* %765, %struct.edge_rec** %766, align 4
10101010 %767 = getelementptr %struct.edge_rec* %765, i32 0, i32 0 ; <%struct.VERTEX**> [#uses=3]
10111011 br i1 %764, label %bb10, label %bb11
10121012
10131013 bb8: ; preds = %entry
1014 %768 = call arm_apcscc i32 @puts(i8* getelementptr ([21 x i8]* @_2E_str7, i32 0, i32 0)) nounwind ; [#uses=0]
1015 call arm_apcscc void @exit(i32 -1) noreturn nounwind
1014 %768 = call i32 @puts(i8* getelementptr ([21 x i8]* @_2E_str7, i32 0, i32 0)) nounwind ; [#uses=0]
1015 call void @exit(i32 -1) noreturn nounwind
10161016 unreachable
10171017
10181018 bb10: ; preds = %bb7
10521052 store %struct.VERTEX* %tree, %struct.VERTEX** %790, align 4
10531053 %791 = getelementptr %struct.edge_rec* %785, i32 0, i32 1 ; <%struct.edge_rec**> [#uses=1]
10541054 store %struct.edge_rec* %783, %struct.edge_rec** %791, align 4
1055 %792 = call arm_apcscc %struct.edge_rec* @alloc_edge() nounwind ; <%struct.edge_rec*> [#uses=4]
1055 %792 = call %struct.edge_rec* @alloc_edge() nounwind ; <%struct.edge_rec*> [#uses=4]
10561056 %793 = getelementptr %struct.edge_rec* %792, i32 0, i32 1 ; <%struct.edge_rec**> [#uses=4]
10571057 store %struct.edge_rec* %792, %struct.edge_rec** %793, align 4
10581058 %794 = getelementptr %struct.edge_rec* %792, i32 0, i32 0 ; <%struct.VERTEX**> [#uses=1]
11161116 %843 = or i32 %841, %842 ; [#uses=1]
11171117 %844 = inttoptr i32 %843 to %struct.edge_rec* ; <%struct.edge_rec*> [#uses=1]
11181118 %845 = load %struct.VERTEX** %767, align 4 ; <%struct.VERTEX*> [#uses=1]
1119 %846 = call arm_apcscc %struct.edge_rec* @alloc_edge() nounwind ; <%struct.edge_rec*> [#uses=4]
1119 %846 = call %struct.edge_rec* @alloc_edge() nounwind ; <%struct.edge_rec*> [#uses=4]
11201120 %847 = getelementptr %struct.edge_rec* %846, i32 0, i32 1 ; <%struct.edge_rec**> [#uses=7]
11211121 store %struct.edge_rec* %846, %struct.edge_rec** %847, align 4
11221122 %848 = getelementptr %struct.edge_rec* %846, i32 0, i32 0 ; <%struct.VERTEX**> [#uses=1]
13151315 ret void
13161316 }
13171317
1318 declare arm_apcscc i32 @puts(i8* nocapture) nounwind
1319
1320 declare arm_apcscc void @exit(i32) noreturn nounwind
1321
1322 declare arm_apcscc %struct.edge_rec* @alloc_edge() nounwind
1318 declare i32 @puts(i8* nocapture) nounwind
1319
1320 declare void @exit(i32) noreturn nounwind
1321
1322 declare %struct.edge_rec* @alloc_edge() nounwind
55 %struct.cli_bm_patt = type { i8*, i8*, i16, i16, i8*, i8*, i8, %struct.cli_bm_patt*, i16 }
66 %struct.cli_matcher = type { i16, i8, i8*, %struct.cli_bm_patt**, i32*, i32, i8, i8, %struct.cli_ac_node*, %struct.cli_ac_node**, %struct.cli_ac_patt**, i32, i32, i32 }
77
8 declare arm_apcscc i32 @strlen(i8* nocapture) nounwind readonly
8 declare i32 @strlen(i8* nocapture) nounwind readonly
99
10 define arm_apcscc i32 @cli_ac_addsig(%struct.cli_matcher* nocapture %root, i8* %virname, i8* %hexsig, i32 %sigid, i16 zeroext %parts, i16 zeroext %partno, i16 zeroext %type, i32 %mindist, i32 %maxdist, i8* %offset, i8 zeroext %target) nounwind {
10 define i32 @cli_ac_addsig(%struct.cli_matcher* nocapture %root, i8* %virname, i8* %hexsig, i32 %sigid, i16 zeroext %parts, i16 zeroext %partno, i16 zeroext %type, i32 %mindist, i32 %maxdist, i8* %offset, i8 zeroext %target) nounwind {
1111 entry:
1212 br i1 undef, label %bb126, label %bb1
1313
8585 %0 = load i16* undef, align 4 ; [#uses=1]
8686 %1 = icmp eq i16 %0, 0 ; [#uses=1]
8787 %iftmp.20.0 = select i1 %1, i8* %hexsig, i8* null ; [#uses=1]
88 %2 = tail call arm_apcscc i32 @strlen(i8* %iftmp.20.0) nounwind readonly ; [#uses=0]
88 %2 = tail call i32 @strlen(i8* %iftmp.20.0) nounwind readonly ; [#uses=0]
8989 unreachable
9090
9191 bb126: ; preds = %entry
55 %struct.cli_bm_patt = type { i8*, i8*, i16, i16, i8*, i8*, i8, %struct.cli_bm_patt*, i16 }
66 %struct.cli_matcher = type { i16, i8, i8*, %struct.cli_bm_patt**, i32*, i32, i8, i8, %struct.cli_ac_node*, %struct.cli_ac_node**, %struct.cli_ac_patt**, i32, i32, i32 }
77
8 define arm_apcscc i32 @cli_ac_addsig(%struct.cli_matcher* nocapture %root, i8* %virname, i8* %hexsig, i32 %sigid, i16 zeroext %parts, i16 zeroext %partno, i16 zeroext %type, i32 %mindist, i32 %maxdist, i8* %offset, i8 zeroext %target) nounwind {
8 define i32 @cli_ac_addsig(%struct.cli_matcher* nocapture %root, i8* %virname, i8* %hexsig, i32 %sigid, i16 zeroext %parts, i16 zeroext %partno, i16 zeroext %type, i32 %mindist, i32 %maxdist, i8* %offset, i8 zeroext %target) nounwind {
99 entry:
1010 br i1 undef, label %bb126, label %bb1
1111
33
44 declare double @llvm.exp.f64(double) nounwind readonly
55
6 define arm_apcscc void @findratio(double* nocapture %res1, double* nocapture %res2) nounwind {
6 define void @findratio(double* nocapture %res1, double* nocapture %res2) nounwind {
77 entry:
88 br label %bb
99
33 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:32-f32:32:32-f64:32:32-v64:64:64-v128:128:128-a0:0:64"
44 target triple = "armv7-apple-darwin9"
55
6 define arm_apcscc <4 x i32> @scale(<4 x i32> %v, i32 %f) nounwind {
6 define <4 x i32> @scale(<4 x i32> %v, i32 %f) nounwind {
77 entry:
88 %v_addr = alloca <4 x i32> ; <<4 x i32>*> [#uses=2]
99 %f_addr = alloca i32 ; [#uses=2]
66 %struct.tree = type { i32, double, double, %struct.tree*, %struct.tree*, %struct.tree*, %struct.tree* }
77 @g = common global %struct.tree* null
88
9 define arm_apcscc %struct.tree* @tsp(%struct.tree* %t, i32 %nproc) nounwind {
9 define %struct.tree* @tsp(%struct.tree* %t, i32 %nproc) nounwind {
1010 entry:
1111 %t.idx51.val.i = load double* null ; [#uses=1]
1212 br i1 undef, label %bb4.i, label %bb.i
88 %struct.icstruct = type { [3 x i32], i16 }
99 %struct.node = type { i16, double, [3 x double], i32, i32 }
1010
11 declare arm_apcscc double @floor(double) nounwind readnone
11 declare double @floor(double) nounwind readnone
1212
1313 define void @intcoord(%struct.icstruct* noalias nocapture sret %agg.result, i1 %a, double %b) {
1414 entry:
2727 br i1 %a, label %bb11, label %bb9
2828
2929 bb9: ; preds = %bb7
30 %0 = tail call arm_apcscc double @floor(double %b) nounwind readnone ; [#uses=0]
30 %0 = tail call double @floor(double %b) nounwind readnone ; [#uses=0]
3131 br label %bb11
3232
3333 bb11: ; preds = %bb9, %bb7
88 %struct.Patient = type { i32, i32, i32, %struct.Village* }
99 %struct.Village = type { [4 x %struct.Village*], %struct.Village*, %struct.List, %struct.Hosp, i32, i32 }
1010
11 define arm_apcscc %struct.Village* @alloc_tree(i32 %level, i32 %label, %struct.Village* %back, i1 %p) nounwind {
11 define %struct.Village* @alloc_tree(i32 %level, i32 %label, %struct.Village* %back, i1 %p) nounwind {
1212 entry:
1313 br i1 %p, label %bb8, label %bb1
1414
77 @.str1 = external constant [31 x i8], align 1 ; <[31 x i8]*> [#uses=1]
88 @.str2 = external constant [4 x i8], align 1 ; <[4 x i8]*> [#uses=1]
99
10 declare arm_apcscc i32 @getUnknown(i32, ...) nounwind
10 declare i32 @getUnknown(i32, ...) nounwind
1111
1212 declare void @llvm.va_start(i8*) nounwind
1313
1414 declare void @llvm.va_end(i8*) nounwind
1515
16 declare arm_apcscc i32 @printf(i8* nocapture, ...) nounwind
16 declare i32 @printf(i8* nocapture, ...) nounwind
1717
18 define arm_apcscc i32 @main() nounwind {
18 define i32 @main() nounwind {
1919 entry:
20 %0 = tail call arm_apcscc i32 (i8*, ...)* @printf(i8* getelementptr ([31 x i8]* @.str1, i32 0, i32 0), i32 1, i32 1, i32 1, i32 1, i32 1, i32 1) nounwind ; [#uses=0]
21 %1 = tail call arm_apcscc i32 (i8*, ...)* @printf(i8* getelementptr ([31 x i8]* @.str1, i32 0, i32 0), i32 -128, i32 116, i32 116, i32 -3852, i32 -31232, i32 -1708916736) nounwind ; [#uses=0]
22 %2 = tail call arm_apcscc i32 (i32, ...)* @getUnknown(i32 undef, i32 116, i32 116, i32 -3852, i32 -31232, i32 30556, i32 -1708916736) nounwind ; [#uses=1]
23 %3 = tail call arm_apcscc i32 (i8*, ...)* @printf(i8* getelementptr ([4 x i8]* @.str2, i32 0, i32 0), i32 %2) nounwind ; [#uses=0]
20 %0 = tail call i32 (i8*, ...)* @printf(i8* getelementptr ([31 x i8]* @.str1, i32 0, i32 0), i32 1, i32 1, i32 1, i32 1, i32 1, i32 1) nounwind ; [#uses=0]
21 %1 = tail call i32 (i8*, ...)* @printf(i8* getelementptr ([31 x i8]* @.str1, i32 0, i32 0), i32 -128, i32 116, i32 116, i32 -3852, i32 -31232, i32 -1708916736) nounwind ; [#uses=0]
22 %2 = tail call i32 (i32, ...)* @getUnknown(i32 undef, i32 116, i32 116, i32 -3852, i32 -31232, i32 30556, i32 -1708916736) nounwind ; [#uses=1]
23 %3 = tail call i32 (i8*, ...)* @printf(i8* getelementptr ([4 x i8]* @.str2, i32 0, i32 0), i32 %2) nounwind ; [#uses=0]
2424 ret i32 0
2525 }
99
1010 declare <2 x i32> @llvm.arm.neon.vpadd.v2i32(<2 x i32>, <2 x i32>) nounwind readnone
1111
12 define arm_apcscc void @_ZN6squish10ClusterFit9Compress3EPv(%quuz* %this, i8* %block) {
12 define void @_ZN6squish10ClusterFit9Compress3EPv(%quuz* %this, i8* %block) {
1313 entry:
1414 %0 = lshr <4 x i32> zeroinitializer, ; <<4 x i32>> [#uses=1]
1515 %1 = shufflevector <4 x i32> %0, <4 x i32> undef, <2 x i32> ; <<2 x i32>> [#uses=1]
77 %quux = type { i32 (...)**, %baz*, i32 }
88 %quuz = type { %quux, i32, %bar, [128 x i8], [16 x %foo], %foo, %foo, %foo }
99
10 define arm_apcscc void @aaaa(%quuz* %this, i8* %block) {
10 define void @aaaa(%quuz* %this, i8* %block) {
1111 entry:
1212 br i1 undef, label %bb.nph269, label %bb201
1313
11 target datalayout = "e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:32:32-f32:32:32-f64:32:32-v64:64:64-v128:128:128-a0:0:32"
22 target triple = "thumbv7-elf"
33
4 define arm_apcscc void @foo() nounwind {
4 define void @foo() nounwind {
55 entry:
66 %0 = tail call <2 x float> @llvm.arm.neon.vpadd.v2f32(<2 x float> undef, <2 x float> undef) nounwind ; <<2 x float>> [#uses=1]
77 %tmp28 = extractelement <2 x float> %0, i32 0 ; [#uses=1]
11 target datalayout = "e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:32:32-f32:32:32-f64:32:32-v64:64:64-v128:128:128-a0:0:32"
22 target triple = "thumbv7-elf"
33
4 define arm_apcscc void @aaa() nounwind {
4 define void @aaa() nounwind {
55 entry:
66 %0 = fmul <4 x float> undef, ; <<4 x float>> [#uses=1]
77 %tmp31 = extractelement <4 x float> %0, i32 0 ; [#uses=1]
11
22 %struct.A = type { i32* }
33
4 define arm_apcscc void @"\01-[MyFunction Name:]"() {
4 define void @"\01-[MyFunction Name:]"() {
55 entry:
66 %save_filt.1 = alloca i32 ; [#uses=2]
77 %save_eptr.0 = alloca i8* ; [#uses=2]
99 %eh_exception = alloca i8* ; [#uses=5]
1010 %eh_selector = alloca i32 ; [#uses=3]
1111 %"alloca point" = bitcast i32 0 to i32 ; [#uses=0]
12 call arm_apcscc void @_ZN1AC1Ev(%struct.A* %a)
13 invoke arm_apcscc void @_Z3barv()
12 call void @_ZN1AC1Ev(%struct.A* %a)
13 invoke void @_Z3barv()
1414 to label %invcont unwind label %lpad
1515
1616 invcont: ; preds = %entry
17 call arm_apcscc void @_ZN1AD1Ev(%struct.A* %a) nounwind
17 call void @_ZN1AD1Ev(%struct.A* %a) nounwind
1818 br label %return
1919
2020 bb: ; preds = %ppad
2222 store i32 %eh_select, i32* %save_filt.1, align 4
2323 %eh_value = load i8** %eh_exception ; [#uses=1]
2424 store i8* %eh_value, i8** %save_eptr.0, align 4
25 call arm_apcscc void @_ZN1AD1Ev(%struct.A* %a) nounwind
25 call void @_ZN1AD1Ev(%struct.A* %a) nounwind
2626 %0 = load i8** %save_eptr.0, align 4 ; [#uses=1]
2727 store i8* %0, i8** %eh_exception, align 4
2828 %1 = load i32* %save_filt.1, align 4 ; [#uses=1]
4545
4646 Unwind: ; preds = %bb
4747 %eh_ptr3 = load i8** %eh_exception ; [#uses=1]
48 call arm_apcscc void @_Unwind_SjLj_Resume(i8* %eh_ptr3)
48 call void @_Unwind_SjLj_Resume(i8* %eh_ptr3)
4949 unreachable
5050 }
5151
52 define linkonce_odr arm_apcscc void @_ZN1AC1Ev(%struct.A* %this) {
52 define linkonce_odr void @_ZN1AC1Ev(%struct.A* %this) {
5353 entry:
5454 %this_addr = alloca %struct.A* ; <%struct.A**> [#uses=2]
5555 %"alloca point" = bitcast i32 0 to i32 ; [#uses=0]
5656 store %struct.A* %this, %struct.A** %this_addr
57 %0 = call arm_apcscc i8* @_Znwm(i32 4) ; [#uses=1]
57 %0 = call i8* @_Znwm(i32 4) ; [#uses=1]
5858 %1 = bitcast i8* %0 to i32* ; [#uses=1]
5959 %2 = load %struct.A** %this_addr, align 4 ; <%struct.A*> [#uses=1]
6060 %3 = getelementptr inbounds %struct.A* %2, i32 0, i32 0 ; [#uses=1]
6565 ret void
6666 }
6767
68 declare arm_apcscc i8* @_Znwm(i32)
68 declare i8* @_Znwm(i32)
6969
70 define linkonce_odr arm_apcscc void @_ZN1AD1Ev(%struct.A* %this) nounwind {
70 define linkonce_odr void @_ZN1AD1Ev(%struct.A* %this) nounwind {
7171 entry:
7272 %this_addr = alloca %struct.A* ; <%struct.A**> [#uses=2]
7373 %"alloca point" = bitcast i32 0 to i32 ; [#uses=0]
7676 %1 = getelementptr inbounds %struct.A* %0, i32 0, i32 0 ; [#uses=1]
7777 %2 = load i32** %1, align 4 ; [#uses=1]
7878 %3 = bitcast i32* %2 to i8* ; [#uses=1]
79 call arm_apcscc void @_ZdlPv(i8* %3) nounwind
79 call void @_ZdlPv(i8* %3) nounwind
8080 br label %bb
8181
8282 bb: ; preds = %entry
8787 }
8888 ;CHECK: L_LSDA_0:
8989
90 declare arm_apcscc void @_ZdlPv(i8*) nounwind
90 declare void @_ZdlPv(i8*) nounwind
9191
92 declare arm_apcscc void @_Z3barv()
92 declare void @_Z3barv()
9393
9494 declare i8* @llvm.eh.exception() nounwind
9595
9797
9898 declare i32 @llvm.eh.typeid.for.i32(i8*) nounwind
9999
100 declare arm_apcscc i32 @__gxx_personality_sj0(...)
100 declare i32 @__gxx_personality_sj0(...)
101101
102 declare arm_apcscc void @_Unwind_SjLj_Resume(i8*)
102 declare void @_Unwind_SjLj_Resume(i8*)
2929 @.str218 = private constant [6 x i8] c"%7d%c\00", align 1 ; <[6 x i8]*> [#uses=1]
3030 @.str319 = private constant [30 x i8] c"Failed to allocate %u bytes.\0A\00", align 1 ; <[30 x i8]*> [#uses=1]
3131
32 declare arm_apcscc i32 @puts(i8* nocapture) nounwind
32 declare i32 @puts(i8* nocapture) nounwind
3333
34 declare arm_apcscc i32 @getchar() nounwind
34 declare i32 @getchar() nounwind
3535
36 define internal arm_apcscc i32 @transpose() nounwind readonly {
36 define internal i32 @transpose() nounwind readonly {
3737 ; CHECK: push
3838 entry:
3939 %0 = load i32* getelementptr inbounds ([128 x i32]* @columns, i32 0, i32 1), align 4 ; [#uses=1]
100100 ret i32 -128
101101 }
102102
103 declare arm_apcscc noalias i8* @calloc(i32, i32) nounwind
103 declare noalias i8* @calloc(i32, i32) nounwind
104104
105105 declare void @llvm.memset.i64(i8* nocapture, i8, i64, i32) nounwind
11 target datalayout = "e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:32:32-f32:32:32-f64:32:32-v64:64:64-v128:128:128-a0:0:32"
22 target triple = "thumbv7-elf"
33
4 define arm_apcscc void @foo() {
4 define void @foo() {
55 entry:
66 %0 = insertelement <4 x i32> undef, i32 -1, i32 3
77 store <4 x i32> %0, <4 x i32>* undef, align 16
0 ; RUN: llc < %s -march=arm -mattr=+neon | FileCheck %s
11 ; pr4926
22
3 define arm_apcscc void @test_vget_lanep16() nounwind {
3 define void @test_vget_lanep16() nounwind {
44 entry:
55 %arg0_poly16x4_t = alloca <4 x i16> ; <<4 x i16>*> [#uses=1]
66 %out_poly16_t = alloca i16 ; [#uses=1]
55 %struct.int16x8_t = type { <8 x i16> }
66 %struct.int16x8x2_t = type { [2 x %struct.int16x8_t] }
77
8 define arm_apcscc void @t(%struct.int16x8x2_t* noalias nocapture sret %agg.result, <8 x i16> %tmp.0, %struct.int16x8x2_t* nocapture %dst) nounwind {
8 define void @t(%struct.int16x8x2_t* noalias nocapture sret %agg.result, <8 x i16> %tmp.0, %struct.int16x8x2_t* nocapture %dst) nounwind {
99 entry:
1010 ;CHECK: vtrn.16
1111 %0 = shufflevector <8 x i16> %tmp.0, <8 x i16> undef, <8 x i32>
0 ; RUN: llc -march=arm -mattr=+neon < %s
11 ; Radar 7770501: Don't crash on SELECT and SELECT_CC with NEON vector values.
22
3 define arm_apcscc void @vDSP_FFT16_copv(float* nocapture %O, float* nocapture %I, i32 %Direction) nounwind {
3 define void @vDSP_FFT16_copv(float* nocapture %O, float* nocapture %I, i32 %Direction) nounwind {
44 entry:
55 %.22 = select i1 undef, <4 x float> undef, <4 x float> zeroinitializer ; <<4 x float>> [#uses=1]
66 %0 = fadd <4 x float> undef, %.22 ; <<4 x float>> [#uses=1]
0 ; RUN: llc < %s -mtriple=arm-apple-darwin -mcpu=cortex-a8
11 ; Radar 7855014
22
3 define arm_apcscc void @test1(i32 %f0, i32 %f1, i32 %f2, <4 x i32> %f3) nounwind {
3 define void @test1(i32 %f0, i32 %f1, i32 %f2, <4 x i32> %f3) nounwind {
44 entry:
55 unreachable
66 }
0 ; RUN: llc < %s -march=arm -mcpu=arm1136jf-s
11 ; Radar 7854640
22
3 define arm_apcscc void @test() nounwind {
3 define void @test() nounwind {
44 bb:
55 br i1 undef, label %bb9, label %bb10
66
22 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:32-f32:32:32-f64:32:32-v64:64:64-v128:128:128-a0:0:64-n32"
33 target triple = "armv4t-apple-darwin10"
44
5 define hidden arm_apcscc i32 @__addvsi3(i32 %a, i32 %b) nounwind {
5 define hidden i32 @__addvsi3(i32 %a, i32 %b) nounwind {
66 entry:
77 tail call void @llvm.dbg.value(metadata !{i32 %b}, i64 0, metadata !0)
88 %0 = add nsw i32 %b, %a, !dbg !9 ; [#uses=1]
99
1010 @.str = external constant [1 x i8] ; <[1 x i8]*> [#uses=1]
1111
12 define arm_apcscc void @yy(%struct.q* %qq) nounwind {
12 define void @yy(%struct.q* %qq) nounwind {
1313 entry:
1414 %vla6 = alloca i8, i32 undef, align 1 ; [#uses=1]
1515 %vla10 = alloca i8, i32 undef, align 1 ; [#uses=1]
1818 %tmp21 = load i32* undef ; [#uses=1]
1919 %0 = mul i32 1, %tmp21 ; [#uses=1]
2020 %vla22 = alloca i8, i32 %0, align 1 ; [#uses=1]
21 call arm_apcscc void (...)* @zz(i8* getelementptr inbounds ([1 x i8]* @.str, i32 0, i32 0), i32 2, i32 1)
21 call void (...)* @zz(i8* getelementptr inbounds ([1 x i8]* @.str, i32 0, i32 0), i32 2, i32 1)
2222 br i1 undef, label %if.then, label %if.end36
2323
2424 if.then: ; preds = %entry
25 %call = call arm_apcscc i32 (...)* @x(%struct.q* undef, i8* undef, i8* %vla6, i8* %vla10, i32 undef) ; [#uses=0]
26 %call35 = call arm_apcscc i32 (...)* @x(%struct.q* undef, i8* %vla14, i8* %vla18, i8* %vla22, i32 undef) ; [#uses=0]
25 %call = call i32 (...)* @x(%struct.q* undef, i8* undef, i8* %vla6, i8* %vla10, i32 undef) ; [#uses=0]
26 %call35 = call i32 (...)* @x(%struct.q* undef, i8* %vla14, i8* %vla18, i8* %vla22, i32 undef) ; [#uses=0]
2727 unreachable
2828
2929 if.end36: ; preds = %entry
3030 ret void
3131 }
3232
33 declare arm_apcscc void @zz(...)
33 declare void @zz(...)
3434
35 declare arm_apcscc i32 @x(...)
35 declare i32 @x(...)
33
44 %struct.foo = type { i64, i64 }
55
6 define arm_apcscc zeroext i8 @t(%struct.foo* %this) noreturn optsize {
6 define zeroext i8 @t(%struct.foo* %this) noreturn optsize {
77 entry:
88 ; ARM: t:
99 ; ARM: str r0, [r1], r0
0 ; RUN: llc < %s -march=arm -mcpu=cortex-a8 | FileCheck %s
11 ; Radar 7872877
22
3 define arm_apcscc void @test(float* %fltp, i32 %packedValue, float* %table) nounwind {
3 define void @test(float* %fltp, i32 %packedValue, float* %table) nounwind {
44 entry:
55 %0 = load float* %fltp
66 %1 = insertelement <4 x float> undef, float %0, i32 0
22
33 %struct.__int8x8x2_t = type { [2 x <8 x i8>] }
44
5 define arm_apcscc void @foo(%struct.__int8x8x2_t* nocapture %a, i8* %b) nounwind {
5 define void @foo(%struct.__int8x8x2_t* nocapture %a, i8* %b) nounwind {
66 entry:
77 %0 = bitcast %struct.__int8x8x2_t* %a to i128* ; [#uses=1]
88 %srcval = load i128* %0, align 8 ; [#uses=2]
22 ; rdar://8015977
33 ; rdar://8020118
44
5 define arm_apcscc i8* @rt0(i32 %x) nounwind readnone {
5 define i8* @rt0(i32 %x) nounwind readnone {
66 entry:
77 ; CHECK: rt0:
88 ; CHECK: mov r0, lr
1010 ret i8* %0
1111 }
1212
13 define arm_apcscc i8* @rt2() nounwind readnone {
13 define i8* @rt2() nounwind readnone {
1414 entry:
1515 ; CHECK: rt2:
1616 ; CHECK: ldr r0, [r7]
0 ; RUN: llc < %s -march=arm -mattr=+vfp3 | FileCheck %s
11
2 define arm_apcscc float @t1(float %x) nounwind readnone optsize {
2 define float @t1(float %x) nounwind readnone optsize {
33 entry:
44 ; CHECK: t1:
55 ; CHECK: vmov.f32 s1, #4.000000e+00
77 ret float %0
88 }
99
10 define arm_apcscc double @t2(double %x) nounwind readnone optsize {
10 define double @t2(double %x) nounwind readnone optsize {
1111 entry:
1212 ; CHECK: t2:
1313 ; CHECK: vmov.f64 d1, #3.000000e+00
1515 ret double %0
1616 }
1717
18 define arm_apcscc double @t3(double %x) nounwind readnone optsize {
18 define double @t3(double %x) nounwind readnone optsize {
1919 entry:
2020 ; CHECK: t3:
2121 ; CHECK: vmov.f64 d1, #-1.300000e+01
2323 ret double %0
2424 }
2525
26 define arm_apcscc float @t4(float %x) nounwind readnone optsize {
26 define float @t4(float %x) nounwind readnone optsize {
2727 entry:
2828 ; CHECK: t4:
2929 ; CHECK: vmov.f32 s1, #-2.400000e+01
44 @nextaddr = global i8* null ; [#uses=2]
55 @C.0.2070 = private constant [5 x i8*] [i8* blockaddress(@foo, %L1), i8* blockaddress(@foo, %L2), i8* blockaddress(@foo, %L3), i8* blockaddress(@foo, %L4), i8* blockaddress(@foo, %L5)] ; <[5 x i8*]*> [#uses=1]
66
7 define internal arm_apcscc i32 @foo(i32 %i) nounwind {
7 define internal i32 @foo(i32 %i) nounwind {
88 ; ARM: foo:
99 ; THUMB: foo:
1010 ; THUMB2: foo:
22 ; Radar 7449043
33 %struct.int32x4_t = type { <4 x i32> }
44
5 define arm_apcscc void @t() nounwind {
5 define void @t() nounwind {
66 entry:
77 ; CHECK: vmov.I64 q15, #0
88 ; CHECK: vmov.32 d30[0], r0
1515 ; Radar 7457110
1616 %struct.int32x2_t = type { <4 x i32> }
1717
18 define arm_apcscc void @t2() nounwind {
18 define void @t2() nounwind {
1919 entry:
2020 ; CHECK: vmov d30, d0
2121 ; CHECK: vmov.32 r0, d30[0]
3939 %22 = type { void (%0*)*, void (%0*, i8***, i32, i8**, i32)* }
4040 %23 = type { void (%0*, i32)*, void (%0*, i8**, i8**, i32)*, void (%0*)*, void (%0*)* }
4141
42 define arm_apcscc void @test(%0* nocapture %a0, %11* nocapture %a1, i16* nocapture %a2, i8** nocapture %a3, i32 %a4) nounwind {
42 define void @test(%0* nocapture %a0, %11* nocapture %a1, i16* nocapture %a2, i8** nocapture %a3, i32 %a4) nounwind {
4343 bb:
4444 %t = alloca [64 x float], align 4
4545 %t5 = getelementptr inbounds %0* %a0, i32 0, i32 65
392392 %struct.z_stream = type { i8*, i32, i32, i8*, i32, i32, i8*, %struct.internal_state*, i8* (i8*, i32, i32)*, void (i8*, i8*)*, i8*, i32, i32, i32 }
393393 %union.anon = type { i16 }
394394
395 define arm_apcscc i32 @longest_match(%struct.internal_state* %s, i32 %cur_match) nounwind optsize {
395 define i32 @longest_match(%struct.internal_state* %s, i32 %cur_match) nounwind optsize {
396396 entry:
397397 %0 = getelementptr inbounds %struct.internal_state* %s, i32 0, i32 31 ; [#uses=1]
398398 %1 = load i32* %0, align 4 ; [#uses=2]
77 %struct.__neon_int16x8x2_t = type { <8 x i16>, <8 x i16> }
88 %struct.__neon_int32x4x2_t = type { <4 x i32>, <4 x i32> }
99
10 define arm_apcscc void @t1(i16* %i_ptr, i16* %o_ptr, %struct.int32x4_t* nocapture %vT0ptr, %struct.int32x4_t* nocapture %vT1ptr) nounwind {
10 define void @t1(i16* %i_ptr, i16* %o_ptr, %struct.int32x4_t* nocapture %vT0ptr, %struct.int32x4_t* nocapture %vT1ptr) nounwind {
1111 entry:
1212 ; CHECK: t1:
1313 ; CHECK: vld1.16
4040 ret void
4141 }
4242
43 define arm_apcscc void @t2(i16* %i_ptr, i16* %o_ptr, %struct.int16x8_t* nocapture %vT0ptr, %struct.int16x8_t* nocapture %vT1ptr) nounwind {
43 define void @t2(i16* %i_ptr, i16* %o_ptr, %struct.int16x8_t* nocapture %vT0ptr, %struct.int16x8_t* nocapture %vT1ptr) nounwind {
4444 entry:
4545 ; CHECK: t2:
4646 ; CHECK: vld1.16
8787 ret <8 x i8> %tmp4
8888 }
8989
90 define arm_apcscc void @t4(i32* %in, i32* %out) nounwind {
90 define void @t4(i32* %in, i32* %out) nounwind {
9191 entry:
9292 ; CHECK: t4:
9393 ; CHECK: vld2.32
162162 ret <8 x i8> %tmp5
163163 }
164164
165 define arm_apcscc void @t7(i32* %iptr, i32* %optr) nounwind {
165 define void @t7(i32* %iptr, i32* %optr) nounwind {
166166 entry:
167167 ; CHECK: t7:
168168 ; CHECK: vld2.32
0 ; RUN: llc < %s -march=arm -mattr=+v6,+vfp2 -stats -info-output-file - | grep "Number of re-materialization"
11
2 define arm_apcscc i32 @main(i32 %argc, i8** nocapture %argv, double %d1, double %d2) nounwind {
2 define i32 @main(i32 %argc, i8** nocapture %argv, double %d1, double %d2) nounwind {
33 entry:
44 br i1 undef, label %smvp.exit, label %bb.i3
55
2424 br i1 %14, label %phi1.exit, label %bb.i35
2525
2626 bb.i35: ; preds = %bb142
27 %5 = call arm_apcscc double @sin(double %15) nounwind readonly ; [#uses=1]
27 %5 = call double @sin(double %15) nounwind readonly ; [#uses=1]
2828 %6 = fmul double %5, 0x4031740AFA84AD8A ; [#uses=1]
2929 %7 = fsub double 1.000000e+00, undef ; [#uses=1]
3030 %8 = fdiv double %7, 6.000000e-01 ; [#uses=1]
6161 unreachable
6262 }
6363
64 declare arm_apcscc double @sin(double) nounwind readonly
64 declare double @sin(double) nounwind readonly
0 ; RUN: llc < %s -march=arm | FileCheck %s --check-prefix=ARM
11 ; RUN: llc < %s -march=arm -mattr=+thumb2 | FileCheck %s --check-prefix=T2
22
3 define arm_apcscc i32 @t1(i32 %c) nounwind readnone {
3 define i32 @t1(i32 %c) nounwind readnone {
44 entry:
55 ; ARM: t1:
66 ; ARM: mov r1, #101
1616 ret i32 %1
1717 }
1818
19 define arm_apcscc i32 @t2(i32 %c) nounwind readnone {
19 define i32 @t2(i32 %c) nounwind readnone {
2020 entry:
2121 ; ARM: t2:
2222 ; ARM: mov r1, #101
3232 ret i32 %1
3333 }
3434
35 define arm_apcscc i32 @t3(i32 %a) nounwind readnone {
35 define i32 @t3(i32 %a) nounwind readnone {
3636 entry:
3737 ; ARM: t3:
3838 ; ARM: mov r0, #0
88
99 declare <4 x float> @llvm.arm.neon.vld1.v4f32(i8*) nounwind readonly
1010
11 define arm_apcscc void @aaa(%quuz* %this, i8* %block) {
11 define void @aaa(%quuz* %this, i8* %block) {
1212 ; CHECK: aaa:
1313 ; CHECK: bic sp, sp, #15
1414 ; CHECK: vst1.64 {{.*}}sp, :128
0 ; RUN: llc < %s -march=arm | FileCheck %s
11 ; rdar://7961298
22
3 define arm_apcscc void @t() nounwind {
3 define void @t() nounwind {
44 entry:
55 ; CHECK: t:
66 ; CHECK: trap
33
44 ; rdar://7113725
55
6 define arm_apcscc void @t(i8* nocapture %a, i8* nocapture %b) nounwind {
6 define void @t(i8* nocapture %a, i8* nocapture %b) nounwind {
77 entry:
88 ; GENERIC: t:
99 ; GENERIC: ldrb r2
243243 ret <4 x float> %tmp2
244244 }
245245
246 define arm_apcscc <2 x i64> @foo(<2 x i64> %arg0_int64x1_t) nounwind readnone {
246 define <2 x i64> @foo(<2 x i64> %arg0_int64x1_t) nounwind readnone {
247247 entry:
248248 %0 = shufflevector <2 x i64> %arg0_int64x1_t, <2 x i64> undef, <2 x i32>
249249 ret <2 x i64> %0
250250 }
251251
252 define arm_apcscc <2 x i64> @bar(<2 x i64> %arg0_int64x1_t) nounwind readnone {
252 define <2 x i64> @bar(<2 x i64> %arg0_int64x1_t) nounwind readnone {
253253 entry:
254254 %0 = shufflevector <2 x i64> %arg0_int64x1_t, <2 x i64> undef, <2 x i32>
255255 ret <2 x i64> %0
256256 }
257257
258 define arm_apcscc <2 x double> @baz(<2 x double> %arg0_int64x1_t) nounwind readnone {
258 define <2 x double> @baz(<2 x double> %arg0_int64x1_t) nounwind readnone {
259259 entry:
260260 %0 = shufflevector <2 x double> %arg0_int64x1_t, <2 x double> undef, <2 x i32>
261261 ret <2 x double> %0
262262 }
263263
264 define arm_apcscc <2 x double> @qux(<2 x double> %arg0_int64x1_t) nounwind readnone {
264 define <2 x double> @qux(<2 x double> %arg0_int64x1_t) nounwind readnone {
265265 entry:
266266 %0 = shufflevector <2 x double> %arg0_int64x1_t, <2 x double> undef, <2 x i32>
267267 ret <2 x double> %0
0 ; RUN: llc < %s -march=arm -mattr=+neon | FileCheck %s
11
2 define arm_apcscc <8 x i8> @test_vextd(<8 x i8>* %A, <8 x i8>* %B) nounwind {
2 define <8 x i8> @test_vextd(<8 x i8>* %A, <8 x i8>* %B) nounwind {
33 ;CHECK: test_vextd:
44 ;CHECK: vext
55 %tmp1 = load <8 x i8>* %A
88 ret <8 x i8> %tmp3
99 }
1010
11 define arm_apcscc <8 x i8> @test_vextRd(<8 x i8>* %A, <8 x i8>* %B) nounwind {
11 define <8 x i8> @test_vextRd(<8 x i8>* %A, <8 x i8>* %B) nounwind {
1212 ;CHECK: test_vextRd:
1313 ;CHECK: vext
1414 %tmp1 = load <8 x i8>* %A
1717 ret <8 x i8> %tmp3
1818 }
1919
20 define arm_apcscc <16 x i8> @test_vextq(<16 x i8>* %A, <16 x i8>* %B) nounwind {
20 define <16 x i8> @test_vextq(<16 x i8>* %A, <16 x i8>* %B) nounwind {
2121 ;CHECK: test_vextq:
2222 ;CHECK: vext
2323 %tmp1 = load <16 x i8>* %A
2626 ret <16 x i8> %tmp3
2727 }
2828
29 define arm_apcscc <16 x i8> @test_vextRq(<16 x i8>* %A, <16 x i8>* %B) nounwind {
29 define <16 x i8> @test_vextRq(<16 x i8>* %A, <16 x i8>* %B) nounwind {
3030 ;CHECK: test_vextRq:
3131 ;CHECK: vext
3232 %tmp1 = load <16 x i8>* %A
3535 ret <16 x i8> %tmp3
3636 }
3737
38 define arm_apcscc <4 x i16> @test_vextd16(<4 x i16>* %A, <4 x i16>* %B) nounwind {
38 define <4 x i16> @test_vextd16(<4 x i16>* %A, <4 x i16>* %B) nounwind {
3939 ;CHECK: test_vextd16:
4040 ;CHECK: vext
4141 %tmp1 = load <4 x i16>* %A
4444 ret <4 x i16> %tmp3
4545 }
4646
47 define arm_apcscc <4 x i32> @test_vextq32(<4 x i32>* %A, <4 x i32>* %B) nounwind {
47 define <4 x i32> @test_vextq32(<4 x i32>* %A, <4 x i32>* %B) nounwind {
4848 ;CHECK: test_vextq32:
4949 ;CHECK: vext
5050 %tmp1 = load <4 x i32>* %A
135135
136136 ; Check for correct assembler printing for immediate values.
137137 %struct.int8x8_t = type { <8 x i8> }
138 define arm_apcscc void @vdupn128(%struct.int8x8_t* noalias nocapture sret %agg.result) nounwind {
138 define void @vdupn128(%struct.int8x8_t* noalias nocapture sret %agg.result) nounwind {
139139 entry:
140140 ;CHECK: vdupn128:
141141 ;CHECK: vmov.i8 d0, #0x80
144144 ret void
145145 }
146146
147 define arm_apcscc void @vdupnneg75(%struct.int8x8_t* noalias nocapture sret %agg.result) nounwind {
147 define void @vdupnneg75(%struct.int8x8_t* noalias nocapture sret %agg.result) nounwind {
148148 entry:
149149 ;CHECK: vdupnneg75:
150150 ;CHECK: vmov.i8 d0, #0xB5
0 ; RUN: llc < %s -march=arm -mattr=+neon | FileCheck %s
11
2 define arm_apcscc <8 x i8> @test_vrev64D8(<8 x i8>* %A) nounwind {
2 define <8 x i8> @test_vrev64D8(<8 x i8>* %A) nounwind {
33 ;CHECK: test_vrev64D8:
44 ;CHECK: vrev64.8
55 %tmp1 = load <8 x i8>* %A
77 ret <8 x i8> %tmp2
88 }
99
10 define arm_apcscc <4 x i16> @test_vrev64D16(<4 x i16>* %A) nounwind {
10 define <4 x i16> @test_vrev64D16(<4 x i16>* %A) nounwind {
1111 ;CHECK: test_vrev64D16:
1212 ;CHECK: vrev64.16
1313 %tmp1 = load <4 x i16>* %A
1515 ret <4 x i16> %tmp2
1616 }
1717
18 define arm_apcscc <2 x i32> @test_vrev64D32(<2 x i32>* %A) nounwind {
18 define <2 x i32> @test_vrev64D32(<2 x i32>* %A) nounwind {
1919 ;CHECK: test_vrev64D32:
2020 ;CHECK: vrev64.32
2121 %tmp1 = load <2 x i32>* %A
2323 ret <2 x i32> %tmp2
2424 }
2525
26 define arm_apcscc <2 x float> @test_vrev64Df(<2 x float>* %A) nounwind {
26 define <2 x float> @test_vrev64Df(<2 x float>* %A) nounwind {
2727 ;CHECK: test_vrev64Df:
2828 ;CHECK: vrev64.32
2929 %tmp1 = load <2 x float>* %A
3131 ret <2 x float> %tmp2
3232 }
3333
34 define arm_apcscc <16 x i8> @test_vrev64Q8(<16 x i8>* %A) nounwind {
34 define <16 x i8> @test_vrev64Q8(<16 x i8>* %A) nounwind {
3535 ;CHECK: test_vrev64Q8:
3636 ;CHECK: vrev64.8
3737 %tmp1 = load <16 x i8>* %A
3939 ret <16 x i8> %tmp2
4040 }
4141
42 define arm_apcscc <8 x i16> @test_vrev64Q16(<8 x i16>* %A) nounwind {
42 define <8 x i16> @test_vrev64Q16(<8 x i16>* %A) nounwind {
4343 ;CHECK: test_vrev64Q16:
4444 ;CHECK: vrev64.16
4545 %tmp1 = load <8 x i16>* %A
4747 ret <8 x i16> %tmp2
4848 }
4949
50 define arm_apcscc <4 x i32> @test_vrev64Q32(<4 x i32>* %A) nounwind {
50 define <4 x i32> @test_vrev64Q32(<4 x i32>* %A) nounwind {
5151 ;CHECK: test_vrev64Q32:
5252 ;CHECK: vrev64.32
5353 %tmp1 = load <4 x i32>* %A
5555 ret <4 x i32> %tmp2
5656 }
5757
58 define arm_apcscc <4 x float> @test_vrev64Qf(<4 x float>* %A) nounwind {
58 define <4 x float> @test_vrev64Qf(<4 x float>* %A) nounwind {
5959 ;CHECK: test_vrev64Qf:
6060 ;CHECK: vrev64.32
6161 %tmp1 = load <4 x float>* %A
6363 ret <4 x float> %tmp2
6464 }
6565
66 define arm_apcscc <8 x i8> @test_vrev32D8(<8 x i8>* %A) nounwind {
66 define <8 x i8> @test_vrev32D8(<8 x i8>* %A) nounwind {
6767 ;CHECK: test_vrev32D8:
6868 ;CHECK: vrev32.8
6969 %tmp1 = load <8 x i8>* %A
7171 ret <8 x i8> %tmp2
7272 }
7373
74 define arm_apcscc <4 x i16> @test_vrev32D16(<4 x i16>* %A) nounwind {
74 define <4 x i16> @test_vrev32D16(<4 x i16>* %A) nounwind {
7575 ;CHECK: test_vrev32D16:
7676 ;CHECK: vrev32.16
7777 %tmp1 = load <4 x i16>* %A
7979 ret <4 x i16> %tmp2
8080 }
8181
82 define arm_apcscc <16 x i8> @test_vrev32Q8(<16 x i8>* %A) nounwind {
82 define <16 x i8> @test_vrev32Q8(<16 x i8>* %A) nounwind {
8383 ;CHECK: test_vrev32Q8:
8484 ;CHECK: vrev32.8
8585 %tmp1 = load <16 x i8>* %A
8787 ret <16 x i8> %tmp2
8888 }
8989
90 define arm_apcscc <8 x i16> @test_vrev32Q16(<8 x i16>* %A) nounwind {
90 define <8 x i16> @test_vrev32Q16(<8 x i16>* %A) nounwind {
9191 ;CHECK: test_vrev32Q16:
9292 ;CHECK: vrev32.16
9393 %tmp1 = load <8 x i16>* %A
9595 ret <8 x i16> %tmp2
9696 }
9797
98 define arm_apcscc <8 x i8> @test_vrev16D8(<8 x i8>* %A) nounwind {
98 define <8 x i8> @test_vrev16D8(<8 x i8>* %A) nounwind {
9999 ;CHECK: test_vrev16D8:
100100 ;CHECK: vrev16.8
101101 %tmp1 = load <8 x i8>* %A
103103 ret <8 x i8> %tmp2
104104 }
105105
106 define arm_apcscc <16 x i8> @test_vrev16Q8(<16 x i8>* %A) nounwind {
106 define <16 x i8> @test_vrev16Q8(<16 x i8>* %A) nounwind {
107107 ;CHECK: test_vrev16Q8:
108108 ;CHECK: vrev16.8
109109 %tmp1 = load <16 x i8>* %A
55
66 @.str = private constant [1 x i8] c" "
77
8 define arm_apcscc void @t(%0) nounwind {
8 define void @t(%0) nounwind {
99 entry:
1010 %arg0 = alloca %union.T0
1111 %1 = bitcast %union.T0* %arg0 to %0*
1313 ret void
1414 }
1515
16 declare arm_apcscc i32 @printf(i8*, ...)
16 declare i32 @printf(i8*, ...)
0 ; RUN: llc < %s -mtriple=thumbv6-elf | not grep "subs sp"
11 ; PR4567
22
3 define arm_apcscc i8* @__gets_chk(i8* %s, i32 %slen) nounwind {
3 define i8* @__gets_chk(i8* %s, i32 %slen) nounwind {
44 entry:
55 br i1 undef, label %bb, label %bb1
66
2222 br i1 undef, label %bb5, label %bb6
2323
2424 bb5: ; preds = %bb4
25 %2 = call arm_apcscc i8* @gets(i8* %s) nounwind ; [#uses=1]
25 %2 = call i8* @gets(i8* %s) nounwind ; [#uses=1]
2626 ret i8* %2
2727
2828 bb6: ; preds = %bb4
2929 unreachable
3030 }
3131
32 declare arm_apcscc i8* @gets(i8*) nounwind
32 declare i8* @gets(i8*) nounwind
11
22 @Time.2535 = external global i64 ; [#uses=2]
33
4 define arm_apcscc i64 @millisecs() nounwind {
4 define i64 @millisecs() nounwind {
55 entry:
66 %0 = load i64* @Time.2535, align 4 ; [#uses=2]
77 %1 = add i64 %0, 1 ; [#uses=1]
33 %struct.List = type { i32, i32* }
44 @llvm.used = appending global [1 x i8*] [i8* bitcast (i32 ()* @main to i8*)], section "llvm.metadata" ; <[1 x i8*]*> [#uses=0]
55
6 define arm_apcscc i32 @main() nounwind {
6 define i32 @main() nounwind {
77 entry:
88 %ll = alloca %struct.LinkList*, align 4 ; <%struct.LinkList**> [#uses=1]
9 %0 = call arm_apcscc i32 @ReadList(%struct.LinkList** %ll, %struct.List** null) nounwind ; [#uses=1]
9 %0 = call i32 @ReadList(%struct.LinkList** %ll, %struct.List** null) nounwind ; [#uses=1]
1010 switch i32 %0, label %bb5 [
1111 i32 7, label %bb4
1212 i32 42, label %bb3
2222 ret i32 1
2323 }
2424
25 declare arm_apcscc i32 @ReadList(%struct.LinkList** nocapture, %struct.List** nocapture) nounwind
25 declare i32 @ReadList(%struct.LinkList** nocapture, %struct.List** nocapture) nounwind
11
22 %struct.BF_KEY = type { [18 x i32], [1024 x i32] }
33
4 define arm_apcscc void @BF_encrypt(i32* nocapture %data, %struct.BF_KEY* nocapture %key, i32 %encrypt) nounwind {
4 define void @BF_encrypt(i32* nocapture %data, %struct.BF_KEY* nocapture %key, i32 %encrypt) nounwind {
55 entry:
66 %0 = getelementptr %struct.BF_KEY* %key, i32 0, i32 0, i32 0; [#uses=2]
77 %1 = load i32* %data, align 4 ; [#uses=2]
22 %struct.vorbis_comment = type { i8**, i32*, i32, i8* }
33 @.str16 = external constant [2 x i8], align 1 ; <[2 x i8]*> [#uses=1]
44
5 declare arm_apcscc i8* @__strcpy_chk(i8*, i8*, i32) nounwind
5 declare i8* @__strcpy_chk(i8*, i8*, i32) nounwind
66
7 declare arm_apcscc i8* @__strcat_chk(i8*, i8*, i32) nounwind
7 declare i8* @__strcat_chk(i8*, i8*, i32) nounwind
88
9 define arm_apcscc i8* @vorbis_comment_query(%struct.vorbis_comment* nocapture %vc, i8* %tag, i32 %count) nounwind {
9 define i8* @vorbis_comment_query(%struct.vorbis_comment* nocapture %vc, i8* %tag, i32 %count) nounwind {
1010 entry:
1111 %0 = alloca i8, i32 undef, align 4 ; [#uses=2]
12 %1 = call arm_apcscc i8* @__strcpy_chk(i8* %0, i8* %tag, i32 -1) nounwind; [#uses=0]
13 %2 = call arm_apcscc i8* @__strcat_chk(i8* %0, i8* getelementptr ([2 x i8]* @.str16, i32 0, i32 0), i32 -1) nounwind; [#uses=0]
12 %1 = call i8* @__strcpy_chk(i8* %0, i8* %tag, i32 -1) nounwind; [#uses=0]
13 %2 = call i8* @__strcat_chk(i8* %0, i8* getelementptr ([2 x i8]* @.str16, i32 0, i32 0), i32 -1) nounwind; [#uses=0]
1414 %3 = getelementptr %struct.vorbis_comment* %vc, i32 0, i32 0; [#uses=1]
1515 br label %bb11
1616
88
99 @llvm.used = appending global [1 x i8*] [i8* bitcast (i32 (%struct.asl_file_t*, i64, i64*)* @t to i8*)], section "llvm.metadata" ; <[1 x i8*]*> [#uses=0]
1010
11 define arm_apcscc i32 @t(%struct.asl_file_t* %s, i64 %off, i64* %out) nounwind optsize {
11 define i32 @t(%struct.asl_file_t* %s, i64 %off, i64* %out) nounwind optsize {
1212 ; CHECK: t:
1313 ; CHECK: adds r0, #8
1414 entry:
3131 br i1 %8, label %bb13, label %bb5
3232
3333 bb5: ; preds = %bb3
34 %9 = call arm_apcscc i32 @fseeko(%struct.FILE* %2, i64 %off, i32 0) nounwind ; [#uses=1]
34 %9 = call i32 @fseeko(%struct.FILE* %2, i64 %off, i32 0) nounwind ; [#uses=1]
3535 %10 = icmp eq i32 %9, 0 ; [#uses=1]
3636 br i1 %10, label %bb7, label %bb13
3737
3939 store i64 0, i64* %val, align 4
4040 %11 = load %struct.FILE** %1, align 4 ; <%struct.FILE*> [#uses=1]
4141 %val8 = bitcast i64* %val to i8* ; [#uses=1]
42 %12 = call arm_apcscc i32 @fread(i8* noalias %val8, i32 8, i32 1, %struct.FILE* noalias %11) nounwind ; [#uses=1]
42 %12 = call i32 @fread(i8* noalias %val8, i32 8, i32 1, %struct.FILE* noalias %11) nounwind ; [#uses=1]
4343 %13 = icmp eq i32 %12, 1 ; [#uses=1]
4444 br i1 %13, label %bb10, label %bb13
4545
4949
5050 bb11: ; preds = %bb10
5151 %15 = load i64* %val, align 4 ; [#uses=1]
52 %16 = call arm_apcscc i64 @asl_core_ntohq(i64 %15) nounwind ; [#uses=1]
52 %16 = call i64 @asl_core_ntohq(i64 %15) nounwind ; [#uses=1]
5353 store i64 %16, i64* %out, align 4
5454 ret i32 0
5555
5858 ret i32 %.0
5959 }
6060
61 declare arm_apcscc i32 @fseeko(%struct.FILE* nocapture, i64, i32) nounwind
61 declare i32 @fseeko(%struct.FILE* nocapture, i64, i32) nounwind
6262
63 declare arm_apcscc i32 @fread(i8* noalias nocapture, i32, i32, %struct.FILE* noalias nocapture) nounwind
63 declare i32 @fread(i8* noalias nocapture, i32, i32, %struct.FILE* noalias nocapture) nounwind
6464
65 declare arm_apcscc i64 @asl_core_ntohq(i64)
65 declare i64 @asl_core_ntohq(i64)
99 @codetable.2928 = internal constant [5 x i8*] [i8* blockaddress(@interpret_threaded, %RETURN), i8* blockaddress(@interpret_threaded, %INCREMENT), i8* blockaddress(@interpret_threaded, %DECREMENT), i8* blockaddress(@interpret_threaded, %DOUBLE), i8* blockaddress(@interpret_threaded, %SWAPWORD)] ; <[5 x i8*]*> [#uses=5]
1010 @llvm.used = appending global [1 x i8*] [i8* bitcast (i32 (i8*)* @interpret_threaded to i8*)], section "llvm.metadata" ; <[1 x i8*]*> [#uses=0]
1111
12 define arm_apcscc i32 @interpret_threaded(i8* nocapture %opcodes) nounwind readonly optsize {
12 define i32 @interpret_threaded(i8* nocapture %opcodes) nounwind readonly optsize {
1313 entry:
1414 %0 = load i8* %opcodes, align 1 ; [#uses=1]
1515 %1 = zext i8 %0 to i32 ; [#uses=1]
33
44 @fred = internal global i32 0 ; [#uses=1]
55
6 define arm_apcscc void @foo() nounwind {
6 define void @foo() nounwind {
77 entry:
88 ; CHECK: str r0, [sp
9 %0 = call arm_apcscc i32 (...)* @bar() nounwind ; [#uses=1]
9 %0 = call i32 (...)* @bar() nounwind ; [#uses=1]
1010 ; CHECK: blx _bar
1111 ; CHECK: ldr r1, [sp
1212 store i32 %0, i32* @fred, align 4
1616 ret void
1717 }
1818
19 declare arm_apcscc i32 @bar(...)
19 declare i32 @bar(...)
1212 @__stderrp = external global %struct.FILE* ; <%struct.FILE**> [#uses=1]
1313 @.str1 = private constant [28 x i8] c"Final valprev=%d, index=%d\0A\00", section "__TEXT,__cstring,cstring_literals", align 1 ; <[28 x i8]*> [#uses=1]
1414
15 define arm_apcscc void @adpcm_coder(i16* nocapture %indata, i8* nocapture %outdata, i32 %len, %struct.adpcm_state* nocapture %state) nounwind {
15 define void @adpcm_coder(i16* nocapture %indata, i8* nocapture %outdata, i32 %len, %struct.adpcm_state* nocapture %state) nounwind {
1616 entry:
1717 %0 = getelementptr %struct.adpcm_state* %state, i32 0, i32 0 ; [#uses=2]
1818 %1 = load i16* %0, align 2 ; [#uses=1]
137137 ret void
138138 }
139139
140 define arm_apcscc void @adpcm_decoder(i8* nocapture %indata, i16* nocapture %outdata, i32 %len, %struct.adpcm_state* nocapture %state) nounwind {
140 define void @adpcm_decoder(i8* nocapture %indata, i16* nocapture %outdata, i32 %len, %struct.adpcm_state* nocapture %state) nounwind {
141141 entry:
142142 %0 = getelementptr %struct.adpcm_state* %state, i32 0, i32 0 ; [#uses=2]
143143 %1 = load i16* %0, align 2 ; [#uses=1]
244244 ret void
245245 }
246246
247 define arm_apcscc i32 @main() nounwind {
247 define i32 @main() nounwind {
248248 entry:
249249 br label %bb
250250
251251 bb: ; preds = %bb3, %entry
252 %0 = tail call arm_apcscc i32 (...)* @read(i32 0, i8* getelementptr ([500 x i8]* @abuf, i32 0, i32 0), i32 500) nounwind ; [#uses=4]
252 %0 = tail call i32 (...)* @read(i32 0, i8* getelementptr ([500 x i8]* @abuf, i32 0, i32 0), i32 500) nounwind ; [#uses=4]
253253 %1 = icmp slt i32 %0, 0 ; [#uses=1]
254254 br i1 %1, label %bb1, label %bb2
255255
256256 bb1: ; preds = %bb
257 tail call arm_apcscc void @perror(i8* getelementptr ([11 x i8]* @.str, i32 0, i32 0)) nounwind
257 tail call void @perror(i8* getelementptr ([11 x i8]* @.str, i32 0, i32 0)) nounwind
258258 ret i32 1
259259
260260 bb2: ; preds = %bb
263263
264264 bb3: ; preds = %bb2
265265 %3 = shl i32 %0, 1 ; [#uses=1]
266 tail call arm_apcscc void @adpcm_decoder(i8* getelementptr ([500 x i8]* @abuf, i32 0, i32 0), i16* getelementptr ([1000 x i16]* @sbuf, i32 0, i32 0), i32 %3, %struct.adpcm_state* @state) nounwind
266 tail call void @adpcm_decoder(i8* getelementptr ([500 x i8]* @abuf, i32 0, i32 0), i16* getelementptr ([1000 x i16]* @sbuf, i32 0, i32 0), i32 %3, %struct.adpcm_state* @state) nounwind
267267 %4 = shl i32 %0, 2 ; [#uses=1]
268 %5 = tail call arm_apcscc i32 (...)* @write(i32 1, i16* getelementptr ([1000 x i16]* @sbuf, i32 0, i32 0), i32 %4) nounwind ; [#uses=0]
268 %5 = tail call i32 (...)* @write(i32 1, i16* getelementptr ([1000 x i16]* @sbuf, i32 0, i32 0), i32 %4) nounwind ; [#uses=0]
269269 br label %bb
270270
271271 bb4: ; preds = %bb2
274274 %8 = sext i16 %7 to i32 ; [#uses=1]
275275 %9 = load i8* getelementptr (%struct.adpcm_state* @state, i32 0, i32 1), align 2 ; [#uses=1]
276276 %10 = sext i8 %9 to i32 ; [#uses=1]
277 %11 = tail call arm_apcscc i32 (%struct.FILE*, i8*, ...)* @fprintf(%struct.FILE* %6, i8* getelementptr ([28 x i8]* @.str1, i32 0, i32 0), i32 %8, i32 %10) nounwind ; [#uses=0]
277 %11 = tail call i32 (%struct.FILE*, i8*, ...)* @fprintf(%struct.FILE* %6, i8* getelementptr ([28 x i8]* @.str1, i32 0, i32 0), i32 %8, i32 %10) nounwind ; [#uses=0]
278278 ret i32 0
279279 }
280280
281 declare arm_apcscc i32 @read(...)
282
283 declare arm_apcscc void @perror(i8* nocapture) nounwind
284
285 declare arm_apcscc i32 @write(...)
286
287 declare arm_apcscc i32 @fprintf(%struct.FILE* nocapture, i8* nocapture, ...) nounwind
281 declare i32 @read(...)
282
283 declare void @perror(i8* nocapture) nounwind
284
285 declare i32 @write(...)
286
287 declare i32 @fprintf(%struct.FILE* nocapture, i8* nocapture, ...) nounwind
66
77 @GV = external global i32 ; [#uses=2]
88
9 define arm_apcscc void @t(i32* nocapture %vals, i32 %c) nounwind {
9 define void @t(i32* nocapture %vals, i32 %c) nounwind {
1010 entry:
1111 ; CHECK: t:
1212 %0 = icmp eq i32 %c, 0 ; [#uses=1]
0 ; RUN: llc < %s -mtriple=thumb-apple-darwin | FileCheck %s
11 ; rdar://7268481
22
3 define arm_apcscc void @t(i8* %a, ...) nounwind {
3 define void @t(i8* %a, ...) nounwind {
44 ; CHECK: t:
55 ; CHECK: pop {r3}
66 ; CHECK-NEXT: add sp, #12
0 ; RUN: llc < %s -mtriple=thumb-apple-darwin -disable-fp-elim | FileCheck %s
11 ; rdar://7268481
22
3 define arm_apcscc void @t() nounwind {
3 define void @t() nounwind {
44 ; CHECK: t:
55 ; CHECK-NEXT : push {r7}
66 entry:
0 ; RUN: llc < %s -march=thumb | FileCheck %s
11 ; rdar://7961298
22
3 define arm_apcscc void @t() nounwind {
3 define void @t() nounwind {
44 entry:
55 ; CHECK: t:
66 ; CHECK: trap
33 target triple = "thumbv6t2-elf"
44 %struct.dwarf_cie = type <{ i32, i32, i8, [0 x i8], [3 x i8] }>
55
6 declare arm_apcscc i8* @read_sleb128(i8*, i32* nocapture) nounwind
6 declare i8* @read_sleb128(i8*, i32* nocapture) nounwind
77
8 define arm_apcscc i32 @get_cie_encoding(%struct.dwarf_cie* %cie) nounwind {
8 define i32 @get_cie_encoding(%struct.dwarf_cie* %cie) nounwind {
99 entry:
1010 br i1 undef, label %bb1, label %bb13
1111
2626 %.sum40 = add i32 %indvar.i, undef ; [#uses=1]
2727 %.sum31 = add i32 %.sum40, 2 ; [#uses=1]
2828 %scevgep.i = getelementptr %struct.dwarf_cie* %cie, i32 0, i32 3, i32 %.sum31 ; [#uses=1]
29 %3 = call arm_apcscc i8* @read_sleb128(i8* %scevgep.i, i32* undef) ; [#uses=0]
29 %3 = call i8* @read_sleb128(i8* %scevgep.i, i32* undef) ; [#uses=0]
3030 unreachable
3131
3232 bb13: ; preds = %entry
22
33 @"\01LC" = external constant [36 x i8], align 1 ; <[36 x i8]*> [#uses=1]
44
5 define arm_apcscc i32 @t(i32, ...) nounwind {
5 define i32 @t(i32, ...) nounwind {
66 entry:
77 ; CHECK: t:
88 ; CHECK: add r7, sp, #12
2323 %15 = sext i8 %6 to i32 ; [#uses=2]
2424 %16 = sext i16 %10 to i32 ; [#uses=2]
2525 %17 = sext i16 %13 to i32 ; [#uses=2]
26 %18 = call arm_apcscc i32 (i8*, ...)* @printf(i8* getelementptr ([36 x i8]* @"\01LC", i32 0, i32 0), i32 -128, i32 0, i32 %15, i32 %16, i32 %17, i32 0, i32 %14) nounwind ; [#uses=0]
26 %18 = call i32 (i8*, ...)* @printf(i8* getelementptr ([36 x i8]* @"\01LC", i32 0, i32 0), i32 -128, i32 0, i32 %15, i32 %16, i32 %17, i32 0, i32 %14) nounwind ; [#uses=0]
2727 %19 = add i32 0, %15 ; [#uses=1]
2828 %20 = add i32 %19, %16 ; [#uses=1]
2929 %21 = add i32 %20, %14 ; [#uses=1]
3232 ret i32 %23
3333 }
3434
35 declare arm_apcscc i32 @printf(i8* nocapture, ...) nounwind
35 declare i32 @printf(i8* nocapture, ...) nounwind
0 ; RUN: llc < %s -mtriple=thumbv7-apple-darwin9 -mattr=+vfp2,+thumb2
11 ; rdar://7083961
22
3 define arm_apcscc i32 @value(i64 %b1, i64 %b2) nounwind readonly {
3 define i32 @value(i64 %b1, i64 %b2) nounwind readonly {
44 entry:
55 %0 = icmp eq i32 undef, 0 ; [#uses=1]
66 %mod.0.ph.ph = select i1 %0, float -1.000000e+00, float 1.000000e+00 ; [#uses=1]
2727 %struct.jvirt_barray_control = type { [64 x i16]**, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, %struct.jvirt_barray_control*, %struct.backing_store_info }
2828 %struct.jvirt_sarray_control = type { i8**, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, %struct.jvirt_sarray_control*, %struct.backing_store_info }
2929
30 define arm_apcscc void @jpeg_idct_float(%struct.jpeg_decompress_struct* nocapture %cinfo, %struct.jpeg_component_info* nocapture %compptr, i16* nocapture %coef_block, i8** nocapture %output_buf, i32 %output_col) nounwind {
30 define void @jpeg_idct_float(%struct.jpeg_decompress_struct* nocapture %cinfo, %struct.jpeg_component_info* nocapture %compptr, i16* nocapture %coef_block, i8** nocapture %output_buf, i32 %output_col) nounwind {
3131 entry:
3232 %workspace = alloca [64 x float], align 4 ; <[64 x float]*> [#uses=11]
3333 %0 = load i8** undef, align 4 ; [#uses=5]
55 @lefline = external global [100 x [20 x i32]] ; <[100 x [20 x i32]]*> [#uses=1]
66 @sep = external global [20 x i32] ; <[20 x i32]*> [#uses=1]
77
8 define arm_apcscc void @main(i32 %argc, i8** %argv) noreturn nounwind {
8 define void @main(i32 %argc, i8** %argv) noreturn nounwind {
99 ; CHECK: main:
1010 ; CHECK: ldrb
1111 entry:
2121 %"struct.xalanc_1_8::XalanDOMString" = type { %"struct.std::vector >", i32 }
2222 %"struct.xalanc_1_8::XalanOutputStream" = type { i32 (...)**, i32, %"struct.std::basic_ostream >.base"*, i32, %"struct.std::vector >", %"struct.xalanc_1_8::XalanDOMString", i8, i8, %"struct.std::CharVectorType" }
2323
24 declare arm_apcscc void @_ZN10xalanc_1_814FormatterToXML17writeParentTagEndEv(%"struct.xalanc_1_8::FormatterToXML"*)
24 declare void @_ZN10xalanc_1_814FormatterToXML17writeParentTagEndEv(%"struct.xalanc_1_8::FormatterToXML"*)
2525
26 define arm_apcscc void @_ZN10xalanc_1_814FormatterToXML5cdataEPKtj(%"struct.xalanc_1_8::FormatterToXML"* %this, i16* %ch, i32 %length) {
26 define void @_ZN10xalanc_1_814FormatterToXML5cdataEPKtj(%"struct.xalanc_1_8::FormatterToXML"* %this, i16* %ch, i32 %length) {
2727 entry:
2828 %0 = getelementptr %"struct.xalanc_1_8::FormatterToXML"* %this, i32 0, i32 13 ; [#uses=1]
2929 br i1 undef, label %bb4, label %bb
3535 %3 = getelementptr i32 (...)** %2, i32 11 ; [#uses=1]
3636 %4 = load i32 (...)** %3, align 4 ; [#uses=1]
3737 %5 = bitcast i32 (...)* %4 to void (%"struct.xalanc_1_8::FormatterToXML"*, i16*, i32)* ; [#uses=1]
38 tail call arm_apcscc void %5(%"struct.xalanc_1_8::FormatterToXML"* %this, i16* %ch, i32 %length)
38 tail call void %5(%"struct.xalanc_1_8::FormatterToXML"* %this, i16* %ch, i32 %length)
3939 ret void
4040
4141 bb4: ; preds = %entry
42 tail call arm_apcscc void @_ZN10xalanc_1_814FormatterToXML17writeParentTagEndEv(%"struct.xalanc_1_8::FormatterToXML"* %this)
43 tail call arm_apcscc void undef(%"struct.xalanc_1_8::FormatterToXML"* %this, i16* %ch, i32 0, i32 %length, i8 zeroext undef)
42 tail call void @_ZN10xalanc_1_814FormatterToXML17writeParentTagEndEv(%"struct.xalanc_1_8::FormatterToXML"* %this)
43 tail call void undef(%"struct.xalanc_1_8::FormatterToXML"* %this, i16* %ch, i32 0, i32 %length, i8 zeroext undef)
4444 ret void
4545 }
2727 @.str1822946 = external constant [8 x i8], align 1 ; <[8 x i8]*> [#uses=1]
2828 @.str1842948 = external constant [11 x i8], align 1 ; <[11 x i8]*> [#uses=1]
2929
30 declare arm_apcscc i32 @fprintf(%struct.FILE* nocapture, i8* nocapture, ...) nounwind
30 declare i32 @fprintf(%struct.FILE* nocapture, i8* nocapture, ...) nounwind
3131
32 declare arm_apcscc i32 @"\01_fwrite"(i8*, i32, i32, i8*)
32 declare i32 @"\01_fwrite"(i8*, i32, i32, i8*)
3333
34 declare arm_apcscc %struct.FILE* @OpenIncGraphicFile(i8*, i8 zeroext, %struct.rec** nocapture, %struct.FILE_POS*, i32* nocapture) nounwind
34 declare %struct.FILE* @OpenIncGraphicFile(i8*, i8 zeroext, %struct.rec** nocapture, %struct.FILE_POS*, i32* nocapture) nounwind
3535
36 declare arm_apcscc void @Error(i32, i32, i8*, i32, %struct.FILE_POS*, ...) nounwind
36 declare void @Error(i32, i32, i8*, i32, %struct.FILE_POS*, ...) nounwind
3737
38 declare arm_apcscc i8* @fgets(i8*, i32, %struct.FILE* nocapture) nounwind
38 declare i8* @fgets(i8*, i32, %struct.FILE* nocapture) nounwind
3939
40 define arm_apcscc void @PS_PrintGraphicInclude(%struct.rec* %x, i32 %colmark, i32 %rowmark) nounwind {
40 define void @PS_PrintGraphicInclude(%struct.rec* %x, i32 %colmark, i32 %rowmark) nounwind {
4141 entry:
4242 br label %bb5
4343
4848 br i1 undef, label %bb5, label %bb6
4949
5050 bb6: ; preds = %bb5
51 %0 = call arm_apcscc %struct.FILE* @OpenIncGraphicFile(i8* undef, i8 zeroext 0, %struct.rec** undef, %struct.FILE_POS* null, i32* undef) nounwind ; <%struct.FILE*> [#uses=1]
51 %0 = call %struct.FILE* @OpenIncGraphicFile(i8* undef, i8 zeroext 0, %struct.rec** undef, %struct.FILE_POS* null, i32* undef) nounwind ; <%struct.FILE*> [#uses=1]
5252 br i1 false, label %bb.i, label %FontHalfXHeight.exit
5353
5454 bb.i: ; preds = %bb6
6666 br i1 %2, label %bb.i5, label %FontName.exit
6767
6868 bb.i5: ; preds = %FontSize.exit
69 call arm_apcscc void (i32, i32, i8*, i32, %struct.FILE_POS*, ...)* @Error(i32 1, i32 2, i8* getelementptr ([20 x i8]* @.str24239, i32 0, i32 0), i32 0, %struct.FILE_POS* bitcast (%4* @no_file_pos to %struct.FILE_POS*), i8* getelementptr ([10 x i8]* @.str81872, i32 0, i32 0)) nounwind
69 call void (i32, i32, i8*, i32, %struct.FILE_POS*, ...)* @Error(i32 1, i32 2, i8* getelementptr ([20 x i8]* @.str24239, i32 0, i32 0), i32 0, %struct.FILE_POS* bitcast (%4* @no_file_pos to %struct.FILE_POS*), i8* getelementptr ([10 x i8]* @.str81872, i32 0, i32 0)) nounwind
7070 br label %FontName.exit
7171
7272 FontName.exit: ; preds = %bb.i5, %FontSize.exit
73 %3 = call arm_apcscc i32 (%struct.FILE*, i8*, ...)* @fprintf(%struct.FILE* undef, i8* getelementptr ([8 x i8]* @.str1822946, i32 0, i32 0), i32 %1, i8* undef) nounwind ; [#uses=0]
74 %4 = call arm_apcscc i32 @"\01_fwrite"(i8* getelementptr ([11 x i8]* @.str1842948, i32 0, i32 0), i32 1, i32 10, i8* undef) nounwind ; [#uses=0]
73 %3 = call i32 (%struct.FILE*, i8*, ...)* @fprintf(%struct.FILE* undef, i8* getelementptr ([8 x i8]* @.str1822946, i32 0, i32 0), i32 %1, i8* undef) nounwind ; [#uses=0]
74 %4 = call i32 @"\01_fwrite"(i8* getelementptr ([11 x i8]* @.str1842948, i32 0, i32 0), i32 1, i32 10, i8* undef) nounwind ; [#uses=0]
7575 %5 = sub i32 %colmark, undef ; [#uses=1]
7676 %6 = sub i32 %rowmark, undef ; [#uses=1]
7777 %7 = load %struct.FILE** @out_fp, align 4 ; <%struct.FILE*> [#uses=1]
78 %8 = call arm_apcscc i32 (%struct.FILE*, i8*, ...)* @fprintf(%struct.FILE* %7, i8* getelementptr ([17 x i8]* @.str212784, i32 0, i32 0), i32 %5, i32 %6) nounwind ; [#uses=0]
78 %8 = call i32 (%struct.FILE*, i8*, ...)* @fprintf(%struct.FILE* %7, i8* getelementptr ([17 x i8]* @.str212784, i32 0, i32 0), i32 %5, i32 %6) nounwind ; [#uses=0]
7979 store i32 0, i32* @cpexists, align 4
8080 %9 = getelementptr %struct.rec* %y.0, i32 0, i32 0, i32 3, i32 0, i32 0, i32 1 ; [#uses=1]
8181 %10 = load i32* %9, align 4 ; [#uses=1]
8282 %11 = sub i32 0, %10 ; [#uses=1]
8383 %12 = load %struct.FILE** @out_fp, align 4 ; <%struct.FILE*> [#uses=1]
84 %13 = call arm_apcscc i32 (%struct.FILE*, i8*, ...)* @fprintf(%struct.FILE* %12, i8* getelementptr ([17 x i8]* @.str212784, i32 0, i32 0), i32 undef, i32 %11) nounwind ; [#uses=0]
84 %13 = call i32 (%struct.FILE*, i8*, ...)* @fprintf(%struct.FILE* %12, i8* getelementptr ([17 x i8]* @.str212784, i32 0, i32 0), i32 undef, i32 %11) nounwind ; [#uses=0]
8585 store i32 0, i32* @cpexists, align 4
8686 br label %bb100.outer.outer
8787
131131 br label %bb2.i41
132132
133133 bb2.i.i15.critedge: ; preds = %bb.i47
134 %16 = call arm_apcscc i8* @fgets(i8* undef, i32 512, %struct.FILE* %0) nounwind ; [#uses=0]
134 %16 = call i8* @fgets(i8* undef, i32 512, %struct.FILE* %0) nounwind ; [#uses=0]
135135 %iftmp.560.0 = select i1 undef, i32 2, i32 0 ; [#uses=1]
136136 br label %bb100.outer
137137
5454 @.str1872951 = external constant [17 x i8], align 1 ; <[17 x i8]*> [#uses=1]
5555 @.str1932957 = external constant [26 x i8], align 1 ; <[26 x i8]*> [#uses=1]
5656
57 declare arm_apcscc i32 @fprintf(%struct.FILE* nocapture, i8* nocapture, ...) nounwind
58
59 declare arm_apcscc i32 @"\01_fwrite"(i8*, i32, i32, i8*)
60
61 declare arm_apcscc i32 @remove(i8* nocapture) nounwind
62
63 declare arm_apcscc %struct.FILE* @OpenIncGraphicFile(i8*, i8 zeroext, %struct.rec** nocapture, %struct.FILE_POS*, i32* nocapture) nounwind
64
65 declare arm_apcscc %struct.rec* @MakeWord(i32, i8* nocapture, %struct.FILE_POS*) nounwind
66
67 declare arm_apcscc void @Error(i32, i32, i8*, i32, %struct.FILE_POS*, ...) nounwind
68
69 declare arm_apcscc i32 @"\01_fputs"(i8*, %struct.FILE*)
70
71 declare arm_apcscc noalias i8* @calloc(i32, i32) nounwind
72
73 declare arm_apcscc i8* @fgets(i8*, i32, %struct.FILE* nocapture) nounwind
74
75 define arm_apcscc void @PS_PrintGraphicInclude(%struct.rec* %x, i32 %colmark, i32 %rowmark) nounwind {
57 declare i32 @fprintf(%struct.FILE* nocapture, i8* nocapture, ...) nounwind
58
59 declare i32 @"\01_fwrite"(i8*, i32, i32, i8*)
60
61 declare i32 @remove(i8* nocapture) nounwind
62
63 declare %struct.FILE* @OpenIncGraphicFile(i8*, i8 zeroext, %struct.rec** nocapture, %struct.FILE_POS*, i32* nocapture) nounwind
64
65 declare %struct.rec* @MakeWord(i32, i8* nocapture, %struct.FILE_POS*) nounwind
66
67 declare void @Error(i32, i32, i8*, i32, %struct.FILE_POS*, ...) nounwind
68
69 declare i32 @"\01_fputs"(i8*, %struct.FILE*)
70
71 declare noalias i8* @calloc(i32, i32) nounwind
72
73 declare i8* @fgets(i8*, i32, %struct.FILE* nocapture) nounwind
74
75 define void @PS_PrintGraphicInclude(%struct.rec* %x, i32 %colmark, i32 %rowmark) nounwind {
7676 entry:
7777 %buff = alloca [512 x i8], align 4 ; <[512 x i8]*> [#uses=5]
7878 %0 = getelementptr %struct.rec* %x, i32 0, i32 0, i32 1, i32 0, i32 0 ; [#uses=2]
9393 br i1 %8, label %bb2, label %bb3
9494
9595 bb2: ; preds = %bb1
96 call arm_apcscc void (i32, i32, i8*, i32, %struct.FILE_POS*, ...)* @Error(i32 1, i32 2, i8* getelementptr ([20 x i8]* @.str24239, i32 0, i32 0), i32 0, %struct.FILE_POS* bitcast (%4* @no_file_pos to %struct.FILE_POS*), i8* getelementptr ([40 x i8]* @.str1802944, i32 0, i32 0)) nounwind
96 call void (i32, i32, i8*, i32, %struct.FILE_POS*, ...)* @Error(i32 1, i32 2, i8* getelementptr ([20 x i8]* @.str24239, i32 0, i32 0), i32 0, %struct.FILE_POS* bitcast (%4* @no_file_pos to %struct.FILE_POS*), i8* getelementptr ([40 x i8]* @.str1802944, i32 0, i32 0)) nounwind
9797 br label %bb3
9898
9999 bb3: ; preds = %bb2, %bb1
107107 bb6: ; preds = %bb5
108108 %10 = load i8* %0, align 4 ; [#uses=1]
109109 %11 = getelementptr %struct.rec* %y.0, i32 0, i32 0, i32 1, i32 0 ; <%struct.FILE_POS*> [#uses=1]
110 %12 = call arm_apcscc %struct.FILE* @OpenIncGraphicFile(i8* undef, i8 zeroext %10, %struct.rec** null, %struct.FILE_POS* %11, i32* undef) nounwind ; <%struct.FILE*> [#uses=4]
110 %12 = call %struct.FILE* @OpenIncGraphicFile(i8* undef, i8 zeroext %10, %struct.rec** null, %struct.FILE_POS* %11, i32* undef) nounwind ; <%struct.FILE*> [#uses=4]
111111 br i1 false, label %bb7, label %bb8
112112
113113 bb7: ; preds = %bb6
123123 br i1 %15, label %bb.i, label %FontHalfXHeight.exit
124124
125125 bb.i: ; preds = %bb9
126 call arm_apcscc void (i32, i32, i8*, i32, %struct.FILE_POS*, ...)* @Error(i32 1, i32 2, i8* getelementptr ([20 x i8]* @.str24239, i32 0, i32 0), i32 0, %struct.FILE_POS* bitcast (%4* @no_file_pos to %struct.FILE_POS*), i8* getelementptr ([17 x i8]* @.str111875, i32 0, i32 0)) nounwind
126 call void (i32, i32, i8*, i32, %struct.FILE_POS*, ...)* @Error(i32 1, i32 2, i8* getelementptr ([20 x i8]* @.str24239, i32 0, i32 0), i32 0, %struct.FILE_POS* bitcast (%4* @no_file_pos to %struct.FILE_POS*), i8* getelementptr ([17 x i8]* @.str111875, i32 0, i32 0)) nounwind
127127 %.pre186 = load i32* @currentfont, align 4 ; [#uses=1]
128128 br label %FontHalfXHeight.exit
129129
138138 br i1 undef, label %bb2.i, label %FontSize.exit
139139
140140 bb2.i: ; preds = %bb1.i
141 call arm_apcscc void (i32, i32, i8*, i32, %struct.FILE_POS*, ...)* @Error(i32 37, i32 61, i8* getelementptr ([30 x i8]* @.str101874, i32 0, i32 0), i32 1, %struct.FILE_POS* null) nounwind
141 call void (i32, i32, i8*, i32, %struct.FILE_POS*, ...)* @Error(i32 37, i32 61, i8* getelementptr ([30 x i8]* @.str101874, i32 0, i32 0), i32 1, %struct.FILE_POS* null) nounwind
142142 unreachable
143143
144144 FontSize.exit: ; preds = %bb1.i
150150 br i1 %21, label %bb.i5, label %FontName.exit
151151
152152 bb.i5: ; preds = %FontSize.exit
153 call arm_apcscc void (i32, i32, i8*, i32, %struct.FILE_POS*, ...)* @Error(i32 1, i32 2, i8* getelementptr ([20 x i8]* @.str24239, i32 0, i32 0), i32 0, %struct.FILE_POS* bitcast (%4* @no_file_pos to %struct.FILE_POS*), i8* getelementptr ([10 x i8]* @.str81872, i32 0, i32 0)) nounwind
153 call void (i32, i32, i8*, i32, %struct.FILE_POS*, ...)* @Error(i32 1, i32 2, i8* getelementptr ([20 x i8]* @.str24239, i32 0, i32 0), i32 0, %struct.FILE_POS* bitcast (%4* @no_file_pos to %struct.FILE_POS*), i8* getelementptr ([10 x i8]* @.str81872, i32 0, i32 0)) nounwind
154154 br label %FontName.exit
155155
156156 FontName.exit: ; preds = %bb.i5, %FontSize.exit
157157 %22 = phi %struct.FONT_INFO* [ undef, %bb.i5 ], [ undef, %FontSize.exit ] ; <%struct.FONT_INFO*> [#uses=1]
158158 %23 = getelementptr %struct.FONT_INFO* %22, i32 %19, i32 5 ; <%struct.rec**> [#uses=0]
159 %24 = call arm_apcscc i32 (%struct.FILE*, i8*, ...)* @fprintf(%struct.FILE* undef, i8* getelementptr ([8 x i8]* @.str1822946, i32 0, i32 0), i32 %18, i8* null) nounwind ; [#uses=0]
159 %24 = call i32 (%struct.FILE*, i8*, ...)* @fprintf(%struct.FILE* undef, i8* getelementptr ([8 x i8]* @.str1822946, i32 0, i32 0), i32 %18, i8* null) nounwind ; [#uses=0]
160160 br label %bb10
161161
162162 bb10: ; preds = %FontName.exit, %bb8
163 %25 = call arm_apcscc i32 @"\01_fwrite"(i8* getelementptr ([11 x i8]* @.str1842948, i32 0, i32 0), i32 1, i32 10, i8* undef) nounwind ; [#uses=0]
163 %25 = call i32 @"\01_fwrite"(i8* getelementptr ([11 x i8]* @.str1842948, i32 0, i32 0), i32 1, i32 10, i8* undef) nounwind ; [#uses=0]
164164 %26 = sub i32 %rowmark, undef ; [#uses=1]
165165 %27 = load %struct.FILE** @out_fp, align 4 ; <%struct.FILE*> [#uses=1]
166 %28 = call arm_apcscc i32 (%struct.FILE*, i8*, ...)* @fprintf(%struct.FILE* %27, i8* getelementptr ([17 x i8]* @.str212784, i32 0, i32 0), i32 undef, i32 %26) nounwind ; [#uses=0]
166 %28 = call i32 (%struct.FILE*, i8*, ...)* @fprintf(%struct.FILE* %27, i8* getelementptr ([17 x i8]* @.str212784, i32 0, i32 0), i32 undef, i32 %26) nounwind ; [#uses=0]
167167 store i32 0, i32* @cpexists, align 4
168 %29 = call arm_apcscc i32 (%struct.FILE*, i8*, ...)* @fprintf(%struct.FILE* undef, i8* getelementptr ([17 x i8]* @.str192782, i32 0, i32 0), double 2.000000e+01, double 2.000000e+01) nounwind ; [#uses=0]
168 %29 = call i32 (%struct.FILE*, i8*, ...)* @fprintf(%struct.FILE* undef, i8* getelementptr ([17 x i8]* @.str192782, i32 0, i32 0), double 2.000000e+01, double 2.000000e+01) nounwind ; [#uses=0]
169169 %30 = getelementptr %struct.rec* %y.0, i32 0, i32 0, i32 3, i32 0, i32 0, i32 0 ; [#uses=1]
170170 %31 = load i32* %30, align 4 ; [#uses=1]
171171 %32 = sub i32 0, %31 ; [#uses=1]
172172 %33 = load i32* undef, align 4 ; [#uses=1]
173173 %34 = sub i32 0, %33 ; [#uses=1]
174174 %35 = load %struct.FILE** @out_fp, align 4 ; <%struct.FILE*> [#uses=1]
175 %36 = call arm_apcscc i32 (%struct.FILE*, i8*, ...)* @fprintf(%struct.FILE* %35, i8* getelementptr ([17 x i8]* @.str212784, i32 0, i32 0), i32 %32, i32 %34) nounwind ; [#uses=0]
175 %36 = call i32 (%struct.FILE*, i8*, ...)* @fprintf(%struct.FILE* %35, i8* getelementptr ([17 x i8]* @.str212784, i32 0, i32 0), i32 %32, i32 %34) nounwind ; [#uses=0]
176176 store i32 0, i32* @cpexists, align 4
177177 %37 = load %struct.rec** null, align 4 ; <%struct.rec*> [#uses=1]
178178 %38 = getelementptr %struct.rec* %37, i32 0, i32 0, i32 4 ; <%struct.FOURTH_UNION*> [#uses=1]
179 %39 = call arm_apcscc i32 (%struct.FILE*, i8*, ...)* @fprintf(%struct.FILE* undef, i8* getelementptr ([23 x i8]* @.str1852949, i32 0, i32 0), %struct.FOURTH_UNION* %38) nounwind ; [#uses=0]
179 %39 = call i32 (%struct.FILE*, i8*, ...)* @fprintf(%struct.FILE* undef, i8* getelementptr ([23 x i8]* @.str1852949, i32 0, i32 0), %struct.FOURTH_UNION* %38) nounwind ; [#uses=0]
180180 %buff14 = getelementptr [512 x i8]* %buff, i32 0, i32 0 ; [#uses=5]
181 %40 = call arm_apcscc i8* @fgets(i8* %buff14, i32 512, %struct.FILE* %12) nounwind ; [#uses=0]
181 %40 = call i8* @fgets(i8* %buff14, i32 512, %struct.FILE* %12) nounwind ; [#uses=0]
182182 %iftmp.506.0 = select i1 undef, i32 2, i32 0 ; [#uses=1]
183183 %41 = getelementptr [512 x i8]* %buff, i32 0, i32 26 ; [#uses=1]
184184 br label %bb100.outer.outer
229229 br i1 %50, label %bb24, label %bb2.i.i68
230230
231231 bb24: ; preds = %bb3.i77
232 %51 = call arm_apcscc %struct.rec* @MakeWord(i32 11, i8* %41, %struct.FILE_POS* bitcast (%4* @no_file_pos to %struct.FILE_POS*)) nounwind ; <%struct.rec*> [#uses=0]
232 %51 = call %struct.rec* @MakeWord(i32 11, i8* %41, %struct.FILE_POS* bitcast (%4* @no_file_pos to %struct.FILE_POS*)) nounwind ; <%struct.rec*> [#uses=0]
233233 %52 = load i8* getelementptr ([150 x i8]* @zz_lengths, i32 0, i32 0), align 4 ; [#uses=1]
234234 %53 = zext i8 %52 to i32 ; [#uses=2]
235235 %54 = getelementptr [524 x %struct.rec*]* @zz_free, i32 0, i32 %53 ; <%struct.rec**> [#uses=2]
244244 br i1 undef, label %bb1.i58, label %bb2.i60
245245
246246 bb1.i58: ; preds = %bb.i56
247 call arm_apcscc void (i32, i32, i8*, i32, %struct.FILE_POS*, ...)* @Error(i32 31, i32 1, i8* getelementptr ([32 x i8]* @.str1575, i32 0, i32 0), i32 1, %struct.FILE_POS* bitcast (%4* @no_file_pos to %struct.FILE_POS*)) nounwind
247 call void (i32, i32, i8*, i32, %struct.FILE_POS*, ...)* @Error(i32 31, i32 1, i8* getelementptr ([32 x i8]* @.str1575, i32 0, i32 0), i32 1, %struct.FILE_POS* bitcast (%4* @no_file_pos to %struct.FILE_POS*)) nounwind
248248 br label %bb2.i60
249249
250250 bb2.i60: ; preds = %bb1.i58, %bb.i56
286286 br label %bb41
287287
288288 bb41: ; preds = %bb37, %bb35
289 %61 = call arm_apcscc i8* @fgets(i8* %buff14, i32 512, %struct.FILE* %12) nounwind ; [#uses=1]
289 %61 = call i8* @fgets(i8* %buff14, i32 512, %struct.FILE* %12) nounwind ; [#uses=1]
290290 %62 = icmp eq i8* %61, null ; [#uses=1]
291291 %iftmp.554.0 = select i1 %62, i32 2, i32 1 ; [#uses=1]
292292 br label %bb100.outer
341341 br i1 undef, label %bb2.i6.i26, label %bb55
342342
343343 bb55: ; preds = %bb2.i6.i26
344 %69 = call arm_apcscc i32 @"\01_fputs"(i8* %buff14, %struct.FILE* undef) nounwind ; [#uses=0]
344 %69 = call i32 @"\01_fputs"(i8* %buff14, %struct.FILE* undef) nounwind ; [#uses=0]
345345 unreachable
346346
347347 bb58: ; preds = %StringBeginsWith.exit.i20
348 %70 = call arm_apcscc i8* @fgets(i8* %buff14, i32 512, %struct.FILE* %12) nounwind ; [#uses=0]
348 %70 = call i8* @fgets(i8* %buff14, i32 512, %struct.FILE* %12) nounwind ; [#uses=0]
349349 %iftmp.560.0 = select i1 undef, i32 2, i32 0 ; [#uses=1]
350350 br label %bb100.outer
351351
366366 br i1 %phitmp93, label %bb66, label %bb2.i.i
367367
368368 bb66: ; preds = %StringBeginsWith.exit
369 %71 = call arm_apcscc %struct.rec* @MakeWord(i32 11, i8* undef, %struct.FILE_POS* bitcast (%4* @no_file_pos to %struct.FILE_POS*)) nounwind ; <%struct.rec*> [#uses=4]
369 %71 = call %struct.rec* @MakeWord(i32 11, i8* undef, %struct.FILE_POS* bitcast (%4* @no_file_pos to %struct.FILE_POS*)) nounwind ; <%struct.rec*> [#uses=4]
370370 %72 = load i8* getelementptr ([150 x i8]* @zz_lengths, i32 0, i32 0), align 4 ; [#uses=1]
371371 %73 = zext i8 %72 to i32 ; [#uses=2]
372372 %74 = getelementptr [524 x %struct.rec*]* @zz_free, i32 0, i32 %73 ; <%struct.rec**> [#uses=2]
378378 br i1 undef, label %bb.i2, label %GetMemory.exit
379379
380380 bb.i2: ; preds = %bb69
381 %77 = call arm_apcscc noalias i8* @calloc(i32 1020, i32 4) nounwind ; [#uses=1]
381 %77 = call noalias i8* @calloc(i32 1020, i32 4) nounwind ; [#uses=1]
382382 %78 = bitcast i8* %77 to i8** ; [#uses=3]
383383 store i8** %78, i8*** @next_free.4772, align 4
384384 br i1 undef, label %bb1.i3, label %bb2.i4
385385
386386 bb1.i3: ; preds = %bb.i2
387 call arm_apcscc void (i32, i32, i8*, i32, %struct.FILE_POS*, ...)* @Error(i32 31, i32 1, i8* getelementptr ([32 x i8]* @.str1575, i32 0, i32 0), i32 1, %struct.FILE_POS* bitcast (%4* @no_file_pos to %struct.FILE_POS*)) nounwind
387 call void (i32, i32, i8*, i32, %struct.FILE_POS*, ...)* @Error(i32 31, i32 1, i8* getelementptr ([32 x i8]* @.str1575, i32 0, i32 0), i32 1, %struct.FILE_POS* bitcast (%4* @no_file_pos to %struct.FILE_POS*)) nounwind
388388 br label %bb2.i4
389389
390390 bb2.i4: ; preds = %bb1.i3, %bb.i2
481481 unreachable
482482
483483 bb94: ; preds = %strip_out.exit, %StringBeginsWith.exit.i
484 %96 = call arm_apcscc i8* @fgets(i8* %buff14, i32 512, %struct.FILE* %12) nounwind ; [#uses=0]
484 %96 = call i8* @fgets(i8* %buff14, i32 512, %struct.FILE* %12) nounwind ; [#uses=0]
485485 unreachable
486486
487487 bb100.outer: ; preds = %bb58, %bb41, %bb100.outer.outer
496496 br i1 %97, label %bb103, label %bb102
497497
498498 bb102: ; preds = %bb101.split
499 %98 = call arm_apcscc i32 @remove(i8* getelementptr ([9 x i8]* @.str19294, i32 0, i32 0)) nounwind ; [#uses=0]
499 %98 = call i32 @remove(i8* getelementptr ([9 x i8]* @.str19294, i32 0, i32 0)) nounwind ; [#uses=0]
500500 unreachable
501501
502502 bb103: ; preds = %bb101.split
503503 %99 = load %struct.FILE** @out_fp, align 4 ; <%struct.FILE*> [#uses=1]
504 %100 = call arm_apcscc i32 (%struct.FILE*, i8*, ...)* @fprintf(%struct.FILE* %99, i8* getelementptr ([26 x i8]* @.str1932957, i32 0, i32 0)) nounwind ; [#uses=0]
504 %100 = call i32 (%struct.FILE*, i8*, ...)* @fprintf(%struct.FILE* %99, i8* getelementptr ([26 x i8]* @.str1932957, i32 0, i32 0)) nounwind ; [#uses=0]
505505 store i32 0, i32* @wordcount, align 4
506506 ret void
507507 }
77 %struct.Results = type { float, float, float }
88 %struct.Village = type { [4 x %struct.Village*], %struct.Village*, %struct.List, %struct.Hosp, i32, i32 }
99
10 define arm_apcscc void @get_results(%struct.Results* noalias nocapture sret %agg.result, %struct.Village* %village) nounwind {
10 define void @get_results(%struct.Results* noalias nocapture sret %agg.result, %struct.Village* %village) nounwind {
1111 entry:
1212 br i1 undef, label %bb, label %bb6.preheader
1313
55 %struct.Patient = type { i32, i32, i32, %struct.Village* }
66 %struct.Village = type { [4 x %struct.Village*], %struct.Village*, %struct.List, %struct.Hosp, i32, i32 }
77
8 define arm_apcscc %struct.List* @sim(%struct.Village* %village) nounwind {
8 define %struct.List* @sim(%struct.Village* %village) nounwind {
99 entry:
1010 br i1 undef, label %bb14, label %bb3.preheader
1111
55 %struct.Patient = type { i32, i32, i32, %struct.Village* }
66 %struct.Village = type { [4 x %struct.Village*], %struct.Village*, %struct.List, %struct.Hosp, i32, i32 }
77
8 define arm_apcscc %struct.List* @sim(%struct.Village* %village) nounwind {
8 define %struct.List* @sim(%struct.Village* %village) nounwind {
99 entry:
1010 br i1 undef, label %bb14, label %bb3.preheader
1111
2727 %struct.jvirt_barray_control = type { [64 x i16]**, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, %struct.jvirt_barray_control*, %struct.backing_store_info }
2828 %struct.jvirt_sarray_control = type { i8**, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, %struct.jvirt_sarray_control*, %struct.backing_store_info }
2929
30 define arm_apcscc void @jpeg_idct_float(%struct.jpeg_decompress_struct* nocapture %cinfo, %struct.jpeg_component_info* nocapture %compptr, i16* nocapture %coef_block, i8** nocapture %output_buf, i32 %output_col) nounwind {
30 define void @jpeg_idct_float(%struct.jpeg_decompress_struct* nocapture %cinfo, %struct.jpeg_component_info* nocapture %compptr, i16* nocapture %coef_block, i8** nocapture %output_buf, i32 %output_col) nounwind {
3131 entry:
3232 br label %bb
3333
0 ; RUN: llc < %s -mtriple=thumbv7-apple-darwin -mattr=+vfp2
11
2 define arm_apcscc float @t1(i32 %v0) nounwind {
2 define float @t1(i32 %v0) nounwind {
33 entry:
44 store i32 undef, i32* undef, align 4
55 %0 = load [4 x i8]** undef, align 4 ; <[4 x i8]*> [#uses=1]
33
44 @getNeighbour = external global void (i32, i32, i32, i32, %struct.pix_pos*)*, align 4 ; [#uses=2]
55
6 define arm_apcscc void @t() nounwind {
6 define void @t() nounwind {
77 ; CHECK: t:
88 ; CHECK: it eq
99 ; CHECK-NEXT: cmpeq
4646 %tmp14.i302 = load i32* undef ; [#uses=4]
4747 %add.i307452 = or i32 %shl1959, 1 ; [#uses=1]
4848 %sub.i308 = add i32 %shl, -1 ; [#uses=4]
49 call arm_apcscc void undef(i32 %tmp14.i302, i32 %sub.i308, i32 %shl1959, i32 0, %struct.pix_pos* undef) nounwind
49 call void undef(i32 %tmp14.i302, i32 %sub.i308, i32 %shl1959, i32 0, %struct.pix_pos* undef) nounwind
5050 %tmp49.i309 = load void (i32, i32, i32, i32, %struct.pix_pos*)** @getNeighbour ; [#uses=1]
51 call arm_apcscc void %tmp49.i309(i32 %tmp14.i302, i32 %sub.i308, i32 %add.i307452, i32 0, %struct.pix_pos* null) nounwind
51 call void %tmp49.i309(i32 %tmp14.i302, i32 %sub.i308, i32 %add.i307452, i32 0, %struct.pix_pos* null) nounwind
5252 %tmp49.1.i = load void (i32, i32, i32, i32, %struct.pix_pos*)** @getNeighbour ; [#uses=1]
53 call arm_apcscc void %tmp49.1.i(i32 %tmp14.i302, i32 %sub.i308, i32 undef, i32 0, %struct.pix_pos* %arrayidx56.2.i) nounwind
54 call arm_apcscc void undef(i32 %tmp14.i302, i32 %sub.i308, i32 undef, i32 0, %struct.pix_pos* %arrayidx56.3.i) nounwind
53 call void %tmp49.1.i(i32 %tmp14.i302, i32 %sub.i308, i32 undef, i32 0, %struct.pix_pos* %arrayidx56.2.i) nounwind
54 call void undef(i32 %tmp14.i302, i32 %sub.i308, i32 undef, i32 0, %struct.pix_pos* %arrayidx56.3.i) nounwind
5555 unreachable
5656
5757 if.else2003: ; preds = %for.body1940
0 ; RUN: llc < %s -mtriple=thumbv7-apple-darwin -relocation-model=pic -disable-fp-elim -mcpu=cortex-a8
11
2 define arm_apcscc void @get_initial_mb16x16_cost() nounwind {
2 define void @get_initial_mb16x16_cost() nounwind {
33 entry:
44 br i1 undef, label %bb4, label %bb1
55
22 %struct.OP = type { %struct.OP*, %struct.OP*, %struct.OP* ()*, i32, i16, i16, i8, i8 }
33 %struct.SV = type { i8*, i32, i32 }
44
5 declare arm_apcscc void @Perl_mg_set(%struct.SV*) nounwind
5 declare void @Perl_mg_set(%struct.SV*) nounwind
66
7 define arm_apcscc %struct.OP* @Perl_pp_complement() nounwind {
7 define %struct.OP* @Perl_pp_complement() nounwind {
88 entry:
99 %0 = load %struct.SV** null, align 4 ; <%struct.SV*> [#uses=2]
1010 br i1 undef, label %bb21, label %bb5
2222 %4 = bitcast i8* %3 to i32* ; [#uses=1]
2323 %5 = load i32* %4, align 4 ; [#uses=1]
2424 %storemerge5 = xor i32 %5, -1 ; [#uses=1]
25 call arm_apcscc void @Perl_sv_setiv(%struct.SV* undef, i32 %storemerge5) nounwind
25 call void @Perl_sv_setiv(%struct.SV* undef, i32 %storemerge5) nounwind
2626 %6 = getelementptr inbounds %struct.SV* undef, i32 0, i32 2 ; [#uses=1]
2727 %7 = load i32* %6, align 4 ; [#uses=1]
2828 %8 = and i32 %7, 16384 ; [#uses=1]
3333 unreachable
3434
3535 bb11: ; preds = %bb7
36 call arm_apcscc void @Perl_mg_set(%struct.SV* undef) nounwind
36 call void @Perl_mg_set(%struct.SV* undef) nounwind
3737 br label %bb12
3838
3939 bb12: ; preds = %bb11, %bb7
4141 br label %bb44
4242
4343 bb13: ; preds = %bb5
44 %10 = call arm_apcscc i32 @Perl_sv_2uv(%struct.SV* %0) nounwind ; [#uses=0]
44 %10 = call i32 @Perl_sv_2uv(%struct.SV* %0) nounwind ; [#uses=0]
4545 br i1 undef, label %bb.i, label %bb1.i
4646
4747 bb.i: ; preds = %bb13
48 call arm_apcscc void @Perl_sv_setiv(%struct.SV* undef, i32 undef) nounwind
48 call void @Perl_sv_setiv(%struct.SV* undef, i32 undef) nounwind
4949 br label %Perl_sv_setuv.exit
5050
5151 bb1.i: ; preds = %bb13
5959 br i1 %14, label %bb20, label %bb19
6060
6161 bb19: ; preds = %Perl_sv_setuv.exit
62 call arm_apcscc void @Perl_mg_set(%struct.SV* undef) nounwind
62 call void @Perl_mg_set(%struct.SV* undef) nounwind
6363 br label %bb20
6464
6565 bb20: ; preds = %bb19, %Perl_sv_setuv.exit
7979 ret %struct.OP* undef
8080 }
8181
82 declare arm_apcscc void @Perl_sv_setiv(%struct.SV*, i32) nounwind
82 declare void @Perl_sv_setiv(%struct.SV*, i32) nounwind
8383
84 declare arm_apcscc i32 @Perl_sv_2uv(%struct.SV*) nounwind
84 declare i32 @Perl_sv_2uv(%struct.SV*) nounwind
0 ; RUN: llc < %s -mtriple=thumbv7-apple-darwin10
11 ; rdar://7394794
22
3 define arm_apcscc void @lshift_double(i64 %l1, i64 %h1, i64 %count, i32 %prec, i64* nocapture %lv, i64* nocapture %hv, i32 %arith) nounwind {
3 define void @lshift_double(i64 %l1, i64 %h1, i64 %count, i32 %prec, i64* nocapture %lv, i64* nocapture %hv, i32 %arith) nounwind {
44 entry:
55 %..i = select i1 false, i64 0, i64 0 ; [#uses=1]
66 br i1 undef, label %bb11.i, label %bb6.i
0 ; RUN: opt < %s -std-compile-opts | \
11 ; RUN: llc -mtriple=thumbv7-apple-darwin10 -mattr=+neon | FileCheck %s
22
3 define arm_apcscc void @fred(i32 %three_by_three, i8* %in, double %dt1, i32 %x_size, i32 %y_size, i8* %bp) nounwind {
3 define void @fred(i32 %three_by_three, i8* %in, double %dt1, i32 %x_size, i32 %y_size, i8* %bp) nounwind {
44 entry:
55 ; -- The loop following the load should only use a single add-literation
66 ; instruction.
4444 store i8* %bp, i8** %bp_addr
4545 %0 = load i8** %in_addr, align 4 ; [#uses=1]
4646 store i8* %0, i8** %out, align 4
47 %1 = call arm_apcscc i32 (...)* @foo() nounwind ; [#uses=1]
47 %1 = call i32 (...)* @foo() nounwind ; [#uses=1]
4848 store i32 %1, i32* %i, align 4
4949 %2 = load i32* %three_by_three_addr, align 4 ; [#uses=1]
5050 %3 = icmp eq i32 %2, 0 ; [#uses=1]
7575 %15 = load i32* %n_max, align 4 ; [#uses=1]
7676 %16 = load i32* %n_max, align 4 ; [#uses=1]
7777 %17 = mul i32 %15, %16 ; [#uses=1]
78 %18 = call arm_apcscc noalias i8* @malloc(i32 %17) nounwind ; [#uses=1]
78 %18 = call noalias i8* @malloc(i32 %17) nounwind ; [#uses=1]
7979 store i8* %18, i8** %dp, align 4
8080 %19 = load i8** %dp, align 4 ; [#uses=1]
8181 store i8* %19, i8** %dpt, align 4
122122 ret void
123123 }
124124
125 declare arm_apcscc i32 @foo(...)
125 declare i32 @foo(...)
126126
127 declare arm_apcscc noalias i8* @malloc(i32) nounwind
127 declare noalias i8* @malloc(i32) nounwind
1616 @_ZN3WTFL12thread_heapsE = internal global %"struct.WTF::TCMalloc_ThreadCache"* null ; <%"struct.WTF::TCMalloc_ThreadCache"**> [#uses=1]
1717 @llvm.used = appending global [1 x i8*] [i8* bitcast (%"struct.WTF::TCMalloc_ThreadCache"* ()* @_ZN3WTF20TCMalloc_ThreadCache22CreateCacheIfNecessaryEv to i8*)], section "llvm.metadata" ; <[1 x i8*]*> [#uses=0]
1818
19 define arm_apcscc %"struct.WTF::TCMalloc_ThreadCache"* @_ZN3WTF20TCMalloc_ThreadCache22CreateCacheIfNecessaryEv() nounwind {
19 define %"struct.WTF::TCMalloc_ThreadCache"* @_ZN3WTF20TCMalloc_ThreadCache22CreateCacheIfNecessaryEv() nounwind {
2020 entry:
21 %0 = tail call arm_apcscc i32 @pthread_mutex_lock(%struct.PlatformMutex* getelementptr inbounds (%struct.SpinLock* @_ZN3WTFL13pageheap_lockE, i32 0, i32 0)) nounwind
21 %0 = tail call i32 @pthread_mutex_lock(%struct.PlatformMutex* getelementptr inbounds (%struct.SpinLock* @_ZN3WTFL13pageheap_lockE, i32 0, i32 0)) nounwind
2222 %.b24 = load i1* @_ZN3WTFL10tsd_initedE.b, align 4 ; [#uses=1]
2323 br i1 %.b24, label %bb5, label %bb6
2424
2525 bb5: ; preds = %entry
26 %1 = tail call arm_apcscc %struct._opaque_pthread_t* @pthread_self() nounwind
26 %1 = tail call %struct._opaque_pthread_t* @pthread_self() nounwind
2727 br label %bb6
2828
2929 bb6: ; preds = %bb5, %entry
3333 bb7: ; preds = %bb11
3434 %2 = getelementptr inbounds %"struct.WTF::TCMalloc_ThreadCache"* %h.0, i32 0, i32 1
3535 %3 = load %struct._opaque_pthread_t** %2, align 4
36 %4 = tail call arm_apcscc i32 @pthread_equal(%struct._opaque_pthread_t* %3, %struct._opaque_pthread_t* %me.0) nounwind
36 %4 = tail call i32 @pthread_equal(%struct._opaque_pthread_t* %3, %struct._opaque_pthread_t* %me.0) nounwind
3737 %5 = icmp eq i32 %4, 0
3838 br i1 %5, label %bb10, label %bb14
3939
4848 br i1 %7, label %bb13, label %bb7
4949
5050 bb13: ; preds = %bb11
51 %8 = tail call arm_apcscc %"struct.WTF::TCMalloc_ThreadCache"* @_ZN3WTF20TCMalloc_ThreadCache7NewHeapEP17_opaque_pthread_t(%struct._opaque_pthread_t* %me.0) nounwind
51 %8 = tail call %"struct.WTF::TCMalloc_ThreadCache"* @_ZN3WTF20TCMalloc_ThreadCache7NewHeapEP17_opaque_pthread_t(%struct._opaque_pthread_t* %me.0) nounwind
5252 br label %bb14
5353
5454 bb14: ; preds = %bb13, %bb7
5555 %heap.1 = phi %"struct.WTF::TCMalloc_ThreadCache"* [ %8, %bb13 ], [ %h.0, %bb7 ] ; <%"struct.WTF::TCMalloc_ThreadCache"*> [#uses=4]
56 %9 = tail call arm_apcscc i32 @pthread_mutex_unlock(%struct.PlatformMutex* getelementptr inbounds (%struct.SpinLock* @_ZN3WTFL13pageheap_lockE, i32 0, i32 0)) nounwind
56 %9 = tail call i32 @pthread_mutex_unlock(%struct.PlatformMutex* getelementptr inbounds (%struct.SpinLock* @_ZN3WTFL13pageheap_lockE, i32 0, i32 0)) nounwind
5757 %10 = getelementptr inbounds %"struct.WTF::TCMalloc_ThreadCache"* %heap.1, i32 0, i32 2
5858 %11 = load i8* %10, align 4
5959 %toBool15not = icmp eq i8 %11, 0 ; [#uses=1]
6767 store i8 1, i8* %10, align 4
6868 %12 = load i32* @_ZN3WTFL8heap_keyE, align 4
6969 %13 = bitcast %"struct.WTF::TCMalloc_ThreadCache"* %heap.1 to i8*
70 %14 = tail call arm_apcscc i32 @pthread_setspecific(i32 %12, i8* %13) nounwind
70 %14 = tail call i32 @pthread_setspecific(i32 %12, i8* %13) nounwind
7171 ret %"struct.WTF::TCMalloc_ThreadCache"* %heap.1
7272
7373 bb22: ; preds = %bb19, %bb14
7474 ret %"struct.WTF::TCMalloc_ThreadCache"* %heap.1
7575 }
7676
77 declare arm_apcscc i32 @pthread_mutex_lock(%struct.PlatformMutex*)
77 declare i32 @pthread_mutex_lock(%struct.PlatformMutex*)
7878
79 declare arm_apcscc i32 @pthread_mutex_unlock(%struct.PlatformMutex*)
79 declare i32 @pthread_mutex_unlock(%struct.PlatformMutex*)
8080
81 declare hidden arm_apcscc %"struct.WTF::TCMalloc_ThreadCache"* @_ZN3WTF20TCMalloc_ThreadCache7NewHeapEP17_opaque_pthread_t(%struct._opaque_pthread_t*) nounwind
81 declare hidden %"struct.WTF::TCMalloc_ThreadCache"* @_ZN3WTF20TCMalloc_ThreadCache7NewHeapEP17_opaque_pthread_t(%struct._opaque_pthread_t*) nounwind
8282
83 declare arm_apcscc i32 @pthread_setspecific(i32, i8*)
83 declare i32 @pthread_setspecific(i32, i8*)
8484
85 declare arm_apcscc %struct._opaque_pthread_t* @pthread_self()
85 declare %struct._opaque_pthread_t* @pthread_self()
8686
87 declare arm_apcscc i32 @pthread_equal(%struct._opaque_pthread_t*, %struct._opaque_pthread_t*)
87 declare i32 @pthread_equal(%struct._opaque_pthread_t*, %struct._opaque_pthread_t*)
8888
55 target datalayout = "e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:32:32-f32:32:32-f64:32:32-v64:64:64-v128:128:128-a0:0:32-n32"
66 target triple = "thumbv7-apple-darwin10"
77
8 declare arm_apcscc void @etoe53(i16* nocapture, i16* nocapture) nounwind
8 declare void @etoe53(i16* nocapture, i16* nocapture) nounwind
99
10 define arm_apcscc void @earith(double* nocapture %value, i32 %icode, double* nocapture %r1, double* nocapture %r2) nounwind {
10 define void @earith(double* nocapture %value, i32 %icode, double* nocapture %r1, double* nocapture %r2) nounwind {
1111 entry:
1212 %v = alloca [6 x i16], align 4 ; <[6 x i16]*> [#uses=1]
1313 br i1 undef, label %bb2.i, label %bb5
1414
1515 bb2.i: ; preds = %entry
1616 %0 = bitcast double* %value to i16* ; [#uses=1]
17 call arm_apcscc void @etoe53(i16* null, i16* %0) nounwind
17 call void @etoe53(i16* null, i16* %0) nounwind
1818 ret void
1919
2020 bb5: ; preds = %entry
4747 bb46: ; preds = %bb26, %bb10
4848 %1 = bitcast double* %value to i16* ; [#uses=1]
4949 %v47 = getelementptr inbounds [6 x i16]* %v, i32 0, i32 0 ; [#uses=1]
50 call arm_apcscc void @etoe53(i16* %v47, i16* %1) nounwind
50 call void @etoe53(i16* %v47, i16* %1) nounwind
5151 ret void
5252 }
0 ; RUN: llc < %s -mtriple=thumbv7-apple-darwin | FileCheck %s
11 target datalayout = "e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:32:32-f32:32:32-f64:32:32-v64:64:64-v128:128:128-a0:0:32-n32"
22
3 define arm_apcscc i32 @test(i32 %n) nounwind {
3 define i32 @test(i32 %n) nounwind {
44 ; CHECK: test:
55 ; CHECK-NOT: mov
66 ; CHECK: return
1515 bb: ; preds = %bb.nph, %bb
1616 %indvar = phi i32 [ 0, %bb.nph ], [ %indvar.next, %bb ] ; [#uses=1]
1717 %u.05 = phi i64 [ undef, %bb.nph ], [ %ins, %bb ] ; [#uses=1]
18 %1 = tail call arm_apcscc i32 @f() nounwind ; [#uses=1]
18 %1 = tail call i32 @f() nounwind ; [#uses=1]
1919 %tmp4 = zext i32 %1 to i64 ; [#uses=1]
2020 %mask = and i64 %u.05, -4294967296 ; [#uses=1]
2121 %ins = or i64 %tmp4, %mask ; [#uses=2]
22 tail call arm_apcscc void @g(i64 %ins) nounwind
22 tail call void @g(i64 %ins) nounwind
2323 %indvar.next = add i32 %indvar, 1 ; [#uses=2]
2424 %exitcond = icmp eq i32 %indvar.next, %tmp ; [#uses=1]
2525 br i1 %exitcond, label %return, label %bb
2828 ret i32 undef
2929 }
3030
31 define arm_apcscc i32 @test_dead_cycle(i32 %n) nounwind {
31 define i32 @test_dead_cycle(i32 %n) nounwind {
3232 ; CHECK: test_dead_cycle:
3333 ; CHECK: blx
3434 ; CHECK-NOT: mov
4949 br i1 %1, label %bb1, label %bb2
5050
5151 bb1: ; preds = %bb
52 %2 = tail call arm_apcscc i32 @f() nounwind ; [#uses=1]
52 %2 = tail call i32 @f() nounwind ; [#uses=1]
5353 %tmp6 = zext i32 %2 to i64 ; [#uses=1]
5454 %mask = and i64 %u.17, -4294967296 ; [#uses=1]
5555 %ins = or i64 %tmp6, %mask ; [#uses=1]
56 tail call arm_apcscc void @g(i64 %ins) nounwind
56 tail call void @g(i64 %ins) nounwind
5757 br label %bb2
5858
5959 bb2: ; preds = %bb1, %bb
7070 ret i32 undef
7171 }
7272
73 declare arm_apcscc i32 @f()
73 declare i32 @f()
7474
75 declare arm_apcscc void @g(i64)
75 declare void @g(i64)
33 target datalayout = "e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:32:32-f32:32:32-f64:32:32-v64:64:64-v128:128:128-a0:0:32-n32"
44 target triple = "thumbv7-apple-darwin3.0.0-iphoneos"
55
6 define arm_apcscc void @FindMin(double* %panelTDEL, i8* %dclOfRow, i32 %numRows, i32 %numCols, double* %retMin_RES_TDEL) {
6 define void @FindMin(double* %panelTDEL, i8* %dclOfRow, i32 %numRows, i32 %numCols, double* %retMin_RES_TDEL) {
77 entry:
88 %panelTDEL.addr = alloca double*, align 4 ; [#uses=1]
99 %panelResTDEL = alloca [2560 x double], align 4 ; <[2560 x double]*> [#uses=0]
11
22 @.str41196 = external constant [2 x i8], align 4 ; <[2 x i8]*> [#uses=1]
33
4 declare arm_apcscc void @syStopraw(i32) nounwind
5
6 declare arm_apcscc i32 @SyFopen(i8*, i8*) nounwind
7
8 declare arm_apcscc i8* @SyFgets(i8*, i32) nounwind
9
10 define arm_apcscc void @SyHelp(i8* nocapture %topic, i32 %fin) nounwind {
4 declare void @syStopraw(i32) nounwind
5
6 declare i32 @SyFopen(i8*, i8*) nounwind
7
8 declare i8* @SyFgets(i8*, i32) nounwind
9
10 define void @SyHelp(i8* nocapture %topic, i32 %fin) nounwind {
1111 entry:
1212 %line = alloca [256 x i8], align 4 ; <[256 x i8]*> [#uses=1]
1313 %secname = alloca [1024 x i8], align 4 ; <[1024 x i8]*> [#uses=0]
6969 unreachable
7070
7171 bb224: ; preds = %bb162
72 %0 = call arm_apcscc i32 @SyFopen(i8* undef, i8* getelementptr inbounds ([2 x i8]* @.str41196, i32 0, i32 0)) nounwind ; [#uses=2]
72 %0 = call i32 @SyFopen(i8* undef, i8* getelementptr inbounds ([2 x i8]* @.str41196, i32 0, i32 0)) nounwind ; [#uses=2]
7373 br i1 false, label %bb297, label %bb300
7474
7575 bb297: ; preds = %bb224
176176 br i1 undef, label %bb373, label %bb388
177177
178178 bb373: ; preds = %bb383, %bb369
179 %7 = call arm_apcscc i8* @SyFgets(i8* undef, i32 %0) nounwind ; [#uses=1]
179 %7 = call i8* @SyFgets(i8* undef, i32 %0) nounwind ; [#uses=1]
180180 %8 = icmp eq i8* %7, null ; [#uses=1]
181181 br i1 %8, label %bb375, label %bb383
182182
240240 br i1 undef, label %return, label %bb406
241241
242242 bb406: ; preds = %bb405
243 call arm_apcscc void @syStopraw(i32 %fin) nounwind
243 call void @syStopraw(i32 %fin) nounwind
244244 ret void
245245
246246 bb407: ; preds = %bb404
254254 br label %bb440
255255
256256 bb440: ; preds = %bb428, %bb300
257 %13 = call arm_apcscc i8* @SyFgets(i8* undef, i32 %0) nounwind ; [#uses=0]
257 %13 = call i8* @SyFgets(i8* undef, i32 %0) nounwind ; [#uses=0]
258258 br i1 false, label %bb442, label %bb308
259259
260260 bb442: ; preds = %bb440
1212 ; CHECK: InlineAsm End
1313 ; CHECK: cmp
1414 ; CHECK: beq
15 define arm_apcscc void @test(%s1* %this, i32 %format, i32 %w, i32 %h, i32 %levels, i32* %s, i8* %data, i32* nocapture %rowbytes, void (i8*, i8*)* %release, i8* %info) nounwind {
15 define void @test(%s1* %this, i32 %format, i32 %w, i32 %h, i32 %levels, i32* %s, i8* %data, i32* nocapture %rowbytes, void (i8*, i8*)* %release, i8* %info) nounwind {
1616 entry:
1717 %tmp1 = getelementptr inbounds %s1* %this, i32 0, i32 0, i32 0, i32 1, i32 0, i32 0
1818 volatile store i32 1, i32* %tmp1, align 4
3131 %tmp19 = getelementptr inbounds %s1* %this, i32 0, i32 10
3232 store i64 0, i64* %tmp19, align 4
3333 %tmp20 = getelementptr inbounds %s1* %this, i32 0, i32 0
34 tail call arm_apcscc void @f1(%s3* %tmp20, i32* %s) nounwind
34 tail call void @f1(%s3* %tmp20, i32* %s) nounwind
3535 %tmp21 = shl i32 %format, 6
36 %tmp22 = tail call arm_apcscc zeroext i8 @f2(i32 %format) nounwind
36 %tmp22 = tail call zeroext i8 @f2(i32 %format) nounwind
3737 %toBoolnot = icmp eq i8 %tmp22, 0
3838 %tmp23 = zext i1 %toBoolnot to i32
3939 %flags.0 = or i32 %tmp23, %tmp21
5858 ret void
5959 }
6060
61 declare arm_apcscc void @f1(%s3*, i32*)
62 declare arm_apcscc zeroext i8 @f2(i32)
61 declare void @f1(%s3*, i32*)
62 declare zeroext i8 @f2(i32)
33 ; Make sure the result of the first dynamic_alloc isn't copied back to sp more
44 ; than once. We'll deal with poor codegen later.
55
6 define arm_apcscc void @t() nounwind ssp {
6 define void @t() nounwind ssp {
77 entry:
88 ; CHECK: t:
99 ; CHECK: mov r0, sp
33 target datalayout = "e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:32:32-f32:32:32-f64:32:32-v64:64:64-v128:128:128-a0:0:32-n32"
44 target triple = "thumbv7-apple-darwin10"
55
6 define arm_apcscc void @test(i32 %mode) nounwind optsize noinline {
6 define void @test(i32 %mode) nounwind optsize noinline {
77 entry:
88 br i1 undef, label %return, label %bb3
99
11 ; Radar 8017376: Missing 's' suffix for t2RSBS instructions.
22 ; CHECK: rsbs
33
4 define arm_apcscc i64 @test(i64 %x) nounwind readnone {
4 define i64 @test(i64 %x) nounwind readnone {
55 entry:
66 %0 = sub nsw i64 1, %x ; [#uses=1]
77 ret i64 %0
1111
1212 @.str = private constant [7 x i8] c"%g %g\0A\00", align 4 ; <[7 x i8]*> [#uses=1]
1313
14 define arm_apcscc i32 @main(i32 %argc, i8** nocapture %Argv) nounwind {
14 define i32 @main(i32 %argc, i8** nocapture %Argv) nounwind {
1515 entry:
1616 %0 = icmp eq i32 %argc, 2123 ; [#uses=1]
1717 %U.0 = select i1 %0, double 3.282190e+01, double 8.731834e+02 ; [#uses=2]
3030 %tmp7 = extractelement <2 x double> %5, i32 0 ; [#uses=1]
3131 %tmp5 = extractelement <2 x double> %5, i32 1 ; [#uses=1]
3232 ; CHECK: printf
33 %7 = tail call arm_apcscc i32 (i8*, ...)* @printf(i8* getelementptr inbounds ([7 x i8]* @.str, i32 0, i32 0), double %tmp7, double %tmp5) nounwind ; [#uses=0]
33 %7 = tail call i32 (i8*, ...)* @printf(i8* getelementptr inbounds ([7 x i8]* @.str, i32 0, i32 0), double %tmp7, double %tmp5) nounwind ; [#uses=0]
3434 %tmp3 = extractelement <2 x double> %6, i32 0 ; [#uses=1]
3535 %tmp1 = extractelement <2 x double> %6, i32 1 ; [#uses=1]
36 %8 = tail call arm_apcscc i32 (i8*, ...)* @printf(i8* getelementptr inbounds ([7 x i8]* @.str, i32 0, i32 0), double %tmp3, double %tmp1) nounwind ; [#uses=0]
36 %8 = tail call i32 (i8*, ...)* @printf(i8* getelementptr inbounds ([7 x i8]* @.str, i32 0, i32 0), double %tmp3, double %tmp1) nounwind ; [#uses=0]
3737 ret i32 0
3838 }
3939
40 declare arm_apcscc i32 @printf(i8* nocapture, ...) nounwind
40 declare i32 @printf(i8* nocapture, ...) nounwind
33 %struct.__sFILEX = type opaque
44 %struct.__sbuf = type { i8*, i32 }
55
6 declare arm_apcscc i32 @fgetc(%struct.FILE* nocapture) nounwind
6 declare i32 @fgetc(%struct.FILE* nocapture) nounwind
77
8 define arm_apcscc i32 @main(i32 %argc, i8** nocapture %argv) nounwind {
8 define i32 @main(i32 %argc, i8** nocapture %argv) nounwind {
99 entry:
1010 br i1 undef, label %bb, label %bb1
1111
1919 unreachable
2020
2121 bb1.i2: ; preds = %bb1
22 %0 = call arm_apcscc i32 @fgetc(%struct.FILE* undef) nounwind ; [#uses=0]
22 %0 = call i32 @fgetc(%struct.FILE* undef) nounwind ; [#uses=0]
2323 br i1 undef, label %bb2.i3, label %bb3.i4
2424
2525 bb2.i3: ; preds = %bb1.i2
0 ; RUN: llc < %s -mtriple=thumbv7-apple-darwin9 -mcpu=cortex-a8 | grep vmov.f32 | count 1
11
2 define arm_apcscc void @fht(float* nocapture %fz, i16 signext %n) nounwind {
2 define void @fht(float* nocapture %fz, i16 signext %n) nounwind {
33 entry:
44 br label %bb5
55
0 ; RUN: llc < %s -mtriple=thumbv7-apple-darwin -disable-fp-elim | not grep mov
11 ; RUN: llc < %s -mtriple=thumbv7-linux -disable-fp-elim | not grep mov
22
3 define arm_apcscc void @t() nounwind readnone {
3 define void @t() nounwind readnone {
44 ret void
55 }
22 %struct.noise3 = type { [3 x [17 x i32]] }
33 %struct.noiseguard = type { i32, i32, i32 }
44
5 define arm_apcscc void @vorbis_encode_noisebias_setup(i8* nocapture %vi.0.7.val, double %s, i32 %block, i32* nocapture %suppress, %struct.noise3* nocapture %in, %struct.noiseguard* nocapture %guard, double %userbias) nounwind {
5 define void @vorbis_encode_noisebias_setup(i8* nocapture %vi.0.7.val, double %s, i32 %block, i32* nocapture %suppress, %struct.noise3* nocapture %in, %struct.noiseguard* nocapture %guard, double %userbias) nounwind {
66 entry:
77 %0 = getelementptr %struct.noiseguard* %guard, i32 %block, i32 2; [#uses=1]
88 %1 = load i32* %0, align 4 ; [#uses=1]
33 @a = common global float 0.000000e+00 ; [#uses=2]
44 @b = common global float 0.000000e+00 ; [#uses=1]
55
6 define arm_apcscc float @t(i32 %c) nounwind {
6 define float @t(i32 %c) nounwind {
77 entry:
88 %0 = icmp sgt i32 %c, 1 ; [#uses=1]
99 %1 = load float* @a, align 4 ; [#uses=2]
1919 @zz_hold = external global %union.rec* ; <%union.rec**> [#uses=2]
2020 @zz_res = external global %union.rec* ; <%union.rec**> [#uses=1]
2121
22 define arm_apcscc %union.rec* @Manifest(%union.rec* %x, %union.rec* %env, %struct.STYLE* %style, %union.rec** %bthr, %union.rec** %fthr, %union.rec** %target, %union.rec** %crs, i32 %ok, i32 %need_expand, %union.rec** %enclose, i32 %fcr) nounwind {
22 define %union.rec* @Manifest(%union.rec* %x, %union.rec* %env, %struct.STYLE* %style, %union.rec** %bthr, %union.rec** %fthr, %union.rec** %target, %union.rec** %crs, i32 %ok, i32 %need_expand, %union.rec** %enclose, i32 %fcr) nounwind {
2323 entry:
2424 ; CHECK: ldr.w r9, [r7, #28]
2525 %xgaps.i = alloca [32 x %union.rec*], align 4 ; <[32 x %union.rec*]*> [#uses=0]
5555 store %union.rec* null, %union.rec** @zz_hold, align 4
5656 store %union.rec* null, %union.rec** @zz_res, align 4
5757 store %union.rec* %x, %union.rec** @zz_hold, align 4
58 %0 = call arm_apcscc %union.rec* @Manifest(%union.rec* undef, %union.rec* %env, %struct.STYLE* %style, %union.rec** %bthr, %union.rec** %fthr, %union.rec** %target, %union.rec** %crs, i32 %ok, i32 %need_expand, %union.rec** %enclose, i32 %fcr) nounwind ; <%union.rec*> [#uses=0]
58 %0 = call %union.rec* @Manifest(%union.rec* undef, %union.rec* %env, %struct.STYLE* %style, %union.rec** %bthr, %union.rec** %fthr, %union.rec** %target, %union.rec** %crs, i32 %ok, i32 %need_expand, %union.rec** %enclose, i32 %fcr) nounwind ; <%union.rec*> [#uses=0]
5959 unreachable
6060
6161 bb438: ; preds = %bb20, %bb20
1010 @G = external global i32 ; [#uses=2]
1111 @array = external global i32* ; [#uses=1]
1212
13 define arm_apcscc void @t() nounwind optsize {
13 define void @t() nounwind optsize {
1414 ; CHECK: t:
1515 ; CHECK: mov.w r2, #1000
1616 entry:
77
88 @GV = external global i32 ; [#uses=2]
99
10 define arm_apcscc void @t1(i32* nocapture %vals, i32 %c) nounwind {
10 define void @t1(i32* nocapture %vals, i32 %c) nounwind {
1111 entry:
1212 ; CHECK: t1:
1313 ; CHECK: cbz
5151 }
5252
5353 ; rdar://8001136
54 define arm_apcscc void @t2(i8* %ptr1, i8* %ptr2) nounwind {
54 define void @t2(i8* %ptr1, i8* %ptr2) nounwind {
5555 entry:
5656 ; CHECK: t2:
5757 ; CHECK: adr r{{.}}, #LCPI1_0
44 @__dso_handle = external global { } ; <{ }*> [#uses=1]
55 @llvm.used = appending global [1 x i8*] [i8* bitcast (i32 (void ()*)* @atexit to i8*)], section "llvm.metadata" ; <[1 x i8*]*> [#uses=0]
66
7 define hidden arm_apcscc i32 @atexit(void ()* %func) nounwind {
7 define hidden i32 @atexit(void ()* %func) nounwind {
88 entry:
99 ; CHECK: atexit:
1010 ; CHECK: add r0, pc
1313 store void ()* %func, void ()** %0, align 4
1414 %1 = getelementptr %struct.one_atexit_routine* %r, i32 0, i32 1 ; [#uses=1]
1515 store i32 0, i32* %1, align 4
16 %2 = call arm_apcscc i32 @atexit_common(%struct.one_atexit_routine* %r, i8* bitcast ({ }* @__dso_handle to i8*)) nounwind ; [#uses=1]
16 %2 = call i32 @atexit_common(%struct.one_atexit_routine* %r, i8* bitcast ({ }* @__dso_handle to i8*)) nounwind ; [#uses=1]
1717 ret i32 %2
1818 }
1919
20 declare arm_apcscc i32 @atexit_common(%struct.one_atexit_routine*, i8*) nounwind
20 declare i32 @atexit_common(%struct.one_atexit_routine*, i8*) nounwind
22
33 target triple = "thumbv7-apple-darwin10"
44
5 define arm_apcscc i32 @f1(i16* %ptr) nounwind {
5 define i32 @f1(i16* %ptr) nounwind {
66 ; CHECK-A8: f1
77 ; CHECK-A8: sxth
88 ; CHECK-M3: f1
0 ; RUN: llc < %s -mtriple=thumbv7-apple-darwin -mcpu=cortex-a8 | FileCheck %s
11 ; rdar://7354379
22
3 declare arm_apcscc double @floor(double) nounwind readnone
3 declare double @floor(double) nounwind readnone
44
55 define void @t(i1 %a, double %b) {
66 entry:
2222 ; CHECK: cmp r0, #0
2323 ; CHECK-NEXT: cmp r0, #0
2424 ; CHECK-NEXT: cbnz
25 %0 = tail call arm_apcscc double @floor(double %b) nounwind readnone ; [#uses=0]
25 %0 = tail call double @floor(double %b) nounwind readnone ; [#uses=0]
2626 br label %bb11
2727
2828 bb11: ; preds = %bb9, %bb7
88
99 declare <4 x float> @llvm.arm.neon.vld1.v4f32(i8*) nounwind readonly
1010
11 define arm_apcscc void @aaa(%quuz* %this, i8* %block) {
11 define void @aaa(%quuz* %this, i8* %block) {
1212 ; CHECK: aaa:
1313 ; CHECK: bic r4, r4, #15
1414 ; CHECK: vst1.64 {{.*}}[{{.*}}, :128]
77 @.str31 = external constant [28 x i8], align 1 ; <[28 x i8]*> [#uses=1]
88 @_T_gtol = external global %struct._T_tstr* ; <%struct._T_tstr**> [#uses=2]
99
10 declare arm_apcscc i32 @strlen(i8* nocapture) nounwind readonly
10 declare i32 @strlen(i8* nocapture) nounwind readonly
1111
12 declare arm_apcscc void @Z_fatal(i8*) noreturn nounwind
12 declare void @Z_fatal(i8*) noreturn nounwind
1313
14 declare arm_apcscc noalias i8* @calloc(i32, i32) nounwind
14 declare noalias i8* @calloc(i32, i32) nounwind
1515
16 define arm_apcscc i32 @main(i32 %argc, i8** nocapture %argv) nounwind {
16 define i32 @main(i32 %argc, i8** nocapture %argv) nounwind {
1717 ; CHECK: main:
1818 ; CHECK: tbb
1919 entry:
2727 br label %bb40.i
2828
2929 bb7.i: ; preds = %bb42.i
30 call arm_apcscc void @_T_addtol(%struct._T_tstr** @_T_gtol, i32 0, i8* null) nounwind
30 call void @_T_addtol(%struct._T_tstr** @_T_gtol, i32 0, i8* null) nounwind
3131 unreachable
3232
3333 bb15.i: ; preds = %bb42.i
34 call arm_apcscc void @_T_addtol(%struct._T_tstr** @_T_gtol, i32 2, i8* null) nounwind
34 call void @_T_addtol(%struct._T_tstr** @_T_gtol, i32 2, i8* null) nounwind
3535 unreachable
3636
3737 bb23.i: ; preds = %bb42.i
38 %1 = call arm_apcscc i32 @strlen(i8* null) nounwind readonly ; [#uses=0]
38 %1 = call i32 @strlen(i8* null) nounwind readonly ; [#uses=0]
3939 unreachable
4040
4141 bb33.i: ; preds = %bb42.i
4242 store i32 0, i32* @_C_nextcmd, align 4
43 %2 = call arm_apcscc noalias i8* @calloc(i32 21, i32 1) nounwind ; [#uses=0]
43 %2 = call noalias i8* @calloc(i32 21, i32 1) nounwind ; [#uses=0]
4444 unreachable
4545
4646 bb34.i: ; preds = %bb42.i
4747 %3 = load i32* @_C_nextcmd, align 4 ; [#uses=1]
4848 %4 = add i32 %3, 1 ; [#uses=1]
4949 store i32 %4, i32* @_C_nextcmd, align 4
50 %5 = call arm_apcscc noalias i8* @calloc(i32 22, i32 1) nounwind ; [#uses=0]
50 %5 = call noalias i8* @calloc(i32 22, i32 1) nounwind ; [#uses=0]
5151 unreachable
5252
5353 bb35.i: ; preds = %bb42.i
54 %6 = call arm_apcscc noalias i8* @calloc(i32 20, i32 1) nounwind ; [#uses=0]
54 %6 = call noalias i8* @calloc(i32 20, i32 1) nounwind ; [#uses=0]
5555 unreachable
5656
5757 bb37.i: ; preds = %bb42.i
58 %7 = call arm_apcscc noalias i8* @calloc(i32 14, i32 1) nounwind ; [#uses=0]
58 %7 = call noalias i8* @calloc(i32 14, i32 1) nounwind ; [#uses=0]
5959 unreachable
6060
6161 bb39.i: ; preds = %bb42.i
62 call arm_apcscc void @Z_fatal(i8* getelementptr ([28 x i8]* @.str31, i32 0, i32 0)) nounwind
62 call void @Z_fatal(i8* getelementptr ([28 x i8]* @.str31, i32 0, i32 0)) nounwind
6363 unreachable
6464
6565 bb40.i: ; preds = %bb42.i, %bb5.i, %bb1.i2
8080 ]
8181 }
8282
83 declare arm_apcscc void @_T_addtol(%struct._T_tstr** nocapture, i32, i8*) nounwind
83 declare void @_T_addtol(%struct._T_tstr** nocapture, i32, i8*) nounwind
33
44 @p = external global i32
55
6 define arm_apcscc i32 @test(i32 %n) nounwind {
6 define i32 @test(i32 %n) nounwind {
77 ; CHECK: @test
88 entry:
99 br label %for.cond
22 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:32-f32:32:32-f64:32:32-v64:64:64-v128:128:128-a0:0:64"
33 target triple = "armv6-apple-darwin10"
44
5 define arm_apcscc void @sqlite3_free_table(i8** %azResult) nounwind {
5 define void @sqlite3_free_table(i8** %azResult) nounwind {
66 entry:
77 br i1 undef, label %return, label %bb
88
9999 declare void @test8a()
100100
101101 define i8* @test8() {
102 invoke arm_apcscc void @test8a()
102 invoke void @test8a()
103103 to label %invoke.cont unwind label %try.handler
104104
105105 invoke.cont: ; preds = %entry
113113 ; calling conv, but the implementation of test8a may actually end up using the
114114 ; right calling conv.
115115 ; CHECK: @test8() {
116 ; CHECK-NEXT: invoke arm_apcscc void @test8a()
116 ; CHECK-NEXT: invoke void @test8a()
117117
126126 }
127127
128128 ; PR5471
129 define arm_apcscc i32 @test5a() {
129 define i32 @test5a() {
130130 ret i32 0
131131 }
132132
133 define arm_apcscc void @test5() {
133 define void @test5() {
134134 store i1 true, i1* undef
135135 %1 = invoke i32 @test5a() to label %exit unwind label %exit
136136 exit:
211211 entry:
212212 store i1 true, i1* undef
213213 store i1 true, i1* undef
214 invoke arm_apcscc void @test10a()
214 invoke void @test10a()
215215 to label %invoke.cont unwind label %try.handler ; [#uses=0]
216216
217217 invoke.cont: ; preds = %entry
88 @delim1 = external global i32 ; [#uses=1]
99 @delim2 = external global i32 ; [#uses=1]
1010
11 define arm_apcscc i32 @ineqn(i8* %s, i8* %p) nounwind readonly {
11 define i32 @ineqn(i8* %s, i8* %p) nounwind readonly {
1212 entry:
1313 %0 = load i32* @delim1, align 4 ; [#uses=1]
1414 %1 = load i32* @delim2, align 4 ; [#uses=1]
88 %struct.int16x8x2_t = type { [2 x %struct.int16x8_t] }
99 %union..0anon = type { %struct.int16x8x2_t }
1010
11 define arm_apcscc void @test(<8 x i16> %tmp.0, %struct.int16x8x2_t* %dst) nounwind {
11 define void @test(<8 x i16> %tmp.0, %struct.int16x8x2_t* %dst) nounwind {
1212 ; CHECK: @test
1313 ; CHECK-NOT: alloca
1414 ; CHECK: "alloca point"
6767 ; Radar 7466574
6868 %struct._NSRange = type { i64 }
6969
70 define arm_apcscc void @test_memcpy_self() nounwind {
70 define void @test_memcpy_self() nounwind {
7171 ; CHECK: @test_memcpy_self
7272 ; CHECK-NOT: alloca
7373 ; CHECK: br i1
44
55 %struct.test = type { [3 x double ] }
66
7 define arm_apcscc void @test_memcpy_self() nounwind {
7 define void @test_memcpy_self() nounwind {
88 ; CHECK: @test_memcpy_self
99 ; CHECK-NOT: alloca
1010 ; CHECK: ret void