llvm.org GIT mirror llvm / 1dc69d0
[X86][SSE] Add computeKnownBitsForTargetNode support for (V)PSLL/(V)PSRL instructions git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@298806 91177308-0d34-0410-b5e6-96231b3b80d8 Simon Pilgrim 3 years ago
2 changed file(s) with 26 addition(s) and 2 deletion(s). Raw diff Collapse all Expand all
2659026590 unsigned Depth) const {
2659126591 unsigned BitWidth = KnownZero.getBitWidth();
2659226592 unsigned Opc = Op.getOpcode();
26593 EVT VT = Op.getValueType();
2659326594 assert((Opc >= ISD::BUILTIN_OP_END ||
2659426595 Opc == ISD::INTRINSIC_WO_CHAIN ||
2659526596 Opc == ISD::INTRINSIC_W_CHAIN ||
2662326624 KnownZero.setBits(NumLoBits, BitWidth);
2662426625 break;
2662526626 }
26627 case X86ISD::VSHLI:
26628 case X86ISD::VSRLI: {
26629 if (auto *ShiftImm = dyn_cast(Op.getOperand(1))) {
26630 if (ShiftImm->getAPIntValue().uge(VT.getScalarSizeInBits())) {
26631 KnownZero = APInt::getAllOnesValue(BitWidth);
26632 break;
26633 }
26634
26635 DAG.computeKnownBits(Op.getOperand(0), KnownZero, KnownOne, Depth + 1);
26636 unsigned ShAmt = ShiftImm->getZExtValue();
26637 if (Opc == X86ISD::VSHLI) {
26638 KnownZero = KnownZero << ShAmt;
26639 KnownOne = KnownOne << ShAmt;
26640 // Low bits are known zero.
26641 KnownZero.setLowBits(ShAmt);
26642 } else {
26643 KnownZero = KnownZero.lshr(ShAmt);
26644 KnownOne = KnownOne.lshr(ShAmt);
26645 // High bits are known zero.
26646 KnownZero.setHighBits(ShAmt);
26647 }
26648 }
26649 break;
26650 }
2662626651 case X86ISD::VZEXT: {
2662726652 SDValue N0 = Op.getOperand(0);
26628 unsigned NumElts = Op.getValueType().getVectorNumElements();
26653 unsigned NumElts = VT.getVectorNumElements();
2662926654
2663026655 EVT SrcVT = N0.getValueType();
2663126656 unsigned InNumElts = SrcVT.getVectorNumElements();
8383 ; CHECK-LABEL: combine_v8i32_abs_pos:
8484 ; CHECK: # BB#0:
8585 ; CHECK-NEXT: vpsrld $1, %ymm0, %ymm0
86 ; CHECK-NEXT: vpabsd %ymm0, %ymm0
8786 ; CHECK-NEXT: retq
8887 %1 = lshr <8 x i32> %a,
8988 %2 = call <8 x i32> @llvm.x86.avx2.pabs.d(<8 x i32> %1)