llvm.org GIT mirror llvm / 1b5c0cb
Revert r124462. There are a few big regressions that I need to fix first. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124478 91177308-0d34-0410-b5e6-96231b3b80d8 Evan Cheng 8 years ago
10 changed file(s) with 32 addition(s) and 78 deletion(s). Raw diff Collapse all Expand all
464464 MaxDuplicateCount = TailDuplicateSize;
465465
466466 if (PreRegAlloc) {
467 if (TailBB->empty())
468 return false;
469 const TargetInstrDesc &TID = TailBB->back().getDesc();
470 // Pre-regalloc tail duplication hurts compile time and doesn't help
471 // much except for indirect branches and returns.
472 if (!TID.isIndirectBranch() && !TID.isReturn())
467 // Pre-regalloc tail duplication hurts compile time and doesn't help
468 // much except for indirect branches.
469 if (TailBB->empty() || !TailBB->back().getDesc().isIndirectBranch())
473470 return false;
474471 // If the target has hardware branch prediction that can handle indirect
475472 // branches, duplicating them can often make them predictable when there
504501 }
505502 // Heuristically, don't tail-duplicate calls if it would expand code size,
506503 // as it's less likely to be worth the extra cost.
507 if (InstrCount > 1 && (PreRegAlloc && HasCall))
504 if (InstrCount > 1 && HasCall)
508505 return false;
509506
510507 DEBUG(dbgs() << "\n*** Tail-duplicating BB#" << TailBB->getNumber() << '\n');
2727 #include "llvm/ADT/Statistic.h"
2828 #include "llvm/ADT/STLExtras.h"
2929 #include "llvm/Support/CFG.h"
30 #include "llvm/Support/CommandLine.h"
3130 #include "llvm/Support/ConstantRange.h"
3231 #include "llvm/Support/Debug.h"
3332 #include "llvm/Support/raw_ostream.h"
3534 #include
3635 #include
3736 using namespace llvm;
38
39 static cl::opt
40 DupRet("simplifycfg-dup-ret", cl::Hidden, cl::init(false),
41 cl::desc("Duplicate return instructions into unconditional branches"));
4237
4338 STATISTIC(NumSpeculations, "Number of speculative executed instructions");
4439
20312026 }
20322027
20332028 // If we found some, do the transformation!
2034 if (!UncondBranchPreds.empty() && DupRet) {
2029 if (!UncondBranchPreds.empty()) {
20352030 while (!UncondBranchPreds.empty()) {
20362031 BasicBlock *Pred = UncondBranchPreds.pop_back_val();
20372032 DEBUG(dbgs() << "FOLDING: " << *BB
6969
7070 ; Same as slightly_more_involved, but block_a is now a CFG diamond with
7171 ; fallthrough edges which should be preserved.
72 ; "callq block_a_merge_func" is tail duped.
7372
7473 ; CHECK: yet_more_involved:
7574 ; CHECK: jmp .LBB2_1
7877 ; CHECK-NEXT: callq bar99
7978 ; CHECK-NEXT: callq get
8079 ; CHECK-NEXT: cmpl $2999, %eax
81 ; CHECK-NEXT: jle .LBB2_5
80 ; CHECK-NEXT: jg .LBB2_6
81 ; CHECK-NEXT: callq block_a_true_func
82 ; CHECK-NEXT: jmp .LBB2_7
83 ; CHECK-NEXT: .LBB2_6:
8284 ; CHECK-NEXT: callq block_a_false_func
83 ; CHECK-NEXT: callq block_a_merge_func
84 ; CHECK-NEXT: jmp .LBB2_1
85 ; CHECK-NEXT: .LBB2_5:
86 ; CHECK-NEXT: callq block_a_true_func
85 ; CHECK-NEXT: .LBB2_7:
8786 ; CHECK-NEXT: callq block_a_merge_func
8887 ; CHECK-NEXT: .LBB2_1:
8988 ; CHECK-NEXT: callq body
None ; RUN: opt < %s -jump-threading -mem2reg -instcombine -simplifycfg -S | FileCheck %s
0 ; RUN: opt < %s -jump-threading -mem2reg -instcombine -simplifycfg -S | grep {ret i32 %v1}
1 ; There should be no uncond branches left.
2 ; RUN: opt < %s -jump-threading -mem2reg -instcombine -simplifycfg -S | not grep {br label}
13
24 declare i32 @f1()
35 declare i32 @f2()
46 declare void @f3()
57
68 define i32 @test(i1 %cond, i1 %cond2, i1 %cond3) {
7 ; CHECK: test
89 br i1 %cond, label %T1, label %F1
910
10 ; CHECK-NOT: T1:
1111 T1:
1212 %v1 = call i32 @f1()
1313 br label %Merge
1717 br label %Merge
1818
1919 Merge:
20 ; CHECK: Merge:
21 ; CHECK: %v1 = call i32 @f1()
22 ; CHECK-NEXT: %D = and i1 %cond2, %cond3
23 ; CHECK-NEXT: br i1 %D
2420 %A = phi i1 [true, %T1], [false, %F1]
2521 %B = phi i32 [%v1, %T1], [%v2, %F1]
2622 %C = and i1 %A, %cond2
None ; RUN: opt < %s -jump-threading -mem2reg -instcombine -simplifycfg -S | FileCheck %s
0 ; RUN: opt < %s -jump-threading -mem2reg -instcombine -simplifycfg -S | grep {ret i32 %v1}
1 ; There should be no uncond branches left.
2 ; RUN: opt < %s -jump-threading -mem2reg -instcombine -simplifycfg -S | not grep {br label}
13
24 declare i32 @f1()
35 declare i32 @f2()
46 declare void @f3()
57
68 define i32 @test(i1 %cond, i1 %cond2) {
7 ; CHECK: test
89 br i1 %cond, label %T1, label %F1
910
10 ; CHECK-NOT: T1
1111 T1:
1212 %v1 = call i32 @f1()
1313 br label %Merge
1717 br label %Merge
1818
1919 Merge:
20 ; CHECK: Merge:
21 ; CHECK: %v1 = call i32 @f1()
22 ; CHECK-NEXT: br i1 %cond2
2320 %A = phi i1 [true, %T1], [false, %F1]
2421 %B = phi i32 [%v1, %T1], [%v2, %F1]
2522 %C = and i1 %A, %cond2
None ; RUN: opt < %s -jump-threading -S | FileCheck %s
0 ; RUN: opt < %s -jump-threading -simplifycfg -S | grep {ret i32 1}
11 ; rdar://6402033
22
33 ; Test that we can thread through the block with the partially redundant load (%2).
55 target triple = "i386-apple-darwin7"
66
77 define i32 @foo(i32* %P) nounwind {
8 ; CHECK: foo
98 entry:
109 %0 = tail call i32 (...)* @f1() nounwind ; [#uses=1]
1110 %1 = icmp eq i32 %0, 0 ; [#uses=1]
1211 br i1 %1, label %bb1, label %bb
1312
1413 bb: ; preds = %entry
15 ; CHECK: bb1.thread:
16 ; CHECK: store
17 ; CHECK: br label %bb3
1814 store i32 42, i32* %P, align 4
1915 br label %bb1
2016
2925 ret i32 %res.0
3026
3127 bb3: ; preds = %bb1
32 ; CHECK: bb3:
33 ; CHECK: %res.01 = phi i32 [ 1, %bb1.thread ], [ 0, %bb1 ]
34 ; CHECK: ret i32 %res.01
3528 ret i32 %res.0
3629 }
3730
77 ; CHECK: i64 2, label
88 ; CHECK: i64 3, label
99 ; CHECK: i64 4, label
10 ; CHECK-NOT: br
1011 ; CHECK: }
1112
1213 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
2424 }
2525
2626
27 define void @test4() {
28 br label %return
29 return:
30 ret void
31 ; CHECK: @test4
32 ; CHECK-NEXT: ret void
33 }
34 @test4g = global i8* blockaddress(@test4, %return)
35
36
2737 ; PR5795
2838 define void @test5(i32 %A) {
2939 switch i32 %A, label %return [
146146 ; CHECK: i32 16, label %UnifiedReturnBlock
147147 ; CHECK: i32 17, label %UnifiedReturnBlock
148148 ; CHECK: i32 18, label %UnifiedReturnBlock
149 ; CHECK: i32 19, label %UnifiedReturnBlock
149 ; CHECK: i32 19, label %switch.edge
150150 ; CHECK: ]
151151 }
152152
440440 ; CHECK-NOT: switch
441441 ; CHECK: ret void
442442 }
443
444 ; PR8675
445 ; rdar://5134905
446 define zeroext i1 @test16(i32 %x) nounwind {
447 entry:
448 ; CHECK: @test16
449 ; CHECK: switch i32 %x, label %lor.rhs [
450 ; CHECK: i32 1, label %lor.end
451 ; CHECK: i32 2, label %lor.end
452 ; CHECK: i32 3, label %lor.end
453 ; CHECK: ]
454 %cmp.i = icmp eq i32 %x, 1
455 br i1 %cmp.i, label %lor.end, label %lor.lhs.false
456
457 lor.lhs.false:
458 %cmp.i2 = icmp eq i32 %x, 2
459 br i1 %cmp.i2, label %lor.end, label %lor.rhs
460
461 lor.rhs:
462 %cmp.i1 = icmp eq i32 %x, 3
463 br label %lor.end
464
465 lor.end:
466 %0 = phi i1 [ true, %lor.lhs.false ], [ true, %entry ], [ %cmp.i1, %lor.rhs ]
467 ret i1 %0
468 }
None ; RUN: opt < %s -simplifycfg -S | FileCheck %s
0 ; RUN: opt < %s -simplifycfg -S | not grep br
1
12
23 %llvm.dbg.anchor.type = type { i32, i32 }
34 %llvm.dbg.compile_unit.type = type { i32, { }*, i32, i8*, i8*, i8*, i1, i1, i8* }
1112
1213 declare void @llvm.dbg.stoppoint(i32, i32, { }*) nounwind
1314
14 define i1 @t({ i32, i32 }* %I) {
15 ; CHECK: t
16 ; CHECK: switch i32 %tmp.2.i, label %shortcirc_next.4 [
17 ; CHECK: i32 14, label %UnifiedReturnBlock
18 ; CHECK: i32 15, label %UnifiedReturnBlock
19 ; CHECK: i32 16, label %UnifiedReturnBlock
20 ; CHECK: i32 17, label %UnifiedReturnBlock
21 ; CHECK: i32 18, label %UnifiedReturnBlock
22 ; CHECK: i32 19, label %UnifiedReturnBlock
23 ; CHECK: ]
15 define i1 @_ZN4llvm11SetCondInst7classofEPKNS_11InstructionE({ i32, i32 }* %I) {
2416 entry:
2517 %tmp.1.i = getelementptr { i32, i32 }* %I, i64 0, i32 1 ; [#uses=1]
2618 %tmp.2.i = load i32* %tmp.1.i ; [#uses=6]