llvm.org GIT mirror llvm / 199366a
ARM assembly two-operand forms for VRSHL. rdar://11252521 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154840 91177308-0d34-0410-b5e6-96231b3b80d8 Jim Grosbach 8 years ago
2 changed file(s) with 71 addition(s) and 1 deletion(s). Raw diff Collapse all Expand all
59505950 def : NEONInstAlias<"vshl${p}.u64 $Vdn, $Vm",
59515951 (VSHLuv2i64 QPR:$Vdn, QPR:$Vdn, QPR:$Vm, pred:$p)>;
59525952
5953 // VSHL (immediate) two-operand aliases.
5953 // VSHR (immediate) two-operand aliases.
59545954 def : NEONInstAlias<"vshr${p}.s8 $Vdn, $imm",
59555955 (VSHRsv8i8 DPR:$Vdn, DPR:$Vdn, shr_imm8:$imm, pred:$p)>;
59565956 def : NEONInstAlias<"vshr${p}.s16 $Vdn, $imm",
59865986 (VSHRuv4i32 QPR:$Vdn, QPR:$Vdn, shr_imm32:$imm, pred:$p)>;
59875987 def : NEONInstAlias<"vshr${p}.u64 $Vdn, $imm",
59885988 (VSHRuv2i64 QPR:$Vdn, QPR:$Vdn, shr_imm64:$imm, pred:$p)>;
5989
5990 // VRSHL two-operand aliases.
5991 def : NEONInstAlias<"vrshl${p}.s8 $Vdn, $Vm",
5992 (VRSHLsv8i8 DPR:$Vdn, DPR:$Vdn, DPR:$Vm, pred:$p)>;
5993 def : NEONInstAlias<"vrshl${p}.s16 $Vdn, $Vm",
5994 (VRSHLsv4i16 DPR:$Vdn, DPR:$Vdn, DPR:$Vm, pred:$p)>;
5995 def : NEONInstAlias<"vrshl${p}.s32 $Vdn, $Vm",
5996 (VRSHLsv2i32 DPR:$Vdn, DPR:$Vdn, DPR:$Vm, pred:$p)>;
5997 def : NEONInstAlias<"vrshl${p}.s64 $Vdn, $Vm",
5998 (VRSHLsv1i64 DPR:$Vdn, DPR:$Vdn, DPR:$Vm, pred:$p)>;
5999 def : NEONInstAlias<"vrshl${p}.u8 $Vdn, $Vm",
6000 (VRSHLuv8i8 DPR:$Vdn, DPR:$Vdn, DPR:$Vm, pred:$p)>;
6001 def : NEONInstAlias<"vrshl${p}.u16 $Vdn, $Vm",
6002 (VRSHLuv4i16 DPR:$Vdn, DPR:$Vdn, DPR:$Vm, pred:$p)>;
6003 def : NEONInstAlias<"vrshl${p}.u32 $Vdn, $Vm",
6004 (VRSHLuv2i32 DPR:$Vdn, DPR:$Vdn, DPR:$Vm, pred:$p)>;
6005 def : NEONInstAlias<"vrshl${p}.u64 $Vdn, $Vm",
6006 (VRSHLuv1i64 DPR:$Vdn, DPR:$Vdn, DPR:$Vm, pred:$p)>;
6007
6008 def : NEONInstAlias<"vrshl${p}.s8 $Vdn, $Vm",
6009 (VRSHLsv16i8 QPR:$Vdn, QPR:$Vdn, QPR:$Vm, pred:$p)>;
6010 def : NEONInstAlias<"vrshl${p}.s16 $Vdn, $Vm",
6011 (VRSHLsv8i16 QPR:$Vdn, QPR:$Vdn, QPR:$Vm, pred:$p)>;
6012 def : NEONInstAlias<"vrshl${p}.s32 $Vdn, $Vm",
6013 (VRSHLsv4i32 QPR:$Vdn, QPR:$Vdn, QPR:$Vm, pred:$p)>;
6014 def : NEONInstAlias<"vrshl${p}.s64 $Vdn, $Vm",
6015 (VRSHLsv2i64 QPR:$Vdn, QPR:$Vdn, QPR:$Vm, pred:$p)>;
6016 def : NEONInstAlias<"vrshl${p}.u8 $Vdn, $Vm",
6017 (VRSHLuv16i8 QPR:$Vdn, QPR:$Vdn, QPR:$Vm, pred:$p)>;
6018 def : NEONInstAlias<"vrshl${p}.u16 $Vdn, $Vm",
6019 (VRSHLuv8i16 QPR:$Vdn, QPR:$Vdn, QPR:$Vm, pred:$p)>;
6020 def : NEONInstAlias<"vrshl${p}.u32 $Vdn, $Vm",
6021 (VRSHLuv4i32 QPR:$Vdn, QPR:$Vdn, QPR:$Vm, pred:$p)>;
6022 def : NEONInstAlias<"vrshl${p}.u64 $Vdn, $Vm",
6023 (VRSHLuv2i64 QPR:$Vdn, QPR:$Vdn, QPR:$Vm, pred:$p)>;
59896024
59906025 // VLD1 single-lane pseudo-instructions. These need special handling for
59916026 // the lane index that an InstAlias can't handle, so we use these instead.
428428 @ CHECK: vshl.i32 d4, d4, #17 @ encoding: [0x14,0x45,0xb1,0xf2]
429429 @ CHECK: vshl.i64 d4, d4, #43 @ encoding: [0x94,0x45,0xab,0xf2]
430430
431 @ Two-operand VRSHL forms.
432 vrshl.s8 d11, d4
433 vrshl.s16 d12, d5
434 vrshl.s32 d13, d6
435 vrshl.s64 d14, d7
436 vrshl.u8 d15, d8
437 vrshl.u16 d16, d9
438 vrshl.u32 d17, d10
439 vrshl.u64 d18, d11
440 vrshl.s8 q1, q8
441 vrshl.s16 q2, q15
442 vrshl.s32 q3, q14
443 vrshl.s64 q4, q13
444 vrshl.u8 q5, q12
445 vrshl.u16 q6, q11
446 vrshl.u32 q7, q10
447 vrshl.u64 q8, q9
448
449 @ CHECK: vrshl.s8 d11, d11, d4 @ encoding: [0x0b,0xb5,0x04,0xf2]
450 @ CHECK: vrshl.s16 d12, d12, d5 @ encoding: [0x0c,0xc5,0x15,0xf2]
451 @ CHECK: vrshl.s32 d13, d13, d6 @ encoding: [0x0d,0xd5,0x26,0xf2]
452 @ CHECK: vrshl.s64 d14, d14, d7 @ encoding: [0x0e,0xe5,0x37,0xf2]
453 @ CHECK: vrshl.u8 d15, d15, d8 @ encoding: [0x0f,0xf5,0x08,0xf3]
454 @ CHECK: vrshl.u16 d16, d16, d9 @ encoding: [0x20,0x05,0x59,0xf3]
455 @ CHECK: vrshl.u32 d17, d17, d10 @ encoding: [0x21,0x15,0x6a,0xf3]
456 @ CHECK: vrshl.u64 d18, d18, d11 @ encoding: [0x22,0x25,0x7b,0xf3]
457 @ CHECK: vrshl.s8 q1, q1, q8 @ encoding: [0xc2,0x25,0x00,0xf2]
458 @ CHECK: vrshl.s16 q2, q2, q15 @ encoding: [0xc4,0x45,0x1e,0xf2]
459 @ CHECK: vrshl.s32 q3, q3, q14 @ encoding: [0xc6,0x65,0x2c,0xf2]
460 @ CHECK: vrshl.s64 q4, q4, q13 @ encoding: [0xc8,0x85,0x3a,0xf2]
461 @ CHECK: vrshl.u8 q5, q5, q12 @ encoding: [0xca,0xa5,0x08,0xf3]
462 @ CHECK: vrshl.u16 q6, q6, q11 @ encoding: [0xcc,0xc5,0x16,0xf3]
463 @ CHECK: vrshl.u32 q7, q7, q10 @ encoding: [0xce,0xe5,0x24,0xf3]
464 @ CHECK: vrshl.u64 q8, q8, q9 @ encoding: [0xe0,0x05,0x72,0xf3]
465
431466
432467 @ Two-operand forms.
433468 vshr.s8 d15, #8