llvm.org GIT mirror llvm / 195c71b
Fix the previous accidental commit. Now shrinking common Thumb2 load / store instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78659 91177308-0d34-0410-b5e6-96231b3b80d8 Evan Cheng 11 years ago
9 changed file(s) with 78 addition(s) and 37 deletion(s). Raw diff Collapse all Expand all
849849 O << "[" << TRI->getAsmName(MO1.getReg());
850850
851851 assert(MO2.getReg() && "Invalid so_reg load / store address!");
852 O << ", +" << TRI->getAsmName(MO2.getReg());
852 O << ", " << TRI->getAsmName(MO2.getReg());
853853
854854 unsigned ShAmt = MO3.getImm();
855855 if (ShAmt) {
9393 { ARM::t2LDRBs, ARM::tLDRB, 0, 0, 0, 1, 0, 0,0, 1 },
9494 { ARM::t2LDRHi12,ARM::tLDRH, 0, 5, 0, 1, 0, 0,0, 1 },
9595 { ARM::t2LDRHs, ARM::tLDRH, 0, 0, 0, 1, 0, 0,0, 1 },
96 { ARM::t2LDRSBs,ARM::tLDR, 0, 0, 0, 1, 0, 0,0, 1 },
96 { ARM::t2LDRSBs,ARM::tLDRSB, 0, 0, 0, 1, 0, 0,0, 1 },
9797 { ARM::t2LDRSHs,ARM::tLDRSH, 0, 0, 0, 1, 0, 0,0, 1 },
9898 { ARM::t2STRi12,ARM::tSTR, 0, 5, 0, 1, 0, 0,0, 1 },
9999 { ARM::t2STRs, ARM::tSTR, 0, 0, 0, 1, 0, 0,0, 1 },
247247 if (Entry.NarrowOpc1 != ARM::tLDRSB && Entry.NarrowOpc1 != ARM::tLDRSH) {
248248 // tLDRSB and tLDRSH do not have an immediate offset field. On the other
249249 // hand, it must have an offset register.
250 assert(OffsetReg && "Invalid so_reg load / store address!");
251250 // FIXME: Remove this special case.
252251 MIB.addImm(OffsetImm/Scale);
253252 }
253
254 assert((!HasShift || OffsetReg) && "Invalid so_reg load / store address!");
255
254256 MIB.addReg(OffsetReg, getKillRegState(OffsetKill));
255257
256258 // Transfer the rest of operands.
77
88 define arm_apcscc void @main(i32 %argc, i8** %argv) noreturn nounwind {
99 ; CHECK: main:
10 ; CHECK: ldrb.w
10 ; CHECK: ldrb
1111 entry:
1212 %nb.i.i.i = alloca [25 x i8], align 1 ; <[25 x i8]*> [#uses=0]
1313 %line.i.i.i = alloca [200 x i8], align 1 ; <[200 x i8]*> [#uses=1]
22 define i32 @f1(i32* %v) {
33 entry:
44 ; CHECK: f1:
5 ; CHECK: ldr.w r0, [r0]
5 ; CHECK: ldr r0, [r0]
66 %tmp = load i32* %v
77 ret i32 %tmp
88 }
2020 entry:
2121 ; CHECK: f3:
2222 ; CHECK: mov.w r1, #4096
23 ; CHECK: ldr.w r0, [r0, +r1]
23 ; CHECK: ldr r0, [r0, r1]
2424 %tmp2 = getelementptr i32* %v, i32 1024
2525 %tmp = load i32* %tmp2
2626 ret i32 %tmp
3939 define i32 @f5(i32 %base, i32 %offset) {
4040 entry:
4141 ; CHECK: f5:
42 ; CHECK: ldr.w r0, [r0, +r1]
42 ; CHECK: ldr r0, [r0, r1]
4343 %tmp1 = add i32 %base, %offset
4444 %tmp2 = inttoptr i32 %tmp1 to i32*
4545 %tmp3 = load i32* %tmp2
4949 define i32 @f6(i32 %base, i32 %offset) {
5050 entry:
5151 ; CHECK: f6:
52 ; CHECK: ldr.w r0, [r0, +r1, lsl #2]
52 ; CHECK: ldr.w r0, [r0, r1, lsl #2]
5353 %tmp1 = shl i32 %offset, 2
5454 %tmp2 = add i32 %base, %tmp1
5555 %tmp3 = inttoptr i32 %tmp2 to i32*
6161 entry:
6262 ; CHECK: f7:
6363 ; CHECK: lsrs r1, r1, #2
64 ; CHECK: ldr.w r0, [r0, +r1]
64 ; CHECK: ldr r0, [r0, r1]
6565
6666 %tmp1 = lshr i32 %offset, 2
6767 %tmp2 = add i32 %base, %tmp1
22 define i8 @f1(i8* %v) {
33 entry:
44 ; CHECK: f1:
5 ; CHECK: ldrb.w r0, [r0]
5 ; CHECK: ldrb r0, [r0]
66 %tmp = load i8* %v
77 ret i8 %tmp
88 }
2020 entry:
2121 ; CHECK: f3:
2222 ; CHECK: mov.w r1, #4096
23 ; CHECK: ldrb.w r0, [r0, +r1]
23 ; CHECK: ldrb r0, [r0, r1]
2424 %tmp1 = add i32 %base, 4096
2525 %tmp2 = inttoptr i32 %tmp1 to i8*
2626 %tmp3 = load i8* %tmp2
4040 define i8 @f5(i32 %base, i32 %offset) {
4141 entry:
4242 ; CHECK: f5:
43 ; CHECK: ldrb.w r0, [r0, +r1]
43 ; CHECK: ldrb r0, [r0, r1]
4444 %tmp1 = add i32 %base, %offset
4545 %tmp2 = inttoptr i32 %tmp1 to i8*
4646 %tmp3 = load i8* %tmp2
5050 define i8 @f6(i32 %base, i32 %offset) {
5151 entry:
5252 ; CHECK: f6:
53 ; CHECK: ldrb.w r0, [r0, +r1, lsl #2]
53 ; CHECK: ldrb.w r0, [r0, r1, lsl #2]
5454 %tmp1 = shl i32 %offset, 2
5555 %tmp2 = add i32 %base, %tmp1
5656 %tmp3 = inttoptr i32 %tmp2 to i8*
6262 entry:
6363 ; CHECK: f7:
6464 ; CHECK: lsrs r1, r1, #2
65 ; CHECK: ldrb.w r0, [r0, +r1]
65 ; CHECK: ldrb r0, [r0, r1]
6666 %tmp1 = lshr i32 %offset, 2
6767 %tmp2 = add i32 %base, %tmp1
6868 %tmp3 = inttoptr i32 %tmp2 to i8*
22 define i16 @f1(i16* %v) {
33 entry:
44 ; CHECK: f1:
5 ; CHECK: ldrh.w r0, [r0]
5 ; CHECK: ldrh r0, [r0]
66 %tmp = load i16* %v
77 ret i16 %tmp
88 }
2020 entry:
2121 ; CHECK: f3:
2222 ; CHECK: mov.w r1, #4096
23 ; CHECK: ldrh.w r0, [r0, +r1]
23 ; CHECK: ldrh r0, [r0, r1]
2424 %tmp2 = getelementptr i16* %v, i16 2048
2525 %tmp = load i16* %tmp2
2626 ret i16 %tmp
3939 define i16 @f5(i32 %base, i32 %offset) {
4040 entry:
4141 ; CHECK: f5:
42 ; CHECK: ldrh.w r0, [r0, +r1]
42 ; CHECK: ldrh r0, [r0, r1]
4343 %tmp1 = add i32 %base, %offset
4444 %tmp2 = inttoptr i32 %tmp1 to i16*
4545 %tmp3 = load i16* %tmp2
4949 define i16 @f6(i32 %base, i32 %offset) {
5050 entry:
5151 ; CHECK: f6:
52 ; CHECK: ldrh.w r0, [r0, +r1, lsl #2]
52 ; CHECK: ldrh.w r0, [r0, r1, lsl #2]
5353 %tmp1 = shl i32 %offset, 2
5454 %tmp2 = add i32 %base, %tmp1
5555 %tmp3 = inttoptr i32 %tmp2 to i16*
6161 entry:
6262 ; CHECK: f7:
6363 ; CHECK: lsrs r1, r1, #2
64 ; CHECK: ldrh.w r0, [r0, +r1]
64 ; CHECK: ldrh r0, [r0, r1]
6565 %tmp1 = lshr i32 %offset, 2
6666 %tmp2 = add i32 %base, %tmp1
6767 %tmp3 = inttoptr i32 %tmp2 to i16*
None ; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {str\\.w\\W*r\[0-9\],\\W*\\\[r\[0-9\]*\\\]$} | count 1
1 ; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {str\\.w\\W*r\[0-9\],\\W*\\\[r\[0-9\]*,\\W*#+4092\\\]$} | count 1
2 ; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {str\\W*r\[0-9\],\\W*\\\[r\[0-9\]*,\\W*#-128\\\]$} | count 2
3 ; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | not grep {str\\.w\\W*r\[0-9\],\\W*\\\[r\[0-9\]*,\\W*#+4096\\\]$}
4 ; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {str\\.w\\W*r\[0-9\],\\W*\\\[r\[0-9\]*,\\W*+r\[0-9\]*\\\]$} | count 3
5 ; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {str\\.w\\W*r\[0-9\],\\W*\\\[r\[0-9\]*,\\W*+r\[0-9\]*,\\Wlsl #2\\\]$} | count 1
0 ; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | FileCheck %s
61
72 define i32 @f1(i32 %a, i32* %v) {
3 ; CHECK: f1:
4 ; CHECK: str r0, [r1]
85 store i32 %a, i32* %v
96 ret i32 %a
107 }
118
129 define i32 @f2(i32 %a, i32* %v) {
10 ; CHECK: f2:
11 ; CHECK: str.w r0, [r1, #+4092]
1312 %tmp2 = getelementptr i32* %v, i32 1023
1413 store i32 %a, i32* %tmp2
1514 ret i32 %a
1615 }
1716
1817 define i32 @f2a(i32 %a, i32* %v) {
18 ; CHECK: f2a:
19 ; CHECK: str r0, [r1, #-128]
1920 %tmp2 = getelementptr i32* %v, i32 -32
2021 store i32 %a, i32* %tmp2
2122 ret i32 %a
2223 }
2324
2425 define i32 @f3(i32 %a, i32* %v) {
26 ; CHECK: f3:
27 ; CHECK: mov.w r2, #4096
28 ; CHECK: str r0, [r1, r2]
2529 %tmp2 = getelementptr i32* %v, i32 1024
2630 store i32 %a, i32* %tmp2
2731 ret i32 %a
2933
3034 define i32 @f4(i32 %a, i32 %base) {
3135 entry:
36 ; CHECK: f4:
37 ; CHECK: str r0, [r1, #-128]
3238 %tmp1 = sub i32 %base, 128
3339 %tmp2 = inttoptr i32 %tmp1 to i32*
3440 store i32 %a, i32* %tmp2
3743
3844 define i32 @f5(i32 %a, i32 %base, i32 %offset) {
3945 entry:
46 ; CHECK: f5:
47 ; CHECK: str r0, [r1, r2]
4048 %tmp1 = add i32 %base, %offset
4149 %tmp2 = inttoptr i32 %tmp1 to i32*
4250 store i32 %a, i32* %tmp2
4553
4654 define i32 @f6(i32 %a, i32 %base, i32 %offset) {
4755 entry:
56 ; CHECK: f6:
57 ; CHECK: str.w r0, [r1, r2, lsl #2]
4858 %tmp1 = shl i32 %offset, 2
4959 %tmp2 = add i32 %base, %tmp1
5060 %tmp3 = inttoptr i32 %tmp2 to i32*
5464
5565 define i32 @f7(i32 %a, i32 %base, i32 %offset) {
5666 entry:
67 ; CHECK: f7:
68 ; CHECK: lsrs r2, r2, #2
69 ; CHECK: str r0, [r1, r2]
5770 %tmp1 = lshr i32 %offset, 2
5871 %tmp2 = add i32 %base, %tmp1
5972 %tmp3 = inttoptr i32 %tmp2 to i32*
None ; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {strb\\.w\\W*r\[0-9\],\\W*\\\[r\[0-9\]*\\\]$} | count 1
1 ; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {strb\\.w\\W*r\[0-9\],\\W*\\\[r\[0-9\]*,\\W*#+4092\\\]$} | count 1
2 ; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {strb\\W*r\[0-9\],\\W*\\\[r\[0-9\]*,\\W*#-128\\\]$} | count 2
3 ; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | not grep {strb\\.w\\W*r\[0-9\],\\W*\\\[r\[0-9\]*,\\W*#+4096\\\]$}
4 ; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {strb\\.w\\W*r\[0-9\],\\W*\\\[r\[0-9\]*,\\W*+r\[0-9\]*\\\]$} | count 3
5 ; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {strb\\.w\\W*r\[0-9\],\\W*\\\[r\[0-9\]*,\\W*+r\[0-9\]*,\\Wlsl #2\\\]$} | count 1
0 ; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | FileCheck %s
61
72 define i8 @f1(i8 %a, i8* %v) {
3 ; CHECK: f1:
4 ; CHECK: strb r0, [r1]
85 store i8 %a, i8* %v
96 ret i8 %a
107 }
118
129 define i8 @f2(i8 %a, i8* %v) {
10 ; CHECK: f2:
11 ; CHECK: strb.w r0, [r1, #+4092]
1312 %tmp2 = getelementptr i8* %v, i32 4092
1413 store i8 %a, i8* %tmp2
1514 ret i8 %a
1615 }
1716
1817 define i8 @f2a(i8 %a, i8* %v) {
18 ; CHECK: f2a:
19 ; CHECK: strb r0, [r1, #-128]
1920 %tmp2 = getelementptr i8* %v, i32 -128
2021 store i8 %a, i8* %tmp2
2122 ret i8 %a
2223 }
2324
2425 define i8 @f3(i8 %a, i8* %v) {
26 ; CHECK: f3:
27 ; CHECK: mov.w r2, #4096
28 ; CHECK: strb r0, [r1, r2]
2529 %tmp2 = getelementptr i8* %v, i32 4096
2630 store i8 %a, i8* %tmp2
2731 ret i8 %a
2933
3034 define i8 @f4(i8 %a, i32 %base) {
3135 entry:
36 ; CHECK: f4:
37 ; CHECK: strb r0, [r1, #-128]
3238 %tmp1 = sub i32 %base, 128
3339 %tmp2 = inttoptr i32 %tmp1 to i8*
3440 store i8 %a, i8* %tmp2
3743
3844 define i8 @f5(i8 %a, i32 %base, i32 %offset) {
3945 entry:
46 ; CHECK: f5:
47 ; CHECK: strb r0, [r1, r2]
4048 %tmp1 = add i32 %base, %offset
4149 %tmp2 = inttoptr i32 %tmp1 to i8*
4250 store i8 %a, i8* %tmp2
4553
4654 define i8 @f6(i8 %a, i32 %base, i32 %offset) {
4755 entry:
56 ; CHECK: f6:
57 ; CHECK: strb.w r0, [r1, r2, lsl #2]
4858 %tmp1 = shl i32 %offset, 2
4959 %tmp2 = add i32 %base, %tmp1
5060 %tmp3 = inttoptr i32 %tmp2 to i8*
5464
5565 define i8 @f7(i8 %a, i32 %base, i32 %offset) {
5666 entry:
67 ; CHECK: f7:
68 ; CHECK: lsrs r2, r2, #2
69 ; CHECK: strb r0, [r1, r2]
5770 %tmp1 = lshr i32 %offset, 2
5871 %tmp2 = add i32 %base, %tmp1
5972 %tmp3 = inttoptr i32 %tmp2 to i8*
None ; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {strh\\.w\\W*r\[0-9\],\\W*\\\[r\[0-9\]*\\\]$} | count 1
1 ; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {strh\\.w\\W*r\[0-9\],\\W*\\\[r\[0-9\]*,\\W*#+4092\\\]$} | count 1
2 ; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {strh\\W*r\[0-9\],\\W*\\\[r\[0-9\]*,\\W*#-128\\\]$} | count 2
3 ; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | not grep {strh\\.w\\W*r\[0-9\],\\W*\\\[r\[0-9\]*,\\W*#+4096\\\]$}
4 ; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {strh\\.w\\W*r\[0-9\],\\W*\\\[r\[0-9\]*,\\W*+r\[0-9\]*\\\]$} | count 3
5 ; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {strh\\.w\\W*r\[0-9\],\\W*\\\[r\[0-9\]*,\\W*+r\[0-9\]*,\\Wlsl #2\\\]$} | count 1
0 ; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | FileCheck %s
61
72 define i16 @f1(i16 %a, i16* %v) {
3 ; CHECK: f1:
4 ; CHECK: strh r0, [r1]
85 store i16 %a, i16* %v
96 ret i16 %a
107 }
118
129 define i16 @f2(i16 %a, i16* %v) {
10 ; CHECK: f2:
11 ; CHECK: strh.w r0, [r1, #+4092]
1312 %tmp2 = getelementptr i16* %v, i32 2046
1413 store i16 %a, i16* %tmp2
1514 ret i16 %a
1615 }
1716
1817 define i16 @f2a(i16 %a, i16* %v) {
18 ; CHECK: f2a:
19 ; CHECK: strh r0, [r1, #-128]
1920 %tmp2 = getelementptr i16* %v, i32 -64
2021 store i16 %a, i16* %tmp2
2122 ret i16 %a
2223 }
2324
2425 define i16 @f3(i16 %a, i16* %v) {
26 ; CHECK: f3:
27 ; CHECK: mov.w r2, #4096
28 ; CHECK: strh r0, [r1, r2]
2529 %tmp2 = getelementptr i16* %v, i32 2048
2630 store i16 %a, i16* %tmp2
2731 ret i16 %a
2933
3034 define i16 @f4(i16 %a, i32 %base) {
3135 entry:
36 ; CHECK: f4:
37 ; CHECK: strh r0, [r1, #-128]
3238 %tmp1 = sub i32 %base, 128
3339 %tmp2 = inttoptr i32 %tmp1 to i16*
3440 store i16 %a, i16* %tmp2
3743
3844 define i16 @f5(i16 %a, i32 %base, i32 %offset) {
3945 entry:
46 ; CHECK: f5:
47 ; CHECK: strh r0, [r1, r2]
4048 %tmp1 = add i32 %base, %offset
4149 %tmp2 = inttoptr i32 %tmp1 to i16*
4250 store i16 %a, i16* %tmp2
4553
4654 define i16 @f6(i16 %a, i32 %base, i32 %offset) {
4755 entry:
56 ; CHECK: f6:
57 ; CHECK: strh.w r0, [r1, r2, lsl #2]
4858 %tmp1 = shl i32 %offset, 2
4959 %tmp2 = add i32 %base, %tmp1
5060 %tmp3 = inttoptr i32 %tmp2 to i16*
5464
5565 define i16 @f7(i16 %a, i32 %base, i32 %offset) {
5666 entry:
67 ; CHECK: f7:
68 ; CHECK: lsrs r2, r2, #2
69 ; CHECK: strh r0, [r1, r2]
5770 %tmp1 = lshr i32 %offset, 2
5871 %tmp2 = add i32 %base, %tmp1
5972 %tmp3 = inttoptr i32 %tmp2 to i16*