llvm.org GIT mirror llvm / 1937233
[PM] Switch the TargetMachine interface from accepting a pass manager base which it adds a single analysis pass to, to instead return the type erased TargetTransformInfo object constructed for that TargetMachine. This removes all of the pass variants for TTI. There is now a single TTI *pass* in the Analysis layer. All of the Analysis <-> Target communication is through the TTI's type erased interface itself. While the diff is large here, it is nothing more that code motion to make types available in a header file for use in a different source file within each target. I've tried to keep all the doxygen comments and file boilerplate in line with this move, but let me know if I missed anything. With this in place, the next step to making TTI work with the new pass manager is to introduce a really simple new-style analysis that produces a TTI object via a callback into this routine on the target machine. Once we have that, we'll have the building blocks necessary to accept a function argument as well. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227685 91177308-0d34-0410-b5e6-96231b3b80d8 Chandler Carruth 5 years ago
41 changed file(s) with 1028 addition(s) and 932 deletion(s). Raw diff Collapse all Expand all
5959 /// This is used by targets to construct a TTI wrapping their target-specific
6060 /// implementaion that encodes appropriate costs for their target.
6161 template TargetTransformInfo(T Impl);
62
63 /// \brief Construct a baseline TTI object using a minimal implementation of
64 /// the \c Concept API below.
65 ///
66 /// The TTI implementation will reflect the information in the DataLayout
67 /// provided if non-null.
68 explicit TargetTransformInfo(const DataLayout *DL);
6269
6370 // Provide move semantics.
6471 TargetTransformInfo(TargetTransformInfo &&Arg);
722729 const TargetTransformInfo &getTTI() const { return TTI; }
723730 };
724731
725 /// \brief Create the base case instance of a pass in the TTI analysis group.
732 /// \brief Create an analysis pass wrapper around a TTI object.
726733 ///
727 /// This class provides the base case for the stack of TTI analyzes. It doesn't
728 /// delegate to anything and uses the STTI and VTTI objects passed in to
729 /// satisfy the queries.
730 ImmutablePass *createNoTargetTransformInfoPass(const DataLayout *DL);
734 /// This analysis pass just holds the TTI instance and makes it available to
735 /// clients.
736 ImmutablePass *createTargetTransformInfoWrapperPass(TargetTransformInfo TTI);
731737
732738 } // End llvm namespace
733739
620620
621621 /// @}
622622 };
623
624 /// \brief Concrete BasicTTIImpl that can be used if no further customization
625 /// is needed.
626 class BasicTTIImpl : public BasicTTIImplBase {
627 typedef BasicTTIImplBase BaseT;
628
629 public:
630 explicit BasicTTIImpl(const TargetMachine *TM = nullptr);
631
632 // Provide value semantics. MSVC requires that we spell all of these out.
633 BasicTTIImpl(const BasicTTIImpl &Arg)
634 : BaseT(static_cast(Arg)) {}
635 BasicTTIImpl(BasicTTIImpl &&Arg)
636 : BaseT(std::move(static_cast(Arg))) {}
637 BasicTTIImpl &operator=(const BasicTTIImpl &RHS) {
638 BaseT::operator=(static_cast(RHS));
639 return *this;
640 }
641 BasicTTIImpl &operator=(BasicTTIImpl &&RHS) {
642 BaseT::operator=(std::move(static_cast(RHS)));
643 return *this;
644 }
645 };
646
623647 }
624648
625649 #endif
3939 class TargetRegisterInfo;
4040 class TargetSelectionDAGInfo;
4141 class TargetSubtargetInfo;
42 class TargetTransformInfo;
4243 class formatted_raw_ostream;
4344 class raw_ostream;
4445 class TargetLoweringObjectFile;
185186 /// sections.
186187 void setFunctionSections(bool);
187188
188 /// \brief Register analysis passes for this target with a pass manager.
189 virtual void addAnalysisPasses(PassManagerBase &);
189 /// \brief Get a TTI implementation for the target.
190 ///
191 /// Targets should override this method to provide target-accurate
192 /// information to the mid-level optimizer. If left with the baseline only
193 /// a very conservative set of heuristics will be used.
194 virtual TargetTransformInfo getTTI();
190195
191196 /// CodeGenFileType - These enums are meant to be passed into
192197 /// addPassesToEmitFile to indicate what type of file to emit, and returned by
239244
240245 void initAsmInfo();
241246 public:
242 /// \brief Register analysis passes for this target with a pass manager.
243 ///
244 /// This registers target independent analysis passes.
245 void addAnalysisPasses(PassManagerBase &PM) override;
247 /// \brief Get a TTI implementation for the target.
248 ///
249 /// This uses the common code generator to produce a TTI implementation.
250 /// Targets may override it to provide more customized TTI implementation
251 /// instead.
252 TargetTransformInfo getTTI() override;
246253
247254 /// createPassConfig - Create a pass configuration object to be used by
248255 /// addPassToEmitX methods for generating a pipeline of CodeGen passes.
2020
2121 #define DEBUG_TYPE "tti"
2222
23 TargetTransformInfo::~TargetTransformInfo() {}
24
25 TargetTransformInfo::TargetTransformInfo(TargetTransformInfo &&Arg)
26 : TTIImpl(std::move(Arg.TTIImpl)) {}
27
28 TargetTransformInfo &TargetTransformInfo::operator=(TargetTransformInfo &&RHS) {
29 TTIImpl = std::move(RHS.TTIImpl);
30 return *this;
31 }
32
33 unsigned TargetTransformInfo::getOperationCost(unsigned Opcode, Type *Ty,
34 Type *OpTy) const {
35 return TTIImpl->getOperationCost(Opcode, Ty, OpTy);
36 }
37
38 unsigned TargetTransformInfo::getCallCost(FunctionType *FTy,
39 int NumArgs) const {
40 return TTIImpl->getCallCost(FTy, NumArgs);
41 }
42
43 unsigned
44 TargetTransformInfo::getCallCost(const Function *F,
45 ArrayRef Arguments) const {
46 return TTIImpl->getCallCost(F, Arguments);
47 }
48
49 unsigned
50 TargetTransformInfo::getIntrinsicCost(Intrinsic::ID IID, Type *RetTy,
51 ArrayRef Arguments) const {
52 return TTIImpl->getIntrinsicCost(IID, RetTy, Arguments);
53 }
54
55 unsigned TargetTransformInfo::getUserCost(const User *U) const {
56 return TTIImpl->getUserCost(U);
57 }
58
59 bool TargetTransformInfo::hasBranchDivergence() const {
60 return TTIImpl->hasBranchDivergence();
61 }
62
63 bool TargetTransformInfo::isLoweredToCall(const Function *F) const {
64 return TTIImpl->isLoweredToCall(F);
65 }
66
67 void TargetTransformInfo::getUnrollingPreferences(
68 const Function *F, Loop *L, UnrollingPreferences &UP) const {
69 return TTIImpl->getUnrollingPreferences(F, L, UP);
70 }
71
72 bool TargetTransformInfo::isLegalAddImmediate(int64_t Imm) const {
73 return TTIImpl->isLegalAddImmediate(Imm);
74 }
75
76 bool TargetTransformInfo::isLegalICmpImmediate(int64_t Imm) const {
77 return TTIImpl->isLegalICmpImmediate(Imm);
78 }
79
80 bool TargetTransformInfo::isLegalAddressingMode(Type *Ty, GlobalValue *BaseGV,
81 int64_t BaseOffset,
82 bool HasBaseReg,
83 int64_t Scale) const {
84 return TTIImpl->isLegalAddressingMode(Ty, BaseGV, BaseOffset, HasBaseReg,
85 Scale);
86 }
87
88 bool TargetTransformInfo::isLegalMaskedStore(Type *DataType,
89 int Consecutive) const {
90 return TTIImpl->isLegalMaskedStore(DataType, Consecutive);
91 }
92
93 bool TargetTransformInfo::isLegalMaskedLoad(Type *DataType,
94 int Consecutive) const {
95 return TTIImpl->isLegalMaskedLoad(DataType, Consecutive);
96 }
97
98 int TargetTransformInfo::getScalingFactorCost(Type *Ty, GlobalValue *BaseGV,
99 int64_t BaseOffset,
100 bool HasBaseReg,
101 int64_t Scale) const {
102 return TTIImpl->getScalingFactorCost(Ty, BaseGV, BaseOffset, HasBaseReg,
103 Scale);
104 }
105
106 bool TargetTransformInfo::isTruncateFree(Type *Ty1, Type *Ty2) const {
107 return TTIImpl->isTruncateFree(Ty1, Ty2);
108 }
109
110 bool TargetTransformInfo::isTypeLegal(Type *Ty) const {
111 return TTIImpl->isTypeLegal(Ty);
112 }
113
114 unsigned TargetTransformInfo::getJumpBufAlignment() const {
115 return TTIImpl->getJumpBufAlignment();
116 }
117
118 unsigned TargetTransformInfo::getJumpBufSize() const {
119 return TTIImpl->getJumpBufSize();
120 }
121
122 bool TargetTransformInfo::shouldBuildLookupTables() const {
123 return TTIImpl->shouldBuildLookupTables();
124 }
125
126 TargetTransformInfo::PopcntSupportKind
127 TargetTransformInfo::getPopcntSupport(unsigned IntTyWidthInBit) const {
128 return TTIImpl->getPopcntSupport(IntTyWidthInBit);
129 }
130
131 bool TargetTransformInfo::haveFastSqrt(Type *Ty) const {
132 return TTIImpl->haveFastSqrt(Ty);
133 }
134
135 unsigned TargetTransformInfo::getIntImmCost(const APInt &Imm, Type *Ty) const {
136 return TTIImpl->getIntImmCost(Imm, Ty);
137 }
138
139 unsigned TargetTransformInfo::getIntImmCost(unsigned Opcode, unsigned Idx,
140 const APInt &Imm, Type *Ty) const {
141 return TTIImpl->getIntImmCost(Opcode, Idx, Imm, Ty);
142 }
143
144 unsigned TargetTransformInfo::getIntImmCost(Intrinsic::ID IID, unsigned Idx,
145 const APInt &Imm, Type *Ty) const {
146 return TTIImpl->getIntImmCost(IID, Idx, Imm, Ty);
147 }
148
149 unsigned TargetTransformInfo::getNumberOfRegisters(bool Vector) const {
150 return TTIImpl->getNumberOfRegisters(Vector);
151 }
152
153 unsigned TargetTransformInfo::getRegisterBitWidth(bool Vector) const {
154 return TTIImpl->getRegisterBitWidth(Vector);
155 }
156
157 unsigned TargetTransformInfo::getMaxInterleaveFactor() const {
158 return TTIImpl->getMaxInterleaveFactor();
159 }
160
161 unsigned TargetTransformInfo::getArithmeticInstrCost(
162 unsigned Opcode, Type *Ty, OperandValueKind Opd1Info,
163 OperandValueKind Opd2Info, OperandValueProperties Opd1PropInfo,
164 OperandValueProperties Opd2PropInfo) const {
165 return TTIImpl->getArithmeticInstrCost(Opcode, Ty, Opd1Info, Opd2Info,
166 Opd1PropInfo, Opd2PropInfo);
167 }
168
169 unsigned TargetTransformInfo::getShuffleCost(ShuffleKind Kind, Type *Ty,
170 int Index, Type *SubTp) const {
171 return TTIImpl->getShuffleCost(Kind, Ty, Index, SubTp);
172 }
173
174 unsigned TargetTransformInfo::getCastInstrCost(unsigned Opcode, Type *Dst,
175 Type *Src) const {
176 return TTIImpl->getCastInstrCost(Opcode, Dst, Src);
177 }
178
179 unsigned TargetTransformInfo::getCFInstrCost(unsigned Opcode) const {
180 return TTIImpl->getCFInstrCost(Opcode);
181 }
182
183 unsigned TargetTransformInfo::getCmpSelInstrCost(unsigned Opcode, Type *ValTy,
184 Type *CondTy) const {
185 return TTIImpl->getCmpSelInstrCost(Opcode, ValTy, CondTy);
186 }
187
188 unsigned TargetTransformInfo::getVectorInstrCost(unsigned Opcode, Type *Val,
189 unsigned Index) const {
190 return TTIImpl->getVectorInstrCost(Opcode, Val, Index);
191 }
192
193 unsigned TargetTransformInfo::getMemoryOpCost(unsigned Opcode, Type *Src,
194 unsigned Alignment,
195 unsigned AddressSpace) const {
196 return TTIImpl->getMemoryOpCost(Opcode, Src, Alignment, AddressSpace);
197 }
198
199 unsigned
200 TargetTransformInfo::getMaskedMemoryOpCost(unsigned Opcode, Type *Src,
201 unsigned Alignment,
202 unsigned AddressSpace) const {
203 return TTIImpl->getMaskedMemoryOpCost(Opcode, Src, Alignment, AddressSpace);
204 }
205
206 unsigned
207 TargetTransformInfo::getIntrinsicInstrCost(Intrinsic::ID ID, Type *RetTy,
208 ArrayRef Tys) const {
209 return TTIImpl->getIntrinsicInstrCost(ID, RetTy, Tys);
210 }
211
212 unsigned TargetTransformInfo::getNumberOfParts(Type *Tp) const {
213 return TTIImpl->getNumberOfParts(Tp);
214 }
215
216 unsigned TargetTransformInfo::getAddressComputationCost(Type *Tp,
217 bool IsComplex) const {
218 return TTIImpl->getAddressComputationCost(Tp, IsComplex);
219 }
220
221 unsigned TargetTransformInfo::getReductionCost(unsigned Opcode, Type *Ty,
222 bool IsPairwiseForm) const {
223 return TTIImpl->getReductionCost(Opcode, Ty, IsPairwiseForm);
224 }
225
226 unsigned
227 TargetTransformInfo::getCostOfKeepingLiveOverCall(ArrayRef Tys) const {
228 return TTIImpl->getCostOfKeepingLiveOverCall(Tys);
229 }
230
231 bool TargetTransformInfo::getTgtMemIntrinsic(IntrinsicInst *Inst,
232 MemIntrinsicInfo &Info) const {
233 return TTIImpl->getTgtMemIntrinsic(Inst, Info);
234 }
235
236 Value *TargetTransformInfo::getOrCreateResultFromMemIntrinsic(
237 IntrinsicInst *Inst, Type *ExpectedType) const {
238 return TTIImpl->getOrCreateResultFromMemIntrinsic(Inst, ExpectedType);
239 }
240
241 TargetTransformInfo::Concept::~Concept() {}
242
24323 namespace {
24424 /// \brief No-op implementation of the TTI interface using the utility base
24525 /// classes.
25131 };
25232 }
25333
34 TargetTransformInfo::TargetTransformInfo(const DataLayout *DL)
35 : TTIImpl(new Model(NoTTIImpl(DL))) {}
36
37 TargetTransformInfo::~TargetTransformInfo() {}
38
39 TargetTransformInfo::TargetTransformInfo(TargetTransformInfo &&Arg)
40 : TTIImpl(std::move(Arg.TTIImpl)) {}
41
42 TargetTransformInfo &TargetTransformInfo::operator=(TargetTransformInfo &&RHS) {
43 TTIImpl = std::move(RHS.TTIImpl);
44 return *this;
45 }
46
47 unsigned TargetTransformInfo::getOperationCost(unsigned Opcode, Type *Ty,
48 Type *OpTy) const {
49 return TTIImpl->getOperationCost(Opcode, Ty, OpTy);
50 }
51
52 unsigned TargetTransformInfo::getCallCost(FunctionType *FTy,
53 int NumArgs) const {
54 return TTIImpl->getCallCost(FTy, NumArgs);
55 }
56
57 unsigned
58 TargetTransformInfo::getCallCost(const Function *F,
59 ArrayRef Arguments) const {
60 return TTIImpl->getCallCost(F, Arguments);
61 }
62
63 unsigned
64 TargetTransformInfo::getIntrinsicCost(Intrinsic::ID IID, Type *RetTy,
65 ArrayRef Arguments) const {
66 return TTIImpl->getIntrinsicCost(IID, RetTy, Arguments);
67 }
68
69 unsigned TargetTransformInfo::getUserCost(const User *U) const {
70 return TTIImpl->getUserCost(U);
71 }
72
73 bool TargetTransformInfo::hasBranchDivergence() const {
74 return TTIImpl->hasBranchDivergence();
75 }
76
77 bool TargetTransformInfo::isLoweredToCall(const Function *F) const {
78 return TTIImpl->isLoweredToCall(F);
79 }
80
81 void TargetTransformInfo::getUnrollingPreferences(
82 const Function *F, Loop *L, UnrollingPreferences &UP) const {
83 return TTIImpl->getUnrollingPreferences(F, L, UP);
84 }
85
86 bool TargetTransformInfo::isLegalAddImmediate(int64_t Imm) const {
87 return TTIImpl->isLegalAddImmediate(Imm);
88 }
89
90 bool TargetTransformInfo::isLegalICmpImmediate(int64_t Imm) const {
91 return TTIImpl->isLegalICmpImmediate(Imm);
92 }
93
94 bool TargetTransformInfo::isLegalAddressingMode(Type *Ty, GlobalValue *BaseGV,
95 int64_t BaseOffset,
96 bool HasBaseReg,
97 int64_t Scale) const {
98 return TTIImpl->isLegalAddressingMode(Ty, BaseGV, BaseOffset, HasBaseReg,
99 Scale);
100 }
101
102 bool TargetTransformInfo::isLegalMaskedStore(Type *DataType,
103 int Consecutive) const {
104 return TTIImpl->isLegalMaskedStore(DataType, Consecutive);
105 }
106
107 bool TargetTransformInfo::isLegalMaskedLoad(Type *DataType,
108 int Consecutive) const {
109 return TTIImpl->isLegalMaskedLoad(DataType, Consecutive);
110 }
111
112 int TargetTransformInfo::getScalingFactorCost(Type *Ty, GlobalValue *BaseGV,
113 int64_t BaseOffset,
114 bool HasBaseReg,
115 int64_t Scale) const {
116 return TTIImpl->getScalingFactorCost(Ty, BaseGV, BaseOffset, HasBaseReg,
117 Scale);
118 }
119
120 bool TargetTransformInfo::isTruncateFree(Type *Ty1, Type *Ty2) const {
121 return TTIImpl->isTruncateFree(Ty1, Ty2);
122 }
123
124 bool TargetTransformInfo::isTypeLegal(Type *Ty) const {
125 return TTIImpl->isTypeLegal(Ty);
126 }
127
128 unsigned TargetTransformInfo::getJumpBufAlignment() const {
129 return TTIImpl->getJumpBufAlignment();
130 }
131
132 unsigned TargetTransformInfo::getJumpBufSize() const {
133 return TTIImpl->getJumpBufSize();
134 }
135
136 bool TargetTransformInfo::shouldBuildLookupTables() const {
137 return TTIImpl->shouldBuildLookupTables();
138 }
139
140 TargetTransformInfo::PopcntSupportKind
141 TargetTransformInfo::getPopcntSupport(unsigned IntTyWidthInBit) const {
142 return TTIImpl->getPopcntSupport(IntTyWidthInBit);
143 }
144
145 bool TargetTransformInfo::haveFastSqrt(Type *Ty) const {
146 return TTIImpl->haveFastSqrt(Ty);
147 }
148
149 unsigned TargetTransformInfo::getIntImmCost(const APInt &Imm, Type *Ty) const {
150 return TTIImpl->getIntImmCost(Imm, Ty);
151 }
152
153 unsigned TargetTransformInfo::getIntImmCost(unsigned Opcode, unsigned Idx,
154 const APInt &Imm, Type *Ty) const {
155 return TTIImpl->getIntImmCost(Opcode, Idx, Imm, Ty);
156 }
157
158 unsigned TargetTransformInfo::getIntImmCost(Intrinsic::ID IID, unsigned Idx,
159 const APInt &Imm, Type *Ty) const {
160 return TTIImpl->getIntImmCost(IID, Idx, Imm, Ty);
161 }
162
163 unsigned TargetTransformInfo::getNumberOfRegisters(bool Vector) const {
164 return TTIImpl->getNumberOfRegisters(Vector);
165 }
166
167 unsigned TargetTransformInfo::getRegisterBitWidth(bool Vector) const {
168 return TTIImpl->getRegisterBitWidth(Vector);
169 }
170
171 unsigned TargetTransformInfo::getMaxInterleaveFactor() const {
172 return TTIImpl->getMaxInterleaveFactor();
173 }
174
175 unsigned TargetTransformInfo::getArithmeticInstrCost(
176 unsigned Opcode, Type *Ty, OperandValueKind Opd1Info,
177 OperandValueKind Opd2Info, OperandValueProperties Opd1PropInfo,
178 OperandValueProperties Opd2PropInfo) const {
179 return TTIImpl->getArithmeticInstrCost(Opcode, Ty, Opd1Info, Opd2Info,
180 Opd1PropInfo, Opd2PropInfo);
181 }
182
183 unsigned TargetTransformInfo::getShuffleCost(ShuffleKind Kind, Type *Ty,
184 int Index, Type *SubTp) const {
185 return TTIImpl->getShuffleCost(Kind, Ty, Index, SubTp);
186 }
187
188 unsigned TargetTransformInfo::getCastInstrCost(unsigned Opcode, Type *Dst,
189 Type *Src) const {
190 return TTIImpl->getCastInstrCost(Opcode, Dst, Src);
191 }
192
193 unsigned TargetTransformInfo::getCFInstrCost(unsigned Opcode) const {
194 return TTIImpl->getCFInstrCost(Opcode);
195 }
196
197 unsigned TargetTransformInfo::getCmpSelInstrCost(unsigned Opcode, Type *ValTy,
198 Type *CondTy) const {
199 return TTIImpl->getCmpSelInstrCost(Opcode, ValTy, CondTy);
200 }
201
202 unsigned TargetTransformInfo::getVectorInstrCost(unsigned Opcode, Type *Val,
203 unsigned Index) const {
204 return TTIImpl->getVectorInstrCost(Opcode, Val, Index);
205 }
206
207 unsigned TargetTransformInfo::getMemoryOpCost(unsigned Opcode, Type *Src,
208 unsigned Alignment,
209 unsigned AddressSpace) const {
210 return TTIImpl->getMemoryOpCost(Opcode, Src, Alignment, AddressSpace);
211 }
212
213 unsigned
214 TargetTransformInfo::getMaskedMemoryOpCost(unsigned Opcode, Type *Src,
215 unsigned Alignment,
216 unsigned AddressSpace) const {
217 return TTIImpl->getMaskedMemoryOpCost(Opcode, Src, Alignment, AddressSpace);
218 }
219
220 unsigned
221 TargetTransformInfo::getIntrinsicInstrCost(Intrinsic::ID ID, Type *RetTy,
222 ArrayRef Tys) const {
223 return TTIImpl->getIntrinsicInstrCost(ID, RetTy, Tys);
224 }
225
226 unsigned TargetTransformInfo::getNumberOfParts(Type *Tp) const {
227 return TTIImpl->getNumberOfParts(Tp);
228 }
229
230 unsigned TargetTransformInfo::getAddressComputationCost(Type *Tp,
231 bool IsComplex) const {
232 return TTIImpl->getAddressComputationCost(Tp, IsComplex);
233 }
234
235 unsigned TargetTransformInfo::getReductionCost(unsigned Opcode, Type *Ty,
236 bool IsPairwiseForm) const {
237 return TTIImpl->getReductionCost(Opcode, Ty, IsPairwiseForm);
238 }
239
240 unsigned
241 TargetTransformInfo::getCostOfKeepingLiveOverCall(ArrayRef Tys) const {
242 return TTIImpl->getCostOfKeepingLiveOverCall(Tys);
243 }
244
245 bool TargetTransformInfo::getTgtMemIntrinsic(IntrinsicInst *Inst,
246 MemIntrinsicInfo &Info) const {
247 return TTIImpl->getTgtMemIntrinsic(Inst, Info);
248 }
249
250 Value *TargetTransformInfo::getOrCreateResultFromMemIntrinsic(
251 IntrinsicInst *Inst, Type *ExpectedType) const {
252 return TTIImpl->getOrCreateResultFromMemIntrinsic(Inst, ExpectedType);
253 }
254
255 TargetTransformInfo::Concept::~Concept() {}
256
254257 // Register the basic pass.
255258 INITIALIZE_PASS(TargetTransformInfoWrapperPass, "tti",
256259 "Target Transform Information", false, true)
271274 *PassRegistry::getPassRegistry());
272275 }
273276
274 ImmutablePass *llvm::createNoTargetTransformInfoPass(const DataLayout *DL) {
275 return new TargetTransformInfoWrapperPass(NoTTIImpl(DL));
276 }
277 ImmutablePass *
278 llvm::createTargetTransformInfoWrapperPass(TargetTransformInfo TTI) {
279 return new TargetTransformInfoWrapperPass(std::move(TTI));
280 }
2323 #include
2424 using namespace llvm;
2525
26 #define DEBUG_TYPE "basictti"
27
28 // This flag is used by the template base class for BasicTTIImpl, and here to
29 // provide a definition.
2630 cl::opt
2731 llvm::PartialUnrollingThreshold("partial-unrolling-threshold", cl::init(0),
2832 cl::desc("Threshold for partial unrolling"),
2933 cl::Hidden);
3034
31 #define DEBUG_TYPE "basictti"
32
33 namespace {
34 class BasicTTIImpl : public BasicTTIImplBase {
35 typedef BasicTTIImplBase BaseT;
36
37 public:
38 explicit BasicTTIImpl(const TargetMachine *TM = nullptr) : BaseT(TM) {}
39
40 // Provide value semantics. MSVC requires that we spell all of these out.
41 BasicTTIImpl(const BasicTTIImpl &Arg)
42 : BaseT(static_cast(Arg)) {}
43 BasicTTIImpl(BasicTTIImpl &&Arg)
44 : BaseT(std::move(static_cast(Arg))) {}
45 BasicTTIImpl &operator=(const BasicTTIImpl &RHS) {
46 BaseT::operator=(static_cast(RHS));
47 return *this;
48 }
49 BasicTTIImpl &operator=(BasicTTIImpl &&RHS) {
50 BaseT::operator=(std::move(static_cast(RHS)));
51 return *this;
52 }
53 };
54 }
55
56 ImmutablePass *
57 llvm::createBasicTargetTransformInfoPass(const TargetMachine *TM) {
58 return new TargetTransformInfoWrapperPass(BasicTTIImpl(TM));
59 }
60
61
62 //===----------------------------------------------------------------------===//
63 //
64 // Calls used by the vectorizers.
65 //
66 //===----------------------------------------------------------------------===//
67
35 BasicTTIImpl::BasicTTIImpl(const TargetMachine *TM) : BaseT(TM) {}
1414 #include "llvm/Analysis/JumpInstrTableInfo.h"
1515 #include "llvm/Analysis/Passes.h"
1616 #include "llvm/CodeGen/AsmPrinter.h"
17 #include "llvm/CodeGen/BasicTTIImpl.h"
1718 #include "llvm/CodeGen/ForwardControlFlowIntegrity.h"
1819 #include "llvm/CodeGen/JumpInstrTables.h"
1920 #include "llvm/CodeGen/MachineFunctionAnalysis.h"
7677 CodeGenInfo = T.createMCCodeGenInfo(Triple, RM, CM, OL);
7778 }
7879
79 void LLVMTargetMachine::addAnalysisPasses(PassManagerBase &PM) {
80 PM.add(createBasicTargetTransformInfoPass(this));
80 TargetTransformInfo LLVMTargetMachine::getTTI() {
81 return TargetTransformInfo(BasicTTIImpl(this));
8182 }
8283
8384 /// addPassesToX helper drives creation and initialization of TargetPassConfig.
8889 AnalysisID StopAfter) {
8990
9091 // Add internal analysis passes from the target machine.
91 TM->addAnalysisPasses(PM);
92 PM.add(createTargetTransformInfoWrapperPass(TM->getTTI()));
9293
9394 // Targets may override createPassConfig to provide a target-specific
9495 // subclass.
1515 #include "llvm/ADT/StringExtras.h"
1616 #include "llvm/Analysis/Passes.h"
1717 #include "llvm/Analysis/TargetLibraryInfo.h"
18 #include "llvm/Analysis/TargetTransformInfo.h"
1819 #include "llvm/Bitcode/ReaderWriter.h"
1920 #include "llvm/CodeGen/RuntimeLibcalls.h"
2021 #include "llvm/Config/config.h"
488489 mergedModule->setDataLayout(TargetMach->getDataLayout());
489490
490491 passes.add(new DataLayoutPass());
491 TargetMach->addAnalysisPasses(passes);
492 passes.add(createTargetTransformInfoWrapperPass(TargetMach->getTTI()));
492493
493494 Triple TargetTriple(TargetMach->getTargetTriple());
494495 PassManagerBuilder PMB;
1212 #include "AArch64.h"
1313 #include "AArch64TargetMachine.h"
1414 #include "AArch64TargetObjectFile.h"
15 #include "AArch64TargetTransformInfo.h"
1516 #include "llvm/CodeGen/Passes.h"
1617 #include "llvm/CodeGen/RegAllocRegistry.h"
1718 #include "llvm/IR/Function.h"
194195 };
195196 } // namespace
196197
197 void AArch64TargetMachine::addAnalysisPasses(PassManagerBase &PM) {
198 PM.add(createAArch64TargetTransformInfoPass(this));
198 TargetTransformInfo AArch64TargetMachine::getTTI() {
199 return TargetTransformInfo(AArch64TTIImpl(this));
199200 }
200201
201202 TargetPassConfig *AArch64TargetMachine::createPassConfig(PassManagerBase &PM) {
4545 TargetPassConfig *createPassConfig(PassManagerBase &PM) override;
4646
4747 /// \brief Register AArch64 analysis passes with a pass manager.
48 void addAnalysisPasses(PassManagerBase &PM) override;
48 TargetTransformInfo getTTI() override;
4949
5050 TargetLoweringObjectFile* getObjFileLowering() const override {
5151 return TLOF.get();
None //===-- AArch64TargetTransformInfo.cpp - AArch64 specific TTI pass --------===//
0 //===-- AArch64TargetTransformInfo.cpp - AArch64 specific TTI -------------===//
11 //
22 // The LLVM Compiler Infrastructure
33 //
55 // License. See LICENSE.TXT for details.
66 //
77 //===----------------------------------------------------------------------===//
8 /// \file
9 /// This file implements a TargetTransformInfo analysis pass specific to the
10 /// AArch64 target machine. It uses the target's detailed information to provide
11 /// more precise answers to certain TTI queries, while letting the target
12 /// independent and default TTI implementations handle the rest.
13 ///
14 //===----------------------------------------------------------------------===//
15
16 #include "AArch64.h"
17 #include "AArch64TargetMachine.h"
8
9 #include "AArch64TargetTransformInfo.h"
1810 #include "MCTargetDesc/AArch64AddressingModes.h"
1911 #include "llvm/Analysis/TargetTransformInfo.h"
2012 #include "llvm/CodeGen/BasicTTIImpl.h"
2517 using namespace llvm;
2618
2719 #define DEBUG_TYPE "aarch64tti"
28
29 namespace {
30
31 class AArch64TTIImpl : public BasicTTIImplBase {
32 typedef BasicTTIImplBase BaseT;
33 typedef TargetTransformInfo TTI;
34
35 const AArch64Subtarget *ST;
36 const AArch64TargetLowering *TLI;
37
38 /// Estimate the overhead of scalarizing an instruction. Insert and Extract
39 /// are set if the result needs to be inserted and/or extracted from vectors.
40 unsigned getScalarizationOverhead(Type *Ty, bool Insert, bool Extract);
41
42 enum MemIntrinsicType {
43 VECTOR_LDST_TWO_ELEMENTS,
44 VECTOR_LDST_THREE_ELEMENTS,
45 VECTOR_LDST_FOUR_ELEMENTS
46 };
47
48 public:
49 explicit AArch64TTIImpl(const AArch64TargetMachine *TM = nullptr)
50 : BaseT(TM), ST(TM ? TM->getSubtargetImpl() : nullptr),
51 TLI(ST ? ST->getTargetLowering() : nullptr) {}
52
53 // Provide value semantics. MSVC requires that we spell all of these out.
54 AArch64TTIImpl(const AArch64TTIImpl &Arg)
55 : BaseT(static_cast(Arg)), ST(Arg.ST), TLI(Arg.TLI) {}
56 AArch64TTIImpl(AArch64TTIImpl &&Arg)
57 : BaseT(std::move(static_cast(Arg))), ST(std::move(Arg.ST)),
58 TLI(std::move(Arg.TLI)) {}
59 AArch64TTIImpl &operator=(const AArch64TTIImpl &RHS) {
60 BaseT::operator=(static_cast(RHS));
61 ST = RHS.ST;
62 TLI = RHS.TLI;
63 return *this;
64 }
65 AArch64TTIImpl &operator=(AArch64TTIImpl &&RHS) {
66 BaseT::operator=(std::move(static_cast(RHS)));
67 ST = std::move(RHS.ST);
68 TLI = std::move(RHS.TLI);
69 return *this;
70 }
71
72 /// \name Scalar TTI Implementations
73 /// @{
74
75 using BaseT::getIntImmCost;
76 unsigned getIntImmCost(int64_t Val);
77 unsigned getIntImmCost(const APInt &Imm, Type *Ty);
78 unsigned getIntImmCost(unsigned Opcode, unsigned Idx, const APInt &Imm,
79 Type *Ty);
80 unsigned getIntImmCost(Intrinsic::ID IID, unsigned Idx, const APInt &Imm,
81 Type *Ty);
82 TTI::PopcntSupportKind getPopcntSupport(unsigned TyWidth);
83
84 /// @}
85
86 /// \name Vector TTI Implementations
87 /// @{
88
89 unsigned getNumberOfRegisters(bool Vector) {
90 if (Vector) {
91 if (ST->hasNEON())
92 return 32;
93 return 0;
94 }
95 return 31;
96 }
97
98 unsigned getRegisterBitWidth(bool Vector) {
99 if (Vector) {
100 if (ST->hasNEON())
101 return 128;
102 return 0;
103 }
104 return 64;
105 }
106
107 unsigned getMaxInterleaveFactor();
108
109 unsigned getCastInstrCost(unsigned Opcode, Type *Dst, Type *Src);
110
111 unsigned getVectorInstrCost(unsigned Opcode, Type *Val, unsigned Index);
112
113 unsigned getArithmeticInstrCost(
114 unsigned Opcode, Type *Ty,
115 TTI::OperandValueKind Opd1Info = TTI::OK_AnyValue,
116 TTI::OperandValueKind Opd2Info = TTI::OK_AnyValue,
117 TTI::OperandValueProperties Opd1PropInfo = TTI::OP_None,
118 TTI::OperandValueProperties Opd2PropInfo = TTI::OP_None);
119
120 unsigned getAddressComputationCost(Type *Ty, bool IsComplex);
121
122 unsigned getCmpSelInstrCost(unsigned Opcode, Type *ValTy, Type *CondTy);
123
124 unsigned getMemoryOpCost(unsigned Opcode, Type *Src, unsigned Alignment,
125 unsigned AddressSpace);
126
127 unsigned getCostOfKeepingLiveOverCall(ArrayRef Tys);
128
129 void getUnrollingPreferences(const Function *F, Loop *L,
130 TTI::UnrollingPreferences &UP);
131
132 Value *getOrCreateResultFromMemIntrinsic(IntrinsicInst *Inst,
133 Type *ExpectedType);
134
135 bool getTgtMemIntrinsic(IntrinsicInst *Inst, MemIntrinsicInfo &Info);
136
137 /// @}
138 };
139
140 } // end anonymous namespace
141
142 ImmutablePass *
143 llvm::createAArch64TargetTransformInfoPass(const AArch64TargetMachine *TM) {
144 return new TargetTransformInfoWrapperPass(AArch64TTIImpl(TM));
145 }
14620
14721 /// \brief Calculate the cost of materializing a 64-bit value. This helper
14822 /// method might only calculate a fraction of a larger immediate. Therefore it
0 //===-- AArch64TargetTransformInfo.h - AArch64 specific TTI -----*- C++ -*-===//
1 //
2 // The LLVM Compiler Infrastructure
3 //
4 // This file is distributed under the University of Illinois Open Source
5 // License. See LICENSE.TXT for details.
6 //
7 //===----------------------------------------------------------------------===//
8 /// \file
9 /// This file a TargetTransformInfo::Concept conforming object specific to the
10 /// AArch64 target machine. It uses the target's detailed information to
11 /// provide more precise answers to certain TTI queries, while letting the
12 /// target independent and default TTI implementations handle the rest.
13 ///
14 //===----------------------------------------------------------------------===//
15
16 #ifndef LLVM_LIB_TARGET_AARCH64_AARCH64TARGETTRANSFORMINFO_H
17 #define LLVM_LIB_TARGET_AARCH64_AARCH64TARGETTRANSFORMINFO_H
18
19 #include "AArch64.h"
20 #include "AArch64TargetMachine.h"
21 #include "llvm/Analysis/TargetTransformInfo.h"
22 #include "llvm/CodeGen/BasicTTIImpl.h"
23 #include "llvm/Target/TargetLowering.h"
24 #include
25
26 namespace llvm {
27
28 class AArch64TTIImpl : public BasicTTIImplBase {
29 typedef BasicTTIImplBase BaseT;
30 typedef TargetTransformInfo TTI;
31
32 const AArch64Subtarget *ST;
33 const AArch64TargetLowering *TLI;
34
35 /// Estimate the overhead of scalarizing an instruction. Insert and Extract
36 /// are set if the result needs to be inserted and/or extracted from vectors.
37 unsigned getScalarizationOverhead(Type *Ty, bool Insert, bool Extract);
38
39 enum MemIntrinsicType {
40 VECTOR_LDST_TWO_ELEMENTS,
41 VECTOR_LDST_THREE_ELEMENTS,
42 VECTOR_LDST_FOUR_ELEMENTS
43 };
44
45 public:
46 explicit AArch64TTIImpl(const AArch64TargetMachine *TM = nullptr)
47 : BaseT(TM), ST(TM ? TM->getSubtargetImpl() : nullptr),
48 TLI(ST ? ST->getTargetLowering() : nullptr) {}
49
50 // Provide value semantics. MSVC requires that we spell all of these out.
51 AArch64TTIImpl(const AArch64TTIImpl &Arg)
52 : BaseT(static_cast(Arg)), ST(Arg.ST), TLI(Arg.TLI) {}
53 AArch64TTIImpl(AArch64TTIImpl &&Arg)
54 : BaseT(std::move(static_cast(Arg))), ST(std::move(Arg.ST)),
55 TLI(std::move(Arg.TLI)) {}
56 AArch64TTIImpl &operator=(const AArch64TTIImpl &RHS) {
57 BaseT::operator=(static_cast(RHS));
58 ST = RHS.ST;
59 TLI = RHS.TLI;
60 return *this;
61 }
62 AArch64TTIImpl &operator=(AArch64TTIImpl &&RHS) {
63 BaseT::operator=(std::move(static_cast(RHS)));
64 ST = std::move(RHS.ST);
65 TLI = std::move(RHS.TLI);
66 return *this;
67 }
68
69 /// \name Scalar TTI Implementations
70 /// @{
71
72 using BaseT::getIntImmCost;
73 unsigned getIntImmCost(int64_t Val);
74 unsigned getIntImmCost(const APInt &Imm, Type *Ty);
75 unsigned getIntImmCost(unsigned Opcode, unsigned Idx, const APInt &Imm,
76 Type *Ty);
77 unsigned getIntImmCost(Intrinsic::ID IID, unsigned Idx, const APInt &Imm,
78 Type *Ty);
79 TTI::PopcntSupportKind getPopcntSupport(unsigned TyWidth);
80
81 /// @}
82
83 /// \name Vector TTI Implementations
84 /// @{
85
86 unsigned getNumberOfRegisters(bool Vector) {
87 if (Vector) {
88 if (ST->hasNEON())
89 return 32;
90 return 0;
91 }
92 return 31;
93 }
94
95 unsigned getRegisterBitWidth(bool Vector) {
96 if (Vector) {
97 if (ST->hasNEON())
98 return 128;
99 return 0;
100 }
101 return 64;
102 }
103
104 unsigned getMaxInterleaveFactor();
105
106 unsigned getCastInstrCost(unsigned Opcode, Type *Dst, Type *Src);
107
108 unsigned getVectorInstrCost(unsigned Opcode, Type *Val, unsigned Index);
109
110 unsigned getArithmeticInstrCost(
111 unsigned Opcode, Type *Ty,
112 TTI::OperandValueKind Opd1Info = TTI::OK_AnyValue,
113 TTI::OperandValueKind Opd2Info = TTI::OK_AnyValue,
114 TTI::OperandValueProperties Opd1PropInfo = TTI::OP_None,
115 TTI::OperandValueProperties Opd2PropInfo = TTI::OP_None);
116
117 unsigned getAddressComputationCost(Type *Ty, bool IsComplex);
118
119 unsigned getCmpSelInstrCost(unsigned Opcode, Type *ValTy, Type *CondTy);
120
121 unsigned getMemoryOpCost(unsigned Opcode, Type *Src, unsigned Alignment,
122 unsigned AddressSpace);
123
124 unsigned getCostOfKeepingLiveOverCall(ArrayRef Tys);
125
126 void getUnrollingPreferences(const Function *F, Loop *L,
127 TTI::UnrollingPreferences &UP);
128
129 Value *getOrCreateResultFromMemIntrinsic(IntrinsicInst *Inst,
130 Type *ExpectedType);
131
132 bool getTgtMemIntrinsic(IntrinsicInst *Inst, MemIntrinsicInfo &Info);
133
134 /// @}
135 };
136
137 } // end namespace llvm
138
139 #endif
1313 #include "ARMFrameLowering.h"
1414 #include "ARMTargetMachine.h"
1515 #include "ARMTargetObjectFile.h"
16 #include "ARMTargetTransformInfo.h"
1617 #include "llvm/CodeGen/Passes.h"
1718 #include "llvm/IR/Function.h"
1819 #include "llvm/MC/MCAsmInfo.h"
214215 return I.get();
215216 }
216217
217 void ARMBaseTargetMachine::addAnalysisPasses(PassManagerBase &PM) {
218 PM.add(createARMTargetTransformInfoPass(this));
218 TargetTransformInfo ARMBaseTargetMachine::getTTI() {
219 return TargetTransformInfo(ARMTTIImpl(this));
219220 }
220221
221222
4949 const DataLayout *getDataLayout() const override { return &DL; }
5050
5151 /// \brief Register ARM analysis passes with a pass manager.
52 void addAnalysisPasses(PassManagerBase &PM) override;
52 TargetTransformInfo getTTI() override;
5353
5454 // Pass Pipeline Configuration
5555 TargetPassConfig *createPassConfig(PassManagerBase &PM) override;
None //===-- ARMTargetTransformInfo.cpp - ARM specific TTI pass ----------------===//
0 //===-- ARMTargetTransformInfo.cpp - ARM specific TTI ---------------------===//
11 //
22 // The LLVM Compiler Infrastructure
33 //
55 // License. See LICENSE.TXT for details.
66 //
77 //===----------------------------------------------------------------------===//
8 /// \file
9 /// This file implements a TargetTransformInfo analysis pass specific to the
10 /// ARM target machine. It uses the target's detailed information to provide
11 /// more precise answers to certain TTI queries, while letting the target
12 /// independent and default TTI implementations handle the rest.
13 ///
14 //===----------------------------------------------------------------------===//
15
16 #include "ARM.h"
17 #include "ARMTargetMachine.h"
18 #include "llvm/Analysis/TargetTransformInfo.h"
19 #include "llvm/CodeGen/BasicTTIImpl.h"
8
9 #include "ARMTargetTransformInfo.h"
2010 #include "llvm/Support/Debug.h"
2111 #include "llvm/Target/CostTable.h"
2212 #include "llvm/Target/TargetLowering.h"
2313 using namespace llvm;
2414
2515 #define DEBUG_TYPE "armtti"
26
27 namespace {
28
29 class ARMTTIImpl : public BasicTTIImplBase {
30 typedef BasicTTIImplBase BaseT;
31 typedef TargetTransformInfo TTI;
32
33 const ARMSubtarget *ST;
34 const ARMTargetLowering *TLI;
35
36 /// Estimate the overhead of scalarizing an instruction. Insert and Extract
37 /// are set if the result needs to be inserted and/or extracted from vectors.
38 unsigned getScalarizationOverhead(Type *Ty, bool Insert, bool Extract);
39
40 public:
41 explicit ARMTTIImpl(const ARMBaseTargetMachine *TM = nullptr)
42 : BaseT(TM), ST(TM ? TM->getSubtargetImpl() : nullptr),
43 TLI(ST ? ST->getTargetLowering() : nullptr) {}
44
45 // Provide value semantics. MSVC requires that we spell all of these out.
46 ARMTTIImpl(const ARMTTIImpl &Arg)
47 : BaseT(static_cast(Arg)), ST(Arg.ST), TLI(Arg.TLI) {}
48 ARMTTIImpl(ARMTTIImpl &&Arg)
49 : BaseT(std::move(static_cast(Arg))), ST(std::move(Arg.ST)),
50 TLI(std::move(Arg.TLI)) {}
51 ARMTTIImpl &operator=(const ARMTTIImpl &RHS) {
52 BaseT::operator=(static_cast(RHS));
53 ST = RHS.ST;
54 TLI = RHS.TLI;
55 return *this;
56 }
57 ARMTTIImpl &operator=(ARMTTIImpl &&RHS) {
58 BaseT::operator=(std::move(static_cast(RHS)));
59 ST = std::move(RHS.ST);
60 TLI = std::move(RHS.TLI);
61 return *this;
62 }
63
64 /// \name Scalar TTI Implementations
65 /// @{
66
67 using BaseT::getIntImmCost;
68 unsigned getIntImmCost(const APInt &Imm, Type *Ty);
69
70 /// @}
71
72
73 /// \name Vector TTI Implementations
74 /// @{
75
76 unsigned getNumberOfRegisters(bool Vector) {
77 if (Vector) {
78 if (ST->hasNEON())
79 return 16;
80 return 0;
81 }
82
83 if (ST->isThumb1Only())
84 return 8;
85 return 13;
86 }
87
88 unsigned getRegisterBitWidth(bool Vector) {
89 if (Vector) {
90 if (ST->hasNEON())
91 return 128;
92 return 0;
93 }
94
95 return 32;
96 }
97
98 unsigned getMaxInterleaveFactor() {
99 // These are out of order CPUs:
100 if (ST->isCortexA15() || ST->isSwift())
101 return 2;
102 return 1;
103 }
104
105 unsigned getShuffleCost(TTI::ShuffleKind Kind, Type *Tp, int Index,
106 Type *SubTp);
107
108 unsigned getCastInstrCost(unsigned Opcode, Type *Dst, Type *Src);
109
110 unsigned getCmpSelInstrCost(unsigned Opcode, Type *ValTy, Type *CondTy);
111
112 unsigned getVectorInstrCost(unsigned Opcode, Type *Val, unsigned Index);
113
114 unsigned getAddressComputationCost(Type *Val, bool IsComplex);
115
116 unsigned getArithmeticInstrCost(
117 unsigned Opcode, Type *Ty,
118 TTI::OperandValueKind Op1Info = TTI::OK_AnyValue,
119 TTI::OperandValueKind Op2Info = TTI::OK_AnyValue,
120 TTI::OperandValueProperties Opd1PropInfo = TTI::OP_None,
121 TTI::OperandValueProperties Opd2PropInfo = TTI::OP_None);
122
123 unsigned getMemoryOpCost(unsigned Opcode, Type *Src, unsigned Alignment,
124 unsigned AddressSpace);
125
126 /// @}
127 };
128
129 } // end anonymous namespace
130
131 ImmutablePass *
132 llvm::createARMTargetTransformInfoPass(const ARMBaseTargetMachine *TM) {
133 return new TargetTransformInfoWrapperPass(ARMTTIImpl(TM));
134 }
13516
13617 unsigned ARMTTIImpl::getIntImmCost(const APInt &Imm, Type *Ty) {
13718 assert(Ty->isIntegerTy());
0 //===-- ARMTargetTransformInfo.h - ARM specific TTI -------------*- C++ -*-===//
1 //
2 // The LLVM Compiler Infrastructure
3 //
4 // This file is distributed under the University of Illinois Open Source
5 // License. See LICENSE.TXT for details.
6 //
7 //===----------------------------------------------------------------------===//
8 /// \file
9 /// This file a TargetTransformInfo::Concept conforming object specific to the
10 /// ARM target machine. It uses the target's detailed information to
11 /// provide more precise answers to certain TTI queries, while letting the
12 /// target independent and default TTI implementations handle the rest.
13 ///
14 //===----------------------------------------------------------------------===//
15
16 #ifndef LLVM_LIB_TARGET_ARM_ARMTARGETTRANSFORMINFO_H
17 #define LLVM_LIB_TARGET_ARM_ARMTARGETTRANSFORMINFO_H
18
19 #include "ARM.h"
20 #include "ARMTargetMachine.h"
21 #include "llvm/Analysis/TargetTransformInfo.h"
22 #include "llvm/CodeGen/BasicTTIImpl.h"
23 #include "llvm/Target/TargetLowering.h"
24
25 namespace llvm {
26
27 class ARMTTIImpl : public BasicTTIImplBase {
28 typedef BasicTTIImplBase BaseT;
29 typedef TargetTransformInfo TTI;
30
31 const ARMSubtarget *ST;
32 const ARMTargetLowering *TLI;
33
34 /// Estimate the overhead of scalarizing an instruction. Insert and Extract
35 /// are set if the result needs to be inserted and/or extracted from vectors.
36 unsigned getScalarizationOverhead(Type *Ty, bool Insert, bool Extract);
37
38 public:
39 explicit ARMTTIImpl(const ARMBaseTargetMachine *TM = nullptr)
40 : BaseT(TM), ST(TM ? TM->getSubtargetImpl() : nullptr),
41 TLI(ST ? ST->getTargetLowering() : nullptr) {}
42
43 // Provide value semantics. MSVC requires that we spell all of these out.
44 ARMTTIImpl(const ARMTTIImpl &Arg)
45 : BaseT(static_cast(Arg)), ST(Arg.ST), TLI(Arg.TLI) {}
46 ARMTTIImpl(ARMTTIImpl &&Arg)
47 : BaseT(std::move(static_cast(Arg))), ST(std::move(Arg.ST)),
48 TLI(std::move(Arg.TLI)) {}
49 ARMTTIImpl &operator=(const ARMTTIImpl &RHS) {
50 BaseT::operator=(static_cast(RHS));
51 ST = RHS.ST;
52 TLI = RHS.TLI;
53 return *this;
54 }
55 ARMTTIImpl &operator=(ARMTTIImpl &&RHS) {
56 BaseT::operator=(std::move(static_cast(RHS)));
57 ST = std::move(RHS.ST);
58 TLI = std::move(RHS.TLI);
59 return *this;
60 }
61
62 /// \name Scalar TTI Implementations
63 /// @{
64
65 using BaseT::getIntImmCost;
66 unsigned getIntImmCost(const APInt &Imm, Type *Ty);
67
68 /// @}
69
70 /// \name Vector TTI Implementations
71 /// @{
72
73 unsigned getNumberOfRegisters(bool Vector) {
74 if (Vector) {
75 if (ST->hasNEON())
76 return 16;
77 return 0;
78 }
79
80 if (ST->isThumb1Only())
81 return 8;
82 return 13;
83 }
84
85 unsigned getRegisterBitWidth(bool Vector) {
86 if (Vector) {
87 if (ST->hasNEON())
88 return 128;
89 return 0;
90 }
91
92 return 32;
93 }
94
95 unsigned getMaxInterleaveFactor() {
96 // These are out of order CPUs:
97 if (ST->isCortexA15() || ST->isSwift())
98 return 2;
99 return 1;
100 }
101
102 unsigned getShuffleCost(TTI::ShuffleKind Kind, Type *Tp, int Index,
103 Type *SubTp);
104
105 unsigned getCastInstrCost(unsigned Opcode, Type *Dst, Type *Src);
106
107 unsigned getCmpSelInstrCost(unsigned Opcode, Type *ValTy, Type *CondTy);
108
109 unsigned getVectorInstrCost(unsigned Opcode, Type *Val, unsigned Index);
110
111 unsigned getAddressComputationCost(Type *Val, bool IsComplex);
112
113 unsigned getArithmeticInstrCost(
114 unsigned Opcode, Type *Ty,
115 TTI::OperandValueKind Op1Info = TTI::OK_AnyValue,
116 TTI::OperandValueKind Op2Info = TTI::OK_AnyValue,
117 TTI::OperandValueProperties Opd1PropInfo = TTI::OP_None,
118 TTI::OperandValueProperties Opd2PropInfo = TTI::OP_None);
119
120 unsigned getMemoryOpCost(unsigned Opcode, Type *Src, unsigned Alignment,
121 unsigned AddressSpace);
122
123 /// @}
124 };
125
126 } // end namespace llvm
127
128 #endif
237237 addPass(createMipsOptimizePICCallPass(getMipsTargetMachine()));
238238 }
239239
240 void MipsTargetMachine::addAnalysisPasses(PassManagerBase &PM) {
240 TargetTransformInfo MipsTargetMachine::getTTI() {
241241 if (Subtarget->allowMixed16_32()) {
242 DEBUG(errs() << "No ");
242 DEBUG(errs() << "No Target Transform Info Pass Added\n");
243243 //FIXME: The Basic Target Transform Info
244244 // pass needs to become a function pass instead of
245245 // being an immutable pass and then this method as it exists now
246246 // would be unnecessary.
247 PM.add(createNoTargetTransformInfoPass(getDataLayout()));
248 } else
249 LLVMTargetMachine::addAnalysisPasses(PM);
247 return TargetTransformInfo(getDataLayout());
248 }
249
250250 DEBUG(errs() << "Target Transform Info Pass Added\n");
251 return LLVMTargetMachine::getTTI();
251252 }
252253
253254 // Implemented by targets that want to run passes immediately before
4343 CodeModel::Model CM, CodeGenOpt::Level OL, bool isLittle);
4444 ~MipsTargetMachine() override;
4545
46 void addAnalysisPasses(PassManagerBase &PM) override;
46 TargetTransformInfo getTTI() override;
4747
4848 const DataLayout *getDataLayout() const override { return &DL; }
4949 const MipsSubtarget *getSubtargetImpl() const override {
1616 #include "NVPTXAllocaHoisting.h"
1717 #include "NVPTXLowerAggrCopies.h"
1818 #include "NVPTXTargetObjectFile.h"
19 #include "NVPTXTargetTransformInfo.h"
1920 #include "llvm/Analysis/Passes.h"
2021 #include "llvm/CodeGen/AsmPrinter.h"
2122 #include "llvm/CodeGen/MachineFunctionAnalysis.h"
135136 return PassConfig;
136137 }
137138
138 void NVPTXTargetMachine::addAnalysisPasses(PassManagerBase &PM) {
139 PM.add(createNVPTXTargetTransformInfoPass(this));
139 TargetTransformInfo NVPTXTargetMachine::getTTI() {
140 return TargetTransformInfo(NVPTXTTIImpl(this));
140141 }
141142
142143 void NVPTXPassConfig::addIRPasses() {
5555 return TLOF.get();
5656 }
5757
58 /// \brief Register NVPTX analysis passes with a pass manager.
59 void addAnalysisPasses(PassManagerBase &PM) override;
58 TargetTransformInfo getTTI() override;
6059
6160 }; // NVPTXTargetMachine.
6261
None //===-- NVPTXTargetTransformInfo.cpp - NVPTX specific TTI pass ---------===//
0 //===-- NVPTXTargetTransformInfo.cpp - NVPTX specific TTI -----------------===//
11 //
22 // The LLVM Compiler Infrastructure
33 //
55 // License. See LICENSE.TXT for details.
66 //
77 //===----------------------------------------------------------------------===//
8 //
9 // \file
10 // This file implements a TargetTransformInfo analysis pass specific to the
11 // NVPTX target machine. It uses the target's detailed information to provide
12 // more precise answers to certain TTI queries, while letting the target
13 // independent and default TTI implementations handle the rest.
14 //
15 //===----------------------------------------------------------------------===//
168
17 #include "NVPTXTargetMachine.h"
9 #include "NVPTXTargetTransformInfo.h"
1810 #include "llvm/Analysis/LoopInfo.h"
1911 #include "llvm/Analysis/TargetTransformInfo.h"
2012 #include "llvm/Analysis/ValueTracking.h"
2517 using namespace llvm;
2618
2719 #define DEBUG_TYPE "NVPTXtti"
28
29 namespace {
30
31 class NVPTXTTIImpl : public BasicTTIImplBase {
32 typedef BasicTTIImplBase BaseT;
33 typedef TargetTransformInfo TTI;
34
35 const NVPTXTargetLowering *TLI;
36
37 public:
38 explicit NVPTXTTIImpl(const NVPTXTargetMachine *TM = nullptr)
39 : BaseT(TM),
40 TLI(TM ? TM->getSubtargetImpl()->getTargetLowering() : nullptr) {}
41
42 // Provide value semantics. MSVC requires that we spell all of these out.
43 NVPTXTTIImpl(const NVPTXTTIImpl &Arg)
44 : BaseT(static_cast(Arg)), TLI(Arg.TLI) {}
45 NVPTXTTIImpl(NVPTXTTIImpl &&Arg)
46 : BaseT(std::move(static_cast(Arg))), TLI(std::move(Arg.TLI)) {}
47 NVPTXTTIImpl &operator=(const NVPTXTTIImpl &RHS) {
48 BaseT::operator=(static_cast(RHS));
49 TLI = RHS.TLI;
50 return *this;
51 }
52 NVPTXTTIImpl &operator=(NVPTXTTIImpl &&RHS) {
53 BaseT::operator=(std::move(static_cast(RHS)));
54 TLI = std::move(RHS.TLI);
55 return *this;
56 }
57
58 bool hasBranchDivergence() { return true; }
59
60 unsigned getArithmeticInstrCost(
61 unsigned Opcode, Type *Ty,
62 TTI::OperandValueKind Opd1Info = TTI::OK_AnyValue,
63 TTI::OperandValueKind Opd2Info = TTI::OK_AnyValue,
64 TTI::OperandValueProperties Opd1PropInfo = TTI::OP_None,
65 TTI::OperandValueProperties Opd2PropInfo = TTI::OP_None);
66 };
67
68 } // end anonymous namespace
69
70 ImmutablePass *
71 llvm::createNVPTXTargetTransformInfoPass(const NVPTXTargetMachine *TM) {
72 return new TargetTransformInfoWrapperPass(NVPTXTTIImpl(TM));
73 }
7420
7521 unsigned NVPTXTTIImpl::getArithmeticInstrCost(
7622 unsigned Opcode, Type *Ty, TTI::OperandValueKind Opd1Info,
0 //===-- NVPTXTargetTransformInfo.h - NVPTX specific TTI ---------*- C++ -*-===//
1 //
2 // The LLVM Compiler Infrastructure
3 //
4 // This file is distributed under the University of Illinois Open Source
5 // License. See LICENSE.TXT for details.
6 //
7 //===----------------------------------------------------------------------===//
8 /// \file
9 /// This file a TargetTransformInfo::Concept conforming object specific to the
10 /// NVPTX target machine. It uses the target's detailed information to
11 /// provide more precise answers to certain TTI queries, while letting the
12 /// target independent and default TTI implementations handle the rest.
13 ///
14 //===----------------------------------------------------------------------===//
15
16 #ifndef LLVM_LIB_TARGET_NVPTX_NVPTXTARGETTRANSFORMINFO_H
17 #define LLVM_LIB_TARGET_NVPTX_NVPTXTARGETTRANSFORMINFO_H
18
19 #include "NVPTX.h"
20 #include "NVPTXTargetMachine.h"
21 #include "llvm/Analysis/TargetTransformInfo.h"
22 #include "llvm/CodeGen/BasicTTIImpl.h"
23 #include "llvm/Target/TargetLowering.h"
24
25 namespace llvm {
26
27 class NVPTXTTIImpl : public BasicTTIImplBase {
28 typedef BasicTTIImplBase BaseT;
29 typedef TargetTransformInfo TTI;
30
31 const NVPTXTargetLowering *TLI;
32
33 public:
34 explicit NVPTXTTIImpl(const NVPTXTargetMachine *TM = nullptr)
35 : BaseT(TM),
36 TLI(TM ? TM->getSubtargetImpl()->getTargetLowering() : nullptr) {}
37
38 // Provide value semantics. MSVC requires that we spell all of these out.
39 NVPTXTTIImpl(const NVPTXTTIImpl &Arg)
40 : BaseT(static_cast(Arg)), TLI(Arg.TLI) {}
41 NVPTXTTIImpl(NVPTXTTIImpl &&Arg)
42 : BaseT(std::move(static_cast(Arg))), TLI(std::move(Arg.TLI)) {}
43 NVPTXTTIImpl &operator=(const NVPTXTTIImpl &RHS) {
44 BaseT::operator=(static_cast(RHS));
45 TLI = RHS.TLI;
46 return *this;
47 }
48 NVPTXTTIImpl &operator=(NVPTXTTIImpl &&RHS) {
49 BaseT::operator=(std::move(static_cast(RHS)));
50 TLI = std::move(RHS.TLI);
51 return *this;
52 }
53
54 bool hasBranchDivergence() { return true; }
55
56 unsigned getArithmeticInstrCost(
57 unsigned Opcode, Type *Ty,
58 TTI::OperandValueKind Opd1Info = TTI::OK_AnyValue,
59 TTI::OperandValueKind Opd2Info = TTI::OK_AnyValue,
60 TTI::OperandValueProperties Opd1PropInfo = TTI::OP_None,
61 TTI::OperandValueProperties Opd2PropInfo = TTI::OP_None);
62 };
63
64 } // end namespace llvm
65
66 #endif
1313 #include "PPCTargetMachine.h"
1414 #include "PPC.h"
1515 #include "PPCTargetObjectFile.h"
16 #include "PPCTargetTransformInfo.h"
1617 #include "llvm/CodeGen/Passes.h"
1718 #include "llvm/IR/Function.h"
1819 #include "llvm/MC/MCStreamer.h"
273274 addPass(createPPCBranchSelectionPass(), false);
274275 }
275276
276 void PPCTargetMachine::addAnalysisPasses(PassManagerBase &PM) {
277 PM.add(createPPCTargetTransformInfoPass(this));
278 }
277 TargetTransformInfo PPCTargetMachine::getTTI() {
278 return TargetTransformInfo(PPCTTIImpl(this));
279 }
4444 // Pass Pipeline Configuration
4545 TargetPassConfig *createPassConfig(PassManagerBase &PM) override;
4646
47 /// \brief Register PPC analysis passes with a pass manager.
48 void addAnalysisPasses(PassManagerBase &PM) override;
47 TargetTransformInfo getTTI() override;
48
4949 TargetLoweringObjectFile *getObjFileLowering() const override {
5050 return TLOF.get();
5151 }
None //===-- PPCTargetTransformInfo.cpp - PPC specific TTI pass ----------------===//
0 //===-- PPCTargetTransformInfo.cpp - PPC specific TTI ---------------------===//
11 //
22 // The LLVM Compiler Infrastructure
33 //
55 // License. See LICENSE.TXT for details.
66 //
77 //===----------------------------------------------------------------------===//
8 /// \file
9 /// This file implements a TargetTransformInfo analysis pass specific to the
10 /// PPC target machine. It uses the target's detailed information to provide
11 /// more precise answers to certain TTI queries, while letting the target
12 /// independent and default TTI implementations handle the rest.
13 ///
14 //===----------------------------------------------------------------------===//
15
16 #include "PPC.h"
17 #include "PPCTargetMachine.h"
8
9 #include "PPCTargetTransformInfo.h"
1810 #include "llvm/Analysis/TargetTransformInfo.h"
1911 #include "llvm/CodeGen/BasicTTIImpl.h"
2012 #include "llvm/Support/CommandLine.h"
2719
2820 static cl::opt DisablePPCConstHoist("disable-ppc-constant-hoisting",
2921 cl::desc("disable constant hoisting on PPC"), cl::init(false), cl::Hidden);
30
31 namespace {
32
33 class PPCTTIImpl : public BasicTTIImplBase {
34 typedef BasicTTIImplBase BaseT;
35 typedef TargetTransformInfo TTI;
36
37 const PPCSubtarget *ST;
38 const PPCTargetLowering *TLI;
39
40 public:
41 explicit PPCTTIImpl(const PPCTargetMachine *TM = nullptr)
42 : BaseT(TM), ST(TM->getSubtargetImpl()), TLI(ST->getTargetLowering()) {}
43
44 // Provide value semantics. MSVC requires that we spell all of these out.
45 PPCTTIImpl(const PPCTTIImpl &Arg)
46 : BaseT(static_cast(Arg)), ST(Arg.ST), TLI(Arg.TLI) {}
47 PPCTTIImpl(PPCTTIImpl &&Arg)
48 : BaseT(std::move(static_cast(Arg))), ST(std::move(Arg.ST)),
49 TLI(std::move(Arg.TLI)) {}
50 PPCTTIImpl &operator=(const PPCTTIImpl &RHS) {
51 BaseT::operator=(static_cast(RHS));
52 ST = RHS.ST;
53 TLI = RHS.TLI;
54 return *this;
55 }
56 PPCTTIImpl &operator=(PPCTTIImpl &&RHS) {
57 BaseT::operator=(std::move(static_cast(RHS)));
58 ST = std::move(RHS.ST);
59 TLI = std::move(RHS.TLI);
60 return *this;
61 }
62
63 /// \name Scalar TTI Implementations
64 /// @{
65
66 using BaseT::getIntImmCost;
67 unsigned getIntImmCost(const APInt &Imm, Type *Ty);
68
69 unsigned getIntImmCost(unsigned Opcode, unsigned Idx, const APInt &Imm,
70 Type *Ty);
71 unsigned getIntImmCost(Intrinsic::ID IID, unsigned Idx, const APInt &Imm,
72 Type *Ty);
73
74 TTI::PopcntSupportKind getPopcntSupport(unsigned TyWidth);
75 void getUnrollingPreferences(const Function *F, Loop *L,
76 TTI::UnrollingPreferences &UP);
77
78 /// @}
79
80 /// \name Vector TTI Implementations
81 /// @{
82
83 unsigned getNumberOfRegisters(bool Vector);
84 unsigned getRegisterBitWidth(bool Vector);
85 unsigned getMaxInterleaveFactor();
86 unsigned getArithmeticInstrCost(
87 unsigned Opcode, Type *Ty,
88 TTI::OperandValueKind Opd1Info = TTI::OK_AnyValue,
89 TTI::OperandValueKind Opd2Info = TTI::OK_AnyValue,
90 TTI::OperandValueProperties Opd1PropInfo = TTI::OP_None,
91 TTI::OperandValueProperties Opd2PropInfo = TTI::OP_None);
92 unsigned getShuffleCost(TTI::ShuffleKind Kind, Type *Tp, int Index,
93 Type *SubTp);
94 unsigned getCastInstrCost(unsigned Opcode, Type *Dst, Type *Src);
95 unsigned getCmpSelInstrCost(unsigned Opcode, Type *ValTy, Type *CondTy);
96 unsigned getVectorInstrCost(unsigned Opcode, Type *Val, unsigned Index);
97 unsigned getMemoryOpCost(unsigned Opcode, Type *Src, unsigned Alignment,
98 unsigned AddressSpace);
99
100 /// @}
101 };
102
103 } // end anonymous namespace
104
105 ImmutablePass *
106 llvm::createPPCTargetTransformInfoPass(const PPCTargetMachine *TM) {
107 return new TargetTransformInfoWrapperPass(PPCTTIImpl(TM));
108 }
109
11022
11123 //===----------------------------------------------------------------------===//
11224 //
0 //===-- PPCTargetTransformInfo.h - PPC specific TTI -------------*- C++ -*-===//
1 //
2 // The LLVM Compiler Infrastructure
3 //
4 // This file is distributed under the University of Illinois Open Source
5 // License. See LICENSE.TXT for details.
6 //
7 //===----------------------------------------------------------------------===//
8 /// \file
9 /// This file a TargetTransformInfo::Concept conforming object specific to the
10 /// PPC target machine. It uses the target's detailed information to
11 /// provide more precise answers to certain TTI queries, while letting the
12 /// target independent and default TTI implementations handle the rest.
13 ///
14 //===----------------------------------------------------------------------===//
15
16 #ifndef LLVM_LIB_TARGET_POWERPC_PPCTARGETTRANSFORMINFO_H
17 #define LLVM_LIB_TARGET_POWERPC_PPCTARGETTRANSFORMINFO_H
18
19 #include "PPC.h"
20 #include "PPCTargetMachine.h"
21 #include "llvm/Analysis/TargetTransformInfo.h"
22 #include "llvm/CodeGen/BasicTTIImpl.h"
23 #include "llvm/Target/TargetLowering.h"
24
25 namespace llvm {
26
27 class PPCTTIImpl : public BasicTTIImplBase {
28 typedef BasicTTIImplBase BaseT;
29 typedef TargetTransformInfo TTI;
30
31 const PPCSubtarget *ST;
32 const PPCTargetLowering *TLI;
33
34 public:
35 explicit PPCTTIImpl(const PPCTargetMachine *TM = nullptr)
36 : BaseT(TM), ST(TM->getSubtargetImpl()), TLI(ST->getTargetLowering()) {}
37
38 // Provide value semantics. MSVC requires that we spell all of these out.
39 PPCTTIImpl(const PPCTTIImpl &Arg)
40 : BaseT(static_cast(Arg)), ST(Arg.ST), TLI(Arg.TLI) {}
41 PPCTTIImpl(PPCTTIImpl &&Arg)
42 : BaseT(std::move(static_cast(Arg))), ST(std::move(Arg.ST)),
43 TLI(std::move(Arg.TLI)) {}
44 PPCTTIImpl &operator=(const PPCTTIImpl &RHS) {
45 BaseT::operator=(static_cast(RHS));
46 ST = RHS.ST;
47 TLI = RHS.TLI;
48 return *this;
49 }
50 PPCTTIImpl &operator=(PPCTTIImpl &&RHS) {
51 BaseT::operator=(std::move(static_cast(RHS)));
52 ST = std::move(RHS.ST);
53 TLI = std::move(RHS.TLI);
54 return *this;
55 }
56
57 /// \name Scalar TTI Implementations
58 /// @{
59
60 using BaseT::getIntImmCost;
61 unsigned getIntImmCost(const APInt &Imm, Type *Ty);
62
63 unsigned getIntImmCost(unsigned Opcode, unsigned Idx, const APInt &Imm,
64 Type *Ty);
65 unsigned getIntImmCost(Intrinsic::ID IID, unsigned Idx, const APInt &Imm,
66 Type *Ty);
67
68 TTI::PopcntSupportKind getPopcntSupport(unsigned TyWidth);
69 void getUnrollingPreferences(const Function *F, Loop *L,
70 TTI::UnrollingPreferences &UP);
71
72 /// @}
73
74 /// \name Vector TTI Implementations
75 /// @{
76
77 unsigned getNumberOfRegisters(bool Vector);
78 unsigned getRegisterBitWidth(bool Vector);
79 unsigned getMaxInterleaveFactor();
80 unsigned getArithmeticInstrCost(
81 unsigned Opcode, Type *Ty,
82 TTI::OperandValueKind Opd1Info = TTI::OK_AnyValue,
83 TTI::OperandValueKind Opd2Info = TTI::OK_AnyValue,
84 TTI::OperandValueProperties Opd1PropInfo = TTI::OP_None,
85 TTI::OperandValueProperties Opd2PropInfo = TTI::OP_None);
86 unsigned getShuffleCost(TTI::ShuffleKind Kind, Type *Tp, int Index,
87 Type *SubTp);
88 unsigned getCastInstrCost(unsigned Opcode, Type *Dst, Type *Src);
89 unsigned getCmpSelInstrCost(unsigned Opcode, Type *ValTy, Type *CondTy);
90 unsigned getVectorInstrCost(unsigned Opcode, Type *Val, unsigned Index);
91 unsigned getMemoryOpCost(unsigned Opcode, Type *Src, unsigned Alignment,
92 unsigned AddressSpace);
93
94 /// @}
95 };
96
97 } // end namespace llvm
98
99 #endif
1414
1515 #include "AMDGPUTargetMachine.h"
1616 #include "AMDGPU.h"
17 #include "AMDGPUTargetTransformInfo.h"
1718 #include "R600ISelLowering.h"
1819 #include "R600InstrInfo.h"
1920 #include "R600MachineScheduler.h"
115116 }
116117
117118 //===----------------------------------------------------------------------===//
118 // AMDGPU Analysis Pass Setup
119 //===----------------------------------------------------------------------===//
120
121 void AMDGPUTargetMachine::addAnalysisPasses(PassManagerBase &PM) {
122 PM.add(createAMDGPUTargetTransformInfoPass(this));
119 // AMDGPU Pass Setup
120 //===----------------------------------------------------------------------===//
121
122 TargetTransformInfo AMDGPUTargetMachine::getTTI() {
123 return TargetTransformInfo(AMDGPUTTIImpl(this));
123124 }
124125
125126 void AMDGPUPassConfig::addIRPasses() {
5454 }
5555 TargetPassConfig *createPassConfig(PassManagerBase &PM) override;
5656
57 /// \brief Register R600 analysis passes with a pass manager.
58 void addAnalysisPasses(PassManagerBase &PM) override;
57 TargetTransformInfo getTTI() override;
58
5959 TargetLoweringObjectFile *getObjFileLowering() const override {
6060 return TLOF;
6161 }
1414 //
1515 //===----------------------------------------------------------------------===//
1616
17 #include "AMDGPU.h"
18 #include "AMDGPUTargetMachine.h"
17 #include "AMDGPUTargetTransformInfo.h"
1918 #include "llvm/Analysis/LoopInfo.h"
2019 #include "llvm/Analysis/TargetTransformInfo.h"
2120 #include "llvm/Analysis/ValueTracking.h"
2625 using namespace llvm;
2726
2827 #define DEBUG_TYPE "AMDGPUtti"
29
30 namespace {
31
32 class AMDGPUTTIImpl : public BasicTTIImplBase {
33 typedef BasicTTIImplBase BaseT;
34 typedef TargetTransformInfo TTI;
35
36 const AMDGPUSubtarget *ST;
37
38 public:
39 explicit AMDGPUTTIImpl(const AMDGPUTargetMachine *TM = nullptr)
40 : BaseT(TM), ST(TM->getSubtargetImpl()) {}
41
42 // Provide value semantics. MSVC requires that we spell all of these out.
43 AMDGPUTTIImpl(const AMDGPUTTIImpl &Arg)
44 : BaseT(static_cast(Arg)), ST(Arg.ST) {}
45 AMDGPUTTIImpl(AMDGPUTTIImpl &&Arg)
46 : BaseT(std::move(static_cast(Arg))), ST(std::move(Arg.ST)) {}
47 AMDGPUTTIImpl &operator=(const AMDGPUTTIImpl &RHS) {
48 BaseT::operator=(static_cast(RHS));
49 ST = RHS.ST;
50 return *this;
51 }
52 AMDGPUTTIImpl &operator=(AMDGPUTTIImpl &&RHS) {
53 BaseT::operator=(std::move(static_cast(RHS)));
54 ST = std::move(RHS.ST);
55 return *this;
56 }
57
58 bool hasBranchDivergence() { return true; }
59
60 void getUnrollingPreferences(const Function *F, Loop *L,
61 TTI::UnrollingPreferences &UP);
62
63 TTI::PopcntSupportKind getPopcntSupport(unsigned TyWidth) {
64 assert(isPowerOf2_32(TyWidth) && "Ty width must be power of 2");
65 return ST->hasBCNT(TyWidth) ? TTI::PSK_FastHardware : TTI::PSK_Software;
66 }
67
68 unsigned getNumberOfRegisters(bool Vector);
69 unsigned getRegisterBitWidth(bool Vector);
70 unsigned getMaxInterleaveFactor();
71 };
72
73 } // end anonymous namespace
74
75 ImmutablePass *
76 llvm::createAMDGPUTargetTransformInfoPass(const AMDGPUTargetMachine *TM) {
77 return new TargetTransformInfoWrapperPass(AMDGPUTTIImpl(TM));
78 }
7928
8029 void AMDGPUTTIImpl::getUnrollingPreferences(const Function *, Loop *L,
8130 TTI::UnrollingPreferences &UP) {
0 //===-- AMDGPUTargetTransformInfo.h - AMDGPU specific TTI -------*- C++ -*-===//
1 //
2 // The LLVM Compiler Infrastructure
3 //
4 // This file is distributed under the University of Illinois Open Source
5 // License. See LICENSE.TXT for details.
6 //
7 //===----------------------------------------------------------------------===//
8 /// \file
9 /// This file a TargetTransformInfo::Concept conforming object specific to the
10 /// AMDGPU target machine. It uses the target's detailed information to
11 /// provide more precise answers to certain TTI queries, while letting the
12 /// target independent and default TTI implementations handle the rest.
13 ///
14 //===----------------------------------------------------------------------===//
15
16 #ifndef LLVM_LIB_TARGET_R600_AMDGPUTARGETTRANSFORMINFO_H
17 #define LLVM_LIB_TARGET_R600_AMDGPUTARGETTRANSFORMINFO_H
18
19 #include "AMDGPU.h"
20 #include "AMDGPUTargetMachine.h"
21 #include "llvm/Analysis/TargetTransformInfo.h"
22 #include "llvm/CodeGen/BasicTTIImpl.h"
23 #include "llvm/Target/TargetLowering.h"
24
25 namespace llvm {
26
27 class AMDGPUTTIImpl : public BasicTTIImplBase {
28 typedef BasicTTIImplBase BaseT;
29 typedef TargetTransformInfo TTI;
30
31 const AMDGPUSubtarget *ST;
32
33 public:
34 explicit AMDGPUTTIImpl(const AMDGPUTargetMachine *TM = nullptr)
35 : BaseT(TM), ST(TM->getSubtargetImpl()) {}
36
37 // Provide value semantics. MSVC requires that we spell all of these out.
38 AMDGPUTTIImpl(const AMDGPUTTIImpl &Arg)
39 : BaseT(static_cast(Arg)), ST(Arg.ST) {}
40 AMDGPUTTIImpl(AMDGPUTTIImpl &&Arg)
41 : BaseT(std::move(static_cast(Arg))), ST(std::move(Arg.ST)) {}
42 AMDGPUTTIImpl &operator=(const AMDGPUTTIImpl &RHS) {
43 BaseT::operator=(static_cast(RHS));
44 ST = RHS.ST;
45 return *this;
46 }
47 AMDGPUTTIImpl &operator=(AMDGPUTTIImpl &&RHS) {
48 BaseT::operator=(std::move(static_cast(RHS)));
49 ST = std::move(RHS.ST);
50 return *this;
51 }
52
53 bool hasBranchDivergence() { return true; }
54
55 void getUnrollingPreferences(const Function *F, Loop *L,
56 TTI::UnrollingPreferences &UP);
57
58 TTI::PopcntSupportKind getPopcntSupport(unsigned TyWidth) {
59 assert(isPowerOf2_32(TyWidth) && "Ty width must be power of 2");
60 return ST->hasBCNT(TyWidth) ? TTI::PSK_FastHardware : TTI::PSK_Software;
61 }
62
63 unsigned getNumberOfRegisters(bool Vector);
64 unsigned getRegisterBitWidth(bool Vector);
65 unsigned getMaxInterleaveFactor();
66 };
67
68 } // end namespace llvm
69
70 #endif
171171 Options.DataSections = V;
172172 }
173173
174 void TargetMachine::addAnalysisPasses(PassManagerBase &PM) {
175 PM.add(createNoTargetTransformInfoPass(getDataLayout()));
174 TargetTransformInfo TargetMachine::getTTI() {
175 return TargetTransformInfo(getDataLayout());
176176 }
177177
178178 static bool canUsePrivateLabel(const MCAsmInfo &AsmInfo,
1313 #include "llvm-c/TargetMachine.h"
1414 #include "llvm-c/Core.h"
1515 #include "llvm-c/Target.h"
16 #include "llvm/Analysis/TargetTransformInfo.h"
1617 #include "llvm/IR/DataLayout.h"
1718 #include "llvm/IR/Module.h"
1819 #include "llvm/PassManager.h"
254255 }
255256
256257 void LLVMAddAnalysisPasses(LLVMTargetMachineRef T, LLVMPassManagerRef PM) {
257 unwrap(T)->addAnalysisPasses(*unwrap(PM));
258 }
258 unwrap(PM)->add(createTargetTransformInfoWrapperPass(unwrap(T)->getTTI()));
259 }
1313 #include "X86TargetMachine.h"
1414 #include "X86.h"
1515 #include "X86TargetObjectFile.h"
16 #include "X86TargetTransformInfo.h"
1617 #include "llvm/CodeGen/Passes.h"
1718 #include "llvm/IR/Function.h"
1819 #include "llvm/PassManager.h"
160161 cl::init(true));
161162
162163 //===----------------------------------------------------------------------===//
163 // X86 Analysis Pass Setup
164 //===----------------------------------------------------------------------===//
165
166 void X86TargetMachine::addAnalysisPasses(PassManagerBase &PM) {
167 PM.add(createX86TargetTransformInfoPass(this));
164 // X86 TTI query.
165 //===----------------------------------------------------------------------===//
166
167 TargetTransformInfo X86TargetMachine::getTTI() {
168 return TargetTransformInfo(X86TTIImpl(this));
168169 }
169170
170171
3838 const X86Subtarget *getSubtargetImpl() const override { return &Subtarget; }
3939 const X86Subtarget *getSubtargetImpl(const Function &F) const override;
4040
41 /// \brief Register X86 analysis passes with a pass manager.
42 void addAnalysisPasses(PassManagerBase &PM) override;
41 TargetTransformInfo getTTI() override;
4342
4443 // Set up the pass pipeline.
4544 TargetPassConfig *createPassConfig(PassManagerBase &PM) override;
1313 ///
1414 //===----------------------------------------------------------------------===//
1515
16 #include "X86.h"
17 #include "X86TargetMachine.h"
16 #include "X86TargetTransformInfo.h"
1817 #include "llvm/Analysis/TargetTransformInfo.h"
1918 #include "llvm/CodeGen/BasicTTIImpl.h"
2019 #include "llvm/IR/IntrinsicInst.h"
2423 using namespace llvm;
2524
2625 #define DEBUG_TYPE "x86tti"
27
28 namespace {
29
30 class X86TTIImpl : public BasicTTIImplBase {
31 typedef BasicTTIImplBase BaseT;
32 typedef TargetTransformInfo TTI;
33
34 const X86Subtarget *ST;
35 const X86TargetLowering *TLI;
36
37 unsigned getScalarizationOverhead(Type *Ty, bool Insert, bool Extract);
38
39 public:
40 explicit X86TTIImpl(const X86TargetMachine *TM = nullptr)
41 : BaseT(TM), ST(TM ? TM->getSubtargetImpl() : nullptr),
42 TLI(ST ? ST->getTargetLowering() : nullptr) {}
43
44 // Provide value semantics. MSVC requires that we spell all of these out.
45 X86TTIImpl(const X86TTIImpl &Arg)
46 : BaseT(static_cast(Arg)), ST(Arg.ST), TLI(Arg.TLI) {}
47 X86TTIImpl(X86TTIImpl &&Arg)
48 : BaseT(std::move(static_cast(Arg))), ST(std::move(Arg.ST)),
49 TLI(std::move(Arg.TLI)) {}
50 X86TTIImpl &operator=(const X86TTIImpl &RHS) {
51 BaseT::operator=(static_cast(RHS));
52 ST = RHS.ST;
53 TLI = RHS.TLI;
54 return *this;
55 }
56 X86TTIImpl &operator=(X86TTIImpl &&RHS) {
57 BaseT::operator=(std::move(static_cast(RHS)));
58 ST = std::move(RHS.ST);
59 TLI = std::move(RHS.TLI);
60 return *this;
61 }
62
63 /// \name Scalar TTI Implementations
64 /// @{
65 TTI::PopcntSupportKind getPopcntSupport(unsigned TyWidth);
66
67 /// @}
68
69 /// \name Vector TTI Implementations
70 /// @{
71
72 unsigned getNumberOfRegisters(bool Vector);
73 unsigned getRegisterBitWidth(bool Vector);
74 unsigned getMaxInterleaveFactor();
75 unsigned getArithmeticInstrCost(
76 unsigned Opcode, Type *Ty,
77 TTI::OperandValueKind Opd1Info = TTI::OK_AnyValue,
78 TTI::OperandValueKind Opd2Info = TTI::OK_AnyValue,
79 TTI::OperandValueProperties Opd1PropInfo = TTI::OP_None,
80 TTI::OperandValueProperties Opd2PropInfo = TTI::OP_None);
81 unsigned getShuffleCost(TTI::ShuffleKind Kind, Type *Tp, int Index,
82 Type *SubTp);
83 unsigned getCastInstrCost(unsigned Opcode, Type *Dst, Type *Src);
84 unsigned getCmpSelInstrCost(unsigned Opcode, Type *ValTy, Type *CondTy);
85 unsigned getVectorInstrCost(unsigned Opcode, Type *Val, unsigned Index);
86 unsigned getMemoryOpCost(unsigned Opcode, Type *Src, unsigned Alignment,
87 unsigned AddressSpace);
88 unsigned getMaskedMemoryOpCost(unsigned Opcode, Type *Src, unsigned Alignment,
89 unsigned AddressSpace);
90
91 unsigned getAddressComputationCost(Type *PtrTy, bool IsComplex);
92
93 unsigned getReductionCost(unsigned Opcode, Type *Ty, bool IsPairwiseForm);
94
95 unsigned getIntImmCost(int64_t);
96
97 unsigned getIntImmCost(const APInt &Imm, Type *Ty);
98
99 unsigned getIntImmCost(unsigned Opcode, unsigned Idx, const APInt &Imm,
100 Type *Ty);
101 unsigned getIntImmCost(Intrinsic::ID IID, unsigned Idx, const APInt &Imm,
102 Type *Ty);
103 bool isLegalMaskedLoad(Type *DataType, int Consecutive);
104 bool isLegalMaskedStore(Type *DataType, int Consecutive);
105
106 /// @}
107 };
108
109 } // end anonymous namespace
110
111 ImmutablePass *
112 llvm::createX86TargetTransformInfoPass(const X86TargetMachine *TM) {
113 return new TargetTransformInfoWrapperPass(X86TTIImpl(TM));
114 }
115
11626
11727 //===----------------------------------------------------------------------===//
11828 //
0 //===-- X86TargetTransformInfo.h - X86 specific TTI -------------*- C++ -*-===//
1 //
2 // The LLVM Compiler Infrastructure
3 //
4 // This file is distributed under the University of Illinois Open Source
5 // License. See LICENSE.TXT for details.
6 //
7 //===----------------------------------------------------------------------===//
8 /// \file
9 /// This file a TargetTransformInfo::Concept conforming object specific to the
10 /// X86 target machine. It uses the target's detailed information to
11 /// provide more precise answers to certain TTI queries, while letting the
12 /// target independent and default TTI implementations handle the rest.
13 ///
14 //===----------------------------------------------------------------------===//
15
16 #ifndef LLVM_LIB_TARGET_X86_X86TARGETTRANSFORMINFO_H
17 #define LLVM_LIB_TARGET_X86_X86TARGETTRANSFORMINFO_H
18
19 #include "X86.h"
20 #include "X86TargetMachine.h"
21 #include "llvm/Analysis/TargetTransformInfo.h"
22 #include "llvm/CodeGen/BasicTTIImpl.h"
23 #include "llvm/Target/TargetLowering.h"
24
25 namespace llvm {
26
27 class X86TTIImpl : public BasicTTIImplBase {
28 typedef BasicTTIImplBase BaseT;
29 typedef TargetTransformInfo TTI;
30
31 const X86Subtarget *ST;
32 const X86TargetLowering *TLI;
33
34 unsigned getScalarizationOverhead(Type *Ty, bool Insert, bool Extract);
35
36 public:
37 explicit X86TTIImpl(const X86TargetMachine *TM = nullptr)
38 : BaseT(TM), ST(TM ? TM->getSubtargetImpl() : nullptr),
39 TLI(ST ? ST->getTargetLowering() : nullptr) {}
40
41 // Provide value semantics. MSVC requires that we spell all of these out.
42 X86TTIImpl(const X86TTIImpl &Arg)
43 : BaseT(static_cast(Arg)), ST(Arg.ST), TLI(Arg.TLI) {}
44 X86TTIImpl(X86TTIImpl &&Arg)
45 : BaseT(std::move(static_cast(Arg))), ST(std::move(Arg.ST)),
46 TLI(std::move(Arg.TLI)) {}
47 X86TTIImpl &operator=(const X86TTIImpl &RHS) {
48 BaseT::operator=(static_cast(RHS));
49 ST = RHS.ST;
50 TLI = RHS.TLI;
51 return *this;
52 }
53 X86TTIImpl &operator=(X86TTIImpl &&RHS) {
54 BaseT::operator=(std::move(static_cast(RHS)));
55 ST = std::move(RHS.ST);
56 TLI = std::move(RHS.TLI);
57 return *this;
58 }
59
60 /// \name Scalar TTI Implementations
61 /// @{
62 TTI::PopcntSupportKind getPopcntSupport(unsigned TyWidth);
63
64 /// @}
65
66 /// \name Vector TTI Implementations
67 /// @{
68
69 unsigned getNumberOfRegisters(bool Vector);
70 unsigned getRegisterBitWidth(bool Vector);
71 unsigned getMaxInterleaveFactor();
72 unsigned getArithmeticInstrCost(
73 unsigned Opcode, Type *Ty,
74 TTI::OperandValueKind Opd1Info = TTI::OK_AnyValue,
75 TTI::OperandValueKind Opd2Info = TTI::OK_AnyValue,
76 TTI::OperandValueProperties Opd1PropInfo = TTI::OP_None,
77 TTI::OperandValueProperties Opd2PropInfo = TTI::OP_None);
78 unsigned getShuffleCost(TTI::ShuffleKind Kind, Type *Tp, int Index,
79 Type *SubTp);
80 unsigned getCastInstrCost(unsigned Opcode, Type *Dst, Type *Src);
81 unsigned getCmpSelInstrCost(unsigned Opcode, Type *ValTy, Type *CondTy);
82 unsigned getVectorInstrCost(unsigned Opcode, Type *Val, unsigned Index);
83 unsigned getMemoryOpCost(unsigned Opcode, Type *Src, unsigned Alignment,
84 unsigned AddressSpace);
85 unsigned getMaskedMemoryOpCost(unsigned Opcode, Type *Src, unsigned Alignment,
86 unsigned AddressSpace);
87
88 unsigned getAddressComputationCost(Type *PtrTy, bool IsComplex);
89
90 unsigned getReductionCost(unsigned Opcode, Type *Ty, bool IsPairwiseForm);
91
92 unsigned getIntImmCost(int64_t);
93
94 unsigned getIntImmCost(const APInt &Imm, Type *Ty);
95
96 unsigned getIntImmCost(unsigned Opcode, unsigned Idx, const APInt &Imm,
97 Type *Ty);
98 unsigned getIntImmCost(Intrinsic::ID IID, unsigned Idx, const APInt &Imm,
99 Type *Ty);
100 bool isLegalMaskedLoad(Type *DataType, int Consecutive);
101 bool isLegalMaskedStore(Type *DataType, int Consecutive);
102
103 /// @}
104 };
105 ;
106
107 } // end namespace llvm
108
109 #endif
2121 XCoreSubtarget.cpp
2222 XCoreTargetMachine.cpp
2323 XCoreTargetObjectFile.cpp
24 XCoreTargetTransformInfo.cpp
2524 XCoreSelectionDAGInfo.cpp
2625 XCoreFrameToArgsOffsetElim.cpp
2726 )
1111
1212 #include "XCoreTargetMachine.h"
1313 #include "XCoreTargetObjectFile.h"
14 #include "XCoreTargetTransformInfo.h"
1415 #include "XCore.h"
1516 #include "llvm/CodeGen/Passes.h"
1617 #include "llvm/IR/Module.h"
8182 RegisterTargetMachine X(TheXCoreTarget);
8283 }
8384
84 void XCoreTargetMachine::addAnalysisPasses(PassManagerBase &PM) {
85 PM.add(createXCoreTargetTransformInfoPass(this));
85 TargetTransformInfo XCoreTargetMachine::getTTI() {
86 return TargetTransformInfo(XCoreTTIImpl(this));
8687 }
3535 // Pass Pipeline Configuration
3636 TargetPassConfig *createPassConfig(PassManagerBase &PM) override;
3737
38 void addAnalysisPasses(PassManagerBase &PM) override;
38 TargetTransformInfo getTTI() override;
3939 TargetLoweringObjectFile *getObjFileLowering() const override {
4040 return TLOF.get();
4141 }
+0
-64
lib/Target/XCore/XCoreTargetTransformInfo.cpp less more
None //===-- XCoreTargetTransformInfo.cpp - XCore specific TTI pass ----------------===//
1 //
2 // The LLVM Compiler Infrastructure
3 //
4 // This file is distributed under the University of Illinois Open Source
5 // License. See LICENSE.TXT for details.
6 //
7 //===----------------------------------------------------------------------===//
8 /// \file
9 /// This file implements a TargetTransformInfo analysis pass specific to the
10 /// XCore target machine. It uses the target's detailed information to provide
11 /// more precise answers to certain TTI queries, while letting the target
12 /// independent and default TTI implementations handle the rest.
13 ///
14 //===----------------------------------------------------------------------===//
15
16 #include "XCore.h"
17 #include "XCoreTargetMachine.h"
18 #include "llvm/Analysis/TargetTransformInfo.h"
19 #include "llvm/CodeGen/BasicTTIImpl.h"
20 #include "llvm/Support/Debug.h"
21 #include "llvm/Target/CostTable.h"
22 #include "llvm/Target/TargetLowering.h"
23 using namespace llvm;
24
25 #define DEBUG_TYPE "xcoretti"
26
27 namespace {
28
29 class XCoreTTIImpl : public BasicTTIImplBase {
30 typedef BasicTTIImplBase BaseT;
31 typedef TargetTransformInfo TTI;
32
33 public:
34 explicit XCoreTTIImpl(const XCoreTargetMachine *TM = nullptr) : BaseT(TM) {}
35
36 // Provide value semantics. MSVC requires that we spell all of these out.
37 XCoreTTIImpl(const XCoreTTIImpl &Arg)
38 : BaseT(static_cast(Arg)) {}
39 XCoreTTIImpl(XCoreTTIImpl &&Arg)
40 : BaseT(std::move(static_cast(Arg))) {}
41 XCoreTTIImpl &operator=(const XCoreTTIImpl &RHS) {
42 BaseT::operator=(static_cast(RHS));
43 return *this;
44 }
45 XCoreTTIImpl &operator=(XCoreTTIImpl &&RHS) {
46 BaseT::operator=(std::move(static_cast(RHS)));
47 return *this;
48 }
49
50 unsigned getNumberOfRegisters(bool Vector) {
51 if (Vector) {
52 return 0;
53 }
54 return 12;
55 }
56 };
57
58 } // end anonymous namespace
59
60 ImmutablePass *
61 llvm::createXCoreTargetTransformInfoPass(const XCoreTargetMachine *TM) {
62 return new TargetTransformInfoWrapperPass(XCoreTTIImpl(TM));
63 }
0 //===-- XCoreTargetTransformInfo.h - XCore specific TTI ---------*- C++ -*-===//
1 //
2 // The LLVM Compiler Infrastructure
3 //
4 // This file is distributed under the University of Illinois Open Source
5 // License. See LICENSE.TXT for details.
6 //
7 //===----------------------------------------------------------------------===//
8 /// \file
9 /// This file a TargetTransformInfo::Concept conforming object specific to the
10 /// XCore target machine. It uses the target's detailed information to
11 /// provide more precise answers to certain TTI queries, while letting the
12 /// target independent and default TTI implementations handle the rest.
13 ///
14 //===----------------------------------------------------------------------===//
15
16 #ifndef LLVM_LIB_TARGET_XCORE_XCORETARGETTRANSFORMINFO_H
17 #define LLVM_LIB_TARGET_XCORE_XCORETARGETTRANSFORMINFO_H
18
19 #include "XCore.h"
20 #include "XCoreTargetMachine.h"
21 #include "llvm/Analysis/TargetTransformInfo.h"
22 #include "llvm/CodeGen/BasicTTIImpl.h"
23 #include "llvm/Target/TargetLowering.h"
24
25 namespace llvm {
26
27 class XCoreTTIImpl : public BasicTTIImplBase {
28 typedef BasicTTIImplBase BaseT;
29 typedef TargetTransformInfo TTI;
30
31 public:
32 explicit XCoreTTIImpl(const XCoreTargetMachine *TM = nullptr) : BaseT(TM) {}
33
34 // Provide value semantics. MSVC requires that we spell all of these out.
35 XCoreTTIImpl(const XCoreTTIImpl &Arg)
36 : BaseT(static_cast(Arg)) {}
37 XCoreTTIImpl(XCoreTTIImpl &&Arg)
38 : BaseT(std::move(static_cast(Arg))) {}
39 XCoreTTIImpl &operator=(const XCoreTTIImpl &RHS) {
40 BaseT::operator=(static_cast(RHS));
41 return *this;
42 }
43 XCoreTTIImpl &operator=(XCoreTTIImpl &&RHS) {
44 BaseT::operator=(std::move(static_cast(RHS)));
45 return *this;
46 }
47
48 unsigned getNumberOfRegisters(bool Vector) {
49 if (Vector) {
50 return 0;
51 }
52 return 12;
53 }
54 };
55
56 } // end namespace llvm
57
58 #endif
426426 std::unique_ptr TM(Machine);
427427
428428 // Add internal analysis passes from the target machine.
429 if (TM)
430 TM->addAnalysisPasses(Passes);
431 else
432 Passes.add(createNoTargetTransformInfoPass(DL));
429 Passes.add(createTargetTransformInfoWrapperPass(
430 TM ? TM->getTTI() : TargetTransformInfo(DL)));
433431
434432 std::unique_ptr FPasses;
435433 if (OptLevelO1 || OptLevelO2 || OptLevelOs || OptLevelOz || OptLevelO3) {
436434 FPasses.reset(new FunctionPassManager(M.get()));
437435 if (DL)
438436 FPasses->add(new DataLayoutPass());
439 if (TM)
440 TM->addAnalysisPasses(*FPasses);
441 else
442 FPasses->add(createNoTargetTransformInfoPass(DL));
443
437 FPasses->add(createTargetTransformInfoWrapperPass(
438 TM ? TM->getTTI() : TargetTransformInfo(DL)));
444439 }
445440
446441 if (PrintBreakpoints) {