llvm.org GIT mirror llvm / 18b8cfa
LowerAtomic: Don't skip optnone functions; atomic still need lowering (PR34020) The lowering isn't really an optimization, so optnone shouldn't make a difference. ARM relies on the pass running when using "-mthread-model single", because in that mode, it doesn't run AtomicExpand. See bug for more details. Differential Revision: https://reviews.llvm.org/D37040 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@311565 91177308-0d34-0410-b5e6-96231b3b80d8 Hans Wennborg 2 years ago
3 changed file(s) with 12 addition(s) and 3 deletion(s). Raw diff Collapse all Expand all
154154 }
155155
156156 bool runOnFunction(Function &F) override {
157 if (skipFunction(F))
158 return false;
157 // Don't skip optnone functions; atomics still need to be lowered.
159158 FunctionAnalysisManager DummyFAM;
160159 auto PA = Impl.run(F, DummyFAM);
161160 return !PA.areAllPreserved();
5656 ; Additional IR passes that opt doesn't turn on by default.
5757 ; OPT-MORE-DAG: Skipping pass 'Dead Code Elimination'
5858 ; OPT-MORE-DAG: Skipping pass 'Dead Instruction Elimination'
59 ; OPT-MORE-DAG: Skipping pass 'Lower atomic intrinsics
6059
6160 ; Loop IR passes that opt doesn't turn on by default.
6261 ; OPT-LOOP-DAG: Skipping pass 'Delete dead loops'
2525 ret i8 %j
2626 ; CHECK: ret i8 [[INST]]
2727 }
28
29
30 define i8 @swap_optnone() noinline optnone {
31 ; CHECK-LABEL: @swap_optnone(
32 %i = alloca i8
33 %j = atomicrmw xchg i8* %i, i8 42 monotonic
34 ; CHECK: [[INST:%[a-z0-9]+]] = load
35 ; CHECK-NEXT: store
36 ret i8 %j
37 ; CHECK: ret i8 [[INST]]
38 }