llvm.org GIT mirror llvm / 18560fa
This patch fixes the MC object emission of 'nop' for external function calls and also fixes the R_PPC64_TOC16 and R_PPC64_TOC16_DS relocation offset. The 'nop' is needed so a restore TOC instruction (ld r2,40(r1)) can be placed by the linker to correct restore the TOC of previous function. Current code has two issues: it defines in PPCInstr64Bit.td file a LDinto_toc and LDtoc_restore as a DSForm_1 with DS_RA=0 where it should be DS=2 (the 8 bytes displacement of the TOC saving). It also wrongly emits a MC intruction using an uint32_t value while the PPC::BL8_NOP_ELF and PPC::BLA8_NOP_ELF are both uint64_t (because of the following 'nop'). This patch corrects the remaining ExecutionEngine using MCJIT: ExecutionEngine/2002-12-16-ArgTest.ll ExecutionEngine/2003-05-07-ArgumentTest.ll ExecutionEngine/2005-12-02-TailCallBug.ll ExecutionEngine/hello.ll ExecutionEngine/hello2.ll ExecutionEngine/test-call.ll git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166682 91177308-0d34-0410-b5e6-96231b3b80d8 Adhemerval Zanella 7 years ago
3 changed file(s) with 17 addition(s) and 7 deletion(s). Raw diff Collapse all Expand all
145145 switch ((unsigned)Fixup.getKind()) {
146146 case PPC::fixup_ppc_ha16:
147147 case PPC::fixup_ppc_lo16:
148 case PPC::fixup_ppc_toc16:
149 case PPC::fixup_ppc_toc16_ds:
148150 RelocOffset += 2;
149151 break;
150152 default:
7474 SmallVectorImpl &Fixups) const;
7575 void EncodeInstruction(const MCInst &MI, raw_ostream &OS,
7676 SmallVectorImpl &Fixups) const {
77 unsigned Bits = getBinaryCodeForInstr(MI, Fixups);
77 uint64_t Bits = getBinaryCodeForInstr(MI, Fixups);
78
79 // BL8_NOPELF and BLA8_NOP_ELF is both size of 8 bacause of the
80 // following 'nop'.
81 unsigned Size = 4; // FIXME: Have Desc.getSize() return the correct value!
82 unsigned Opcode = MI.getOpcode();
83 if (Opcode == PPC::BL8_NOP_ELF || Opcode == PPC::BLA8_NOP_ELF)
84 Size = 8;
7885
7986 // Output the constant in big endian byte order.
80 for (unsigned i = 0; i != 4; ++i) {
81 OS << (char)(Bits >> 24);
87 int ShiftValue = (Size * 8) - 8;
88 for (unsigned i = 0; i != Size; ++i) {
89 OS << (char)(Bits >> ShiftValue);
8290 Bits <<= 8;
8391 }
8492
638638 (PPCtoc_entry tconstpool:$disp, G8RC:$reg))]>, isPPC64;
639639
640640 let hasSideEffects = 1 in {
641 let RST = 2, DS_RA = 0 in // FIXME: Should be a pseudo.
642 def LDinto_toc: DSForm_1<58, 0, (outs), (ins G8RC:$reg),
641 let RST = 2, DS = 2 in
642 def LDinto_toc: DSForm_1a<58, 0, (outs), (ins G8RC:$reg),
643643 "ld 2, 8($reg)", LdStLD,
644644 [(PPCload_toc G8RC:$reg)]>, isPPC64;
645645
646 let RST = 2, DS_RA = 0 in // FIXME: Should be a pseudo.
647 def LDtoc_restore : DSForm_1<58, 0, (outs), (ins),
646 let RST = 2, DS = 10, RA = 1 in
647 def LDtoc_restore : DSForm_1a<58, 0, (outs), (ins),
648648 "ld 2, 40(1)", LdStLD,
649649 [(PPCtoc_restore)]>, isPPC64;
650650 }