llvm.org GIT mirror llvm / 1679d0d
X86: validate 'int' instruction The int instruction takes as an operand an 8-bit immediate value. Validate that the input is valid rather than silently truncating the value. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225941 91177308-0d34-0410-b5e6-96231b3b80d8 Saleem Abdulrasool 4 years ago
3 changed file(s) with 37 addition(s) and 0 deletion(s). Raw diff Collapse all Expand all
683683 bool ParseDirectiveWord(unsigned Size, SMLoc L);
684684 bool ParseDirectiveCode(StringRef IDVal, SMLoc L);
685685
686 bool validateInstruction(MCInst &Inst, const OperandVector &Ops);
686687 bool processInstruction(MCInst &Inst, const OperandVector &Ops);
687688
688689 /// Wrapper around MCStreamer::EmitInstruction(). Possibly adds
22712272 return convertToSExti8(Inst, Opcode, X86::RAX, isCmp);
22722273 }
22732274
2275 bool X86AsmParser::validateInstruction(MCInst &Inst, const OperandVector &Ops) {
2276 switch (Inst.getOpcode()) {
2277 default: return true;
2278 case X86::INT:
2279 assert(Inst.getOperand(0).isImm() && "expected immediate");
2280 if (Inst.getOperand(0).getImm() > 255) {
2281 Error(Ops[1]->getStartLoc(), "interrupt vector must be in range [0-255]");
2282 return false;
2283 }
2284 return true;
2285 }
2286 llvm_unreachable("handle the instruction appropriately");
2287 }
2288
22742289 bool X86AsmParser::processInstruction(MCInst &Inst, const OperandVector &Ops) {
22752290 switch (Inst.getOpcode()) {
22762291 default: return false;
24332448 isParsingIntelSyntax())) {
24342449 default: llvm_unreachable("Unexpected match result!");
24352450 case Match_Success:
2451 if (!validateInstruction(Inst, Operands))
2452 return true;
2453
24362454 // Some instructions need post-processing to, for example, tweak which
24372455 // encoding is selected. Loop on it while changes happen so the
24382456 // individual transformations can chain off each other.
26762694 unsigned NumSuccessfulMatches =
26772695 std::count(std::begin(Match), std::end(Match), Match_Success);
26782696 if (NumSuccessfulMatches == 1) {
2697 if (!validateInstruction(Inst, Operands))
2698 return true;
2699
26792700 // Some instructions need post-processing to, for example, tweak which
26802701 // encoding is selected. Loop on it while changes happen so the individual
26812702 // transformations can chain off each other.
0 # RUN: not llvm-mc -triple i686 -filetype asm -o /dev/null %s 2>&1 | FileCheck %s
1
2 .text
3 int $65535
4 # CHECK: error: interrupt vector must be in range [0-255]
5 # CHECK: int $65535
6 # CHECK: ^
0 # RUN: not llvm-mc -x86-asm-syntax intel -triple i686 -filetype asm -o /dev/null %s 2>&1 \
1 # RUN: | FileCheck %s
2
3 .text
4 int 65535
5 # CHECK: error: interrupt vector must be in range [0-255]
6 # CHECK: int 65535
7 # CHECK: ^
8