llvm.org GIT mirror llvm / 16277c4
[SystemZ] Add NC, OC and XC For now these are just used to handle scalar ANDs, ORs and XORs in which all operands are memory. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190041 91177308-0d34-0410-b5e6-96231b3b80d8 Richard Sandiford 6 years ago
13 changed file(s) with 1006 addition(s) and 53 deletion(s). Raw diff Collapse all Expand all
289289 SDNode *splitLargeImmediate(unsigned Opcode, SDNode *Node, SDValue Op0,
290290 uint64_t UpperVal, uint64_t LowerVal);
291291
292 // N is a (store (load Y), X) pattern. Return true if it can use an MVC
293 // from Y to X.
292294 bool storeLoadCanUseMVC(SDNode *N) const;
295
296 // N is a (store (op (load A[0]), (load A[1])), X) pattern. Return true
297 // if A[1 - I] == X and if N can use a block operation like NC from A[I]
298 // to X.
299 bool storeLoadCanUseBlockBinary(SDNode *N, unsigned I) const;
293300
294301 public:
295302 SystemZDAGToDAGISel(SystemZTargetMachine &TM, CodeGenOpt::Level OptLevel)
924931 return Or.getNode();
925932 }
926933
927 // N is a (store (load ...), ...) pattern. Return true if it can use MVC.
934 // Return true if Load and Store:
935 // - are loads and stores of the same size;
936 // - do not partially overlap; and
937 // - can be decomposed into what are logically individual character accesses
938 // without changing the semantics.
939 static bool canUseBlockOperation(StoreSDNode *Store, LoadSDNode *Load,
940 AliasAnalysis *AA) {
941 // Check that the two memory operands have the same size.
942 if (Load->getMemoryVT() != Store->getMemoryVT())
943 return false;
944
945 // Volatility stops an access from being decomposed.
946 if (Load->isVolatile() || Store->isVolatile())
947 return false;
948
949 // There's no chance of overlap if the load is invariant.
950 if (Load->isInvariant())
951 return true;
952
953 // If both operands are aligned, they must be equal or not overlap.
954 uint64_t Size = Load->getMemoryVT().getStoreSize();
955 if (Load->getAlignment() >= Size && Store->getAlignment() >= Size)
956 return true;
957
958 // Otherwise we need to check whether there's an alias.
959 const Value *V1 = Load->getSrcValue();
960 const Value *V2 = Store->getSrcValue();
961 if (!V1 || !V2)
962 return false;
963
964 int64_t End1 = Load->getSrcValueOffset() + Size;
965 int64_t End2 = Store->getSrcValueOffset() + Size;
966 return !AA->alias(AliasAnalysis::Location(V1, End1, Load->getTBAAInfo()),
967 AliasAnalysis::Location(V2, End2, Store->getTBAAInfo()));
968 }
969
928970 bool SystemZDAGToDAGISel::storeLoadCanUseMVC(SDNode *N) const {
929971 StoreSDNode *Store = cast(N);
930 LoadSDNode *Load = cast(Store->getValue().getNode());
931
932 // MVC is logically a bytewise copy, so can't be used for volatile accesses.
933 if (Load->isVolatile() || Store->isVolatile())
934 return false;
972 LoadSDNode *Load = cast(Store->getValue());
935973
936974 // Prefer not to use MVC if either address can use ... RELATIVE LONG
937975 // instructions.
938 assert(Load->getMemoryVT() == Store->getMemoryVT() &&
939 "Should already have checked that the types match");
940976 uint64_t Size = Load->getMemoryVT().getStoreSize();
941977 if (Size > 1 && Size <= 8) {
942978 // Prefer LHRL, LRL and LGRL.
947983 return false;
948984 }
949985
950 // There's no chance of overlap if the load is invariant.
951 if (Load->isInvariant())
952 return true;
953
954 // If both operands are aligned, they must be equal or not overlap.
955 if (Load->getAlignment() >= Size && Store->getAlignment() >= Size)
956 return true;
957
958 // Otherwise we need to check whether there's an alias.
959 const Value *V1 = Load->getSrcValue();
960 const Value *V2 = Store->getSrcValue();
961 if (!V1 || !V2)
962 return false;
963
964 int64_t End1 = Load->getSrcValueOffset() + Size;
965 int64_t End2 = Store->getSrcValueOffset() + Size;
966 return !AA->alias(AliasAnalysis::Location(V1, End1, Load->getTBAAInfo()),
967 AliasAnalysis::Location(V2, End2, Store->getTBAAInfo()));
986 return canUseBlockOperation(Store, Load, AA);
987 }
988
989 bool SystemZDAGToDAGISel::storeLoadCanUseBlockBinary(SDNode *N,
990 unsigned I) const {
991 StoreSDNode *StoreA = cast(N);
992 LoadSDNode *LoadA = cast(StoreA->getValue().getOperand(1 - I));
993 LoadSDNode *LoadB = cast(StoreA->getValue().getOperand(I));
994 if (LoadA->isVolatile() ||
995 LoadA->getMemoryVT() != StoreA->getMemoryVT() ||
996 LoadA->getBasePtr() != StoreA->getBasePtr())
997 return false;
998 return canUseBlockOperation(StoreA, LoadB, AA);
968999 }
9691000
9701001 SDNode *SystemZDAGToDAGISel::Select(SDNode *Node) {
20532053 OPCODE(UDIVREM64);
20542054 OPCODE(MVC);
20552055 OPCODE(MVC_LOOP);
2056 OPCODE(NC);
2057 OPCODE(NC_LOOP);
2058 OPCODE(OC);
2059 OPCODE(OC_LOOP);
2060 OPCODE(XC);
2061 OPCODE(XC_LOOP);
20562062 OPCODE(CLC);
20572063 OPCODE(CLC_LOOP);
20582064 OPCODE(STRCMP);
30763082 case SystemZ::MVCSequence:
30773083 case SystemZ::MVCLoop:
30783084 return emitMemMemWrapper(MI, MBB, SystemZ::MVC);
3085 case SystemZ::NCSequence:
3086 case SystemZ::NCLoop:
3087 return emitMemMemWrapper(MI, MBB, SystemZ::NC);
3088 case SystemZ::OCSequence:
3089 case SystemZ::OCLoop:
3090 return emitMemMemWrapper(MI, MBB, SystemZ::OC);
3091 case SystemZ::XCSequence:
3092 case SystemZ::XCLoop:
3093 return emitMemMemWrapper(MI, MBB, SystemZ::XC);
30793094 case SystemZ::CLCSequence:
30803095 case SystemZ::CLCLoop:
30813096 return emitMemMemWrapper(MI, MBB, SystemZ::CLC);
9191 // followed by straight-line code to handle the rest (if any).
9292 // The value of X is passed as an additional operand.
9393 MVC_LOOP,
94
95 // Similar to MVC and MVC_LOOP, but for logic operations (AND, OR, XOR).
96 NC,
97 NC_LOOP,
98 OC,
99 OC_LOOP,
100 XC,
101 XC_LOOP,
94102
95103 // Use CLC to compare two blocks of memory, with the same comments
96104 // as for MVC and MVC_LOOP.
8585 def : CopySign128
8686 (EXTRACT_SUBREG FP128:$src2, subreg_high))>;
8787
88 defm LoadStoreF32 : MVCLoadStore;
89 defm LoadStoreF64 : MVCLoadStore;
90 defm LoadStoreF128 : MVCLoadStore>;
88 defm LoadStoreF32 : MVCLoadStore>;
89 defm LoadStoreF64 : MVCLoadStore;
90 defm LoadStoreF128 : MVCLoadStore;
9191
9292 //===----------------------------------------------------------------------===//
9393 // Load instructions
349349 let mayLoad = 1, mayStore = 1, Defs = [CC], Uses = [R0W] in
350350 defm MVST : StringRRE<"mvst", 0xB255, z_stpcpy>;
351351
352 defm LoadStore8_32 : MVCLoadStore
353 MVCSequence, 1>;
354 defm LoadStore16_32 : MVCLoadStore
355 MVCSequence, 2>;
356 defm LoadStore32_32 : MVCLoadStore;
357
358 defm LoadStore8 : MVCLoadStore
359 MVCSequence, 1>;
360 defm LoadStore16 : MVCLoadStore
361 MVCSequence, 2>;
362 defm LoadStore32 : MVCLoadStore
363 MVCSequence, 4>;
364 defm LoadStore64 : MVCLoadStore;
365
366352 //===----------------------------------------------------------------------===//
367353 // Sign extensions
368354 //===----------------------------------------------------------------------===//
769755
770756 // AND to memory
771757 defm NI : BinarySIPair<"ni", 0x94, 0xEB54, null_frag, uimm8>;
758
759 // Block AND.
760 let mayLoad = 1, mayStore = 1 in
761 defm NC : MemorySS<"nc", 0xD4, z_nc, z_nc_loop>;
772762 }
773763 defm : RMWIByte;
774764 defm : RMWIByte;
811801
812802 // OR to memory
813803 defm OI : BinarySIPair<"oi", 0x96, 0xEB56, null_frag, uimm8>;
804
805 // Block OR.
806 let mayLoad = 1, mayStore = 1 in
807 defm OC : MemorySS<"oc", 0xD6, z_oc, z_oc_loop>;
814808 }
815809 defm : RMWIByte;
816810 defm : RMWIByte;
842836
843837 // XOR to memory
844838 defm XI : BinarySIPair<"xi", 0x97, 0xEB57, null_frag, uimm8>;
839
840 // Block XOR.
841 let mayLoad = 1, mayStore = 1 in
842 defm XC : MemorySS<"xc", 0xD7, z_xc, z_xc_loop>;
845843 }
846844 defm : RMWIByte;
847845 defm : RMWIByte;
12451243 (i32 63)),
12461244 (i32 63)),
12471245 (Select64 (LGHI -1), (LGHI 0), uimm8zx4:$valid, uimm8zx4:$cc)>;
1246
1247 // Peepholes for turning scalar operations into block operations.
1248 defm : BlockLoadStore
1249 XCSequence, 1>;
1250 defm : BlockLoadStore
1251 XCSequence, 2>;
1252 defm : BlockLoadStore
1253 XCSequence, 4>;
1254 defm : BlockLoadStore
1255 OCSequence, XCSequence, 1>;
1256 defm : BlockLoadStore
1257 XCSequence, 2>;
1258 defm : BlockLoadStore
1259 XCSequence, 4>;
1260 defm : BlockLoadStore
1261 XCSequence, 8>;
130130 [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>;
131131 def z_mvc_loop : SDNode<"SystemZISD::MVC_LOOP", SDT_ZMemMemLoop,
132132 [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>;
133 def z_nc : SDNode<"SystemZISD::NC", SDT_ZMemMemLength,
134 [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>;
135 def z_nc_loop : SDNode<"SystemZISD::NC_LOOP", SDT_ZMemMemLoop,
136 [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>;
137 def z_oc : SDNode<"SystemZISD::OC", SDT_ZMemMemLength,
138 [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>;
139 def z_oc_loop : SDNode<"SystemZISD::OC_LOOP", SDT_ZMemMemLoop,
140 [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>;
141 def z_xc : SDNode<"SystemZISD::XC", SDT_ZMemMemLength,
142 [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>;
143 def z_xc_loop : SDNode<"SystemZISD::XC_LOOP", SDT_ZMemMemLoop,
144 [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>;
133145 def z_clc : SDNode<"SystemZISD::CLC", SDT_ZMemMemLength,
134146 [SDNPHasChain, SDNPOutGlue, SDNPMayLoad]>;
135147 def z_clc_loop : SDNode<"SystemZISD::CLC_LOOP", SDT_ZMemMemLoop,
223235 def nonvolatile_truncstorei16 : NonvolatileStore;
224236 def nonvolatile_truncstorei32 : NonvolatileStore;
225237
238 // A store of a load that can be implemented using MVC.
239 def mvc_store : PatFrag<(ops node:$value, node:$addr),
240 (unindexedstore node:$value, node:$addr),
241 [{ return storeLoadCanUseMVC(N); }]>;
242
243 // Binary read-modify-write operations on memory in which the other
244 // operand is also memory and for which block operations like NC can
245 // be used. There are two patterns for each operator, depending on
246 // which operand contains the "other" load.
247 multiclass block_op {
248 def "1" : PatFrag<(ops node:$value, node:$addr),
249 (unindexedstore (operator node:$value,
250 (unindexedload node:$addr)),
251 node:$addr),
252 [{ return storeLoadCanUseBlockBinary(N, 0); }]>;
253 def "2" : PatFrag<(ops node:$value, node:$addr),
254 (unindexedstore (operator (unindexedload node:$addr),
255 node:$value),
256 node:$addr),
257 [{ return storeLoadCanUseBlockBinary(N, 1); }]>;
258 }
259 defm block_and : block_op;
260 defm block_or : block_op;
261 defm block_xor : block_op;
262
226263 // Insertions.
227264 def inserti8 : PatFrag<(ops node:$src1, node:$src2),
228265 (or (and node:$src1, -256), node:$src2)>;
6565 (insn cls:$src1, mode:$src2)>;
6666 }
6767
68 // Use MVC instruction INSN for a load of type LOAD followed by a store
69 // of type STORE. VT is the type of the intermediate register and LENGTH
70 // is the number of bytes to copy (which may be smaller than VT).
71 multiclass MVCLoadStore
72 ValueType vt, Instruction insn, bits<5> length> {
73 def Pat : PatFrag<(ops node:$dest, node:$src),
74 (store (vt (load node:$src)), node:$dest),
75 [{ return storeLoadCanUseMVC(N); }]>;
68 // Try to use MVC instruction INSN for a load of type LOAD followed by a store
69 // of the same size. VT is the type of the intermediate (legalized) value and
70 // LENGTH is the number of bytes loaded by LOAD.
71 multiclass MVCLoadStore
72 bits<5> length> {
73 def : Pat<(mvc_store (vt (load bdaddr12only:$src)), bdaddr12only:$dest),
74 (insn bdaddr12only:$dest, bdaddr12only:$src, length)>;
75 }
7676
77 def : Pat<(!cast(NAME##"Pat") bdaddr12only:$dest,
78 bdaddr12only:$src),
77 // Use NC-like instruction INSN for block_op operation OPERATOR.
78 // The other operand is a load of type LOAD, which accesses LENGTH bytes.
79 // VT is the intermediate legalized type in which the binary operation
80 // is actually done.
81 multiclass BinaryLoadStore
82 ValueType vt, Instruction insn, bits<5> length> {
83 def : Pat<(operator (vt (load bdaddr12only:$src)), bdaddr12only:$dest),
7984 (insn bdaddr12only:$dest, bdaddr12only:$src, length)>;
85 }
86
87 // A convenient way of generating all block peepholes for a particular
88 // LOAD/VT/LENGTH combination.
89 multiclass BlockLoadStore
90 Instruction mvc, Instruction nc, Instruction oc,
91 Instruction xc, bits<5> length> {
92 defm : MVCLoadStore;
93 defm : BinaryLoadStore;
94 defm : BinaryLoadStore;
95 defm : BinaryLoadStore;
96 defm : BinaryLoadStore;
97 defm : BinaryLoadStore;
98 defm : BinaryLoadStore;
8099 }
81100
82101 // Record that INSN is a LOAD AND TEST that can be used to compare
0 ; Test memory-to-memory ANDs.
1 ;
2 ; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
3
4 @g1 = global i8 1
5 @g2 = global i16 2
6
7 ; Test the simple i8 case.
8 define void @f1(i8 *%ptr1) {
9 ; CHECK-LABEL: f1:
10 ; CHECK: nc 1(1,%r2), 0(%r2)
11 ; CHECK: br %r14
12 %ptr2 = getelementptr i8 *%ptr1, i64 1
13 %val = load i8 *%ptr1
14 %old = load i8 *%ptr2
15 %and = and i8 %val, %old
16 store i8 %and, i8 *%ptr2
17 ret void
18 }
19
20 ; ...and again in reverse.
21 define void @f2(i8 *%ptr1) {
22 ; CHECK-LABEL: f2:
23 ; CHECK: nc 1(1,%r2), 0(%r2)
24 ; CHECK: br %r14
25 %ptr2 = getelementptr i8 *%ptr1, i64 1
26 %val = load i8 *%ptr1
27 %old = load i8 *%ptr2
28 %and = and i8 %old, %val
29 store i8 %and, i8 *%ptr2
30 ret void
31 }
32
33 ; Test i8 cases where one value is zero-extended to 32 bits and the other
34 ; sign-extended.
35 define void @f3(i8 *%ptr1) {
36 ; CHECK-LABEL: f3:
37 ; CHECK: nc 1(1,%r2), 0(%r2)
38 ; CHECK: br %r14
39 %ptr2 = getelementptr i8 *%ptr1, i64 1
40 %val = load i8 *%ptr1
41 %extval = zext i8 %val to i32
42 %old = load i8 *%ptr2
43 %extold = sext i8 %old to i32
44 %and = and i32 %extval, %extold
45 %trunc = trunc i32 %and to i8
46 store i8 %trunc, i8 *%ptr2
47 ret void
48 }
49
50 ; ...and again with the extension types reversed.
51 define void @f4(i8 *%ptr1) {
52 ; CHECK-LABEL: f4:
53 ; CHECK: nc 1(1,%r2), 0(%r2)
54 ; CHECK: br %r14
55 %ptr2 = getelementptr i8 *%ptr1, i64 1
56 %val = load i8 *%ptr1
57 %extval = sext i8 %val to i32
58 %old = load i8 *%ptr2
59 %extold = zext i8 %old to i32
60 %and = and i32 %extval, %extold
61 %trunc = trunc i32 %and to i8
62 store i8 %trunc, i8 *%ptr2
63 ret void
64 }
65
66 ; ...and again with two sign extensions.
67 define void @f5(i8 *%ptr1) {
68 ; CHECK-LABEL: f5:
69 ; CHECK: nc 1(1,%r2), 0(%r2)
70 ; CHECK: br %r14
71 %ptr2 = getelementptr i8 *%ptr1, i64 1
72 %val = load i8 *%ptr1
73 %extval = sext i8 %val to i32
74 %old = load i8 *%ptr2
75 %extold = sext i8 %old to i32
76 %and = and i32 %extval, %extold
77 %trunc = trunc i32 %and to i8
78 store i8 %trunc, i8 *%ptr2
79 ret void
80 }
81
82 ; ...and again with two zero extensions.
83 define void @f6(i8 *%ptr1) {
84 ; CHECK-LABEL: f6:
85 ; CHECK: nc 1(1,%r2), 0(%r2)
86 ; CHECK: br %r14
87 %ptr2 = getelementptr i8 *%ptr1, i64 1
88 %val = load i8 *%ptr1
89 %extval = zext i8 %val to i32
90 %old = load i8 *%ptr2
91 %extold = zext i8 %old to i32
92 %and = and i32 %extval, %extold
93 %trunc = trunc i32 %and to i8
94 store i8 %trunc, i8 *%ptr2
95 ret void
96 }
97
98 ; Test i8 cases where the value is extended to 64 bits (just one case
99 ; this time).
100 define void @f7(i8 *%ptr1) {
101 ; CHECK-LABEL: f7:
102 ; CHECK: nc 1(1,%r2), 0(%r2)
103 ; CHECK: br %r14
104 %ptr2 = getelementptr i8 *%ptr1, i64 1
105 %val = load i8 *%ptr1
106 %extval = sext i8 %val to i64
107 %old = load i8 *%ptr2
108 %extold = zext i8 %old to i64
109 %and = and i64 %extval, %extold
110 %trunc = trunc i64 %and to i8
111 store i8 %trunc, i8 *%ptr2
112 ret void
113 }
114
115 ; Test the simple i16 case.
116 define void @f8(i16 *%ptr1) {
117 ; CHECK-LABEL: f8:
118 ; CHECK: nc 2(2,%r2), 0(%r2)
119 ; CHECK: br %r14
120 %ptr2 = getelementptr i16 *%ptr1, i64 1
121 %val = load i16 *%ptr1
122 %old = load i16 *%ptr2
123 %and = and i16 %val, %old
124 store i16 %and, i16 *%ptr2
125 ret void
126 }
127
128 ; Test i16 cases where the value is extended to 32 bits.
129 define void @f9(i16 *%ptr1) {
130 ; CHECK-LABEL: f9:
131 ; CHECK: nc 2(2,%r2), 0(%r2)
132 ; CHECK: br %r14
133 %ptr2 = getelementptr i16 *%ptr1, i64 1
134 %val = load i16 *%ptr1
135 %extval = zext i16 %val to i32
136 %old = load i16 *%ptr2
137 %extold = sext i16 %old to i32
138 %and = and i32 %extval, %extold
139 %trunc = trunc i32 %and to i16
140 store i16 %trunc, i16 *%ptr2
141 ret void
142 }
143
144 ; Test i16 cases where the value is extended to 64 bits.
145 define void @f10(i16 *%ptr1) {
146 ; CHECK-LABEL: f10:
147 ; CHECK: nc 2(2,%r2), 0(%r2)
148 ; CHECK: br %r14
149 %ptr2 = getelementptr i16 *%ptr1, i64 1
150 %val = load i16 *%ptr1
151 %extval = sext i16 %val to i64
152 %old = load i16 *%ptr2
153 %extold = zext i16 %old to i64
154 %and = and i64 %extval, %extold
155 %trunc = trunc i64 %and to i16
156 store i16 %trunc, i16 *%ptr2
157 ret void
158 }
159
160 ; Test the simple i32 case.
161 define void @f11(i32 *%ptr1) {
162 ; CHECK-LABEL: f11:
163 ; CHECK: nc 4(4,%r2), 0(%r2)
164 ; CHECK: br %r14
165 %ptr2 = getelementptr i32 *%ptr1, i64 1
166 %val = load i32 *%ptr1
167 %old = load i32 *%ptr2
168 %and = and i32 %old, %val
169 store i32 %and, i32 *%ptr2
170 ret void
171 }
172
173 ; Test i32 cases where the value is extended to 64 bits.
174 define void @f12(i32 *%ptr1) {
175 ; CHECK-LABEL: f12:
176 ; CHECK: nc 4(4,%r2), 0(%r2)
177 ; CHECK: br %r14
178 %ptr2 = getelementptr i32 *%ptr1, i64 1
179 %val = load i32 *%ptr1
180 %extval = sext i32 %val to i64
181 %old = load i32 *%ptr2
182 %extold = zext i32 %old to i64
183 %and = and i64 %extval, %extold
184 %trunc = trunc i64 %and to i32
185 store i32 %trunc, i32 *%ptr2
186 ret void
187 }
188
189 ; Test the i64 case.
190 define void @f13(i64 *%ptr1) {
191 ; CHECK-LABEL: f13:
192 ; CHECK: nc 8(8,%r2), 0(%r2)
193 ; CHECK: br %r14
194 %ptr2 = getelementptr i64 *%ptr1, i64 1
195 %val = load i64 *%ptr1
196 %old = load i64 *%ptr2
197 %and = and i64 %old, %val
198 store i64 %and, i64 *%ptr2
199 ret void
200 }
201
202 ; Make sure that we don't use NC if the first load is volatile.
203 define void @f14(i64 *%ptr1) {
204 ; CHECK-LABEL: f14:
205 ; CHECK-NOT: nc
206 ; CHECK: br %r14
207 %ptr2 = getelementptr i64 *%ptr1, i64 1
208 %val = load volatile i64 *%ptr1
209 %old = load i64 *%ptr2
210 %and = and i64 %old, %val
211 store i64 %and, i64 *%ptr2
212 ret void
213 }
214
215 ; ...likewise the second.
216 define void @f15(i64 *%ptr1) {
217 ; CHECK-LABEL: f15:
218 ; CHECK-NOT: nc
219 ; CHECK: br %r14
220 %ptr2 = getelementptr i64 *%ptr1, i64 1
221 %val = load i64 *%ptr1
222 %old = load volatile i64 *%ptr2
223 %and = and i64 %old, %val
224 store i64 %and, i64 *%ptr2
225 ret void
226 }
227
228 ; ...likewise the store.
229 define void @f16(i64 *%ptr1) {
230 ; CHECK-LABEL: f16:
231 ; CHECK-NOT: nc
232 ; CHECK: br %r14
233 %ptr2 = getelementptr i64 *%ptr1, i64 1
234 %val = load i64 *%ptr1
235 %old = load i64 *%ptr2
236 %and = and i64 %old, %val
237 store volatile i64 %and, i64 *%ptr2
238 ret void
239 }
240
241 ; Test that NC is used for aligned loads and stores, even if there is
242 ; no way of telling whether they alias.
243 define void @f17(i64 *%ptr1, i64 *%ptr2) {
244 ; CHECK-LABEL: f17:
245 ; CHECK: nc 0(8,%r3), 0(%r2)
246 ; CHECK: br %r14
247 %val = load i64 *%ptr1
248 %old = load i64 *%ptr2
249 %and = and i64 %old, %val
250 store i64 %and, i64 *%ptr2
251 ret void
252 }
253
254 ; ...but if one of the loads isn't aligned, we can't be sure.
255 define void @f18(i64 *%ptr1, i64 *%ptr2) {
256 ; CHECK-LABEL: f18:
257 ; CHECK-NOT: nc
258 ; CHECK: br %r14
259 %val = load i64 *%ptr1, align 2
260 %old = load i64 *%ptr2
261 %and = and i64 %old, %val
262 store i64 %and, i64 *%ptr2
263 ret void
264 }
265
266 ; Repeat the previous test with the operands in the opposite order.
267 define void @f19(i64 *%ptr1, i64 *%ptr2) {
268 ; CHECK-LABEL: f19:
269 ; CHECK-NOT: nc
270 ; CHECK: br %r14
271 %val = load i64 *%ptr1, align 2
272 %old = load i64 *%ptr2
273 %and = and i64 %val, %old
274 store i64 %and, i64 *%ptr2
275 ret void
276 }
277
278 ; ...and again with the other operand being unaligned.
279 define void @f20(i64 *%ptr1, i64 *%ptr2) {
280 ; CHECK-LABEL: f20:
281 ; CHECK-NOT: nc
282 ; CHECK: br %r14
283 %val = load i64 *%ptr1
284 %old = load i64 *%ptr2, align 2
285 %and = and i64 %val, %old
286 store i64 %and, i64 *%ptr2, align 2
287 ret void
288 }
289
290 ; Test a case where there is definite overlap.
291 define void @f21(i64 %base) {
292 ; CHECK-LABEL: f21:
293 ; CHECK-NOT: nc
294 ; CHECK: br %r14
295 %add = add i64 %base, 1
296 %ptr1 = inttoptr i64 %base to i64 *
297 %ptr2 = inttoptr i64 %add to i64 *
298 %val = load i64 *%ptr1
299 %old = load i64 *%ptr2, align 1
300 %and = and i64 %old, %val
301 store i64 %and, i64 *%ptr2, align 1
302 ret void
303 }
304
305 ; Test that we can use NC for global addresses for i8.
306 define void @f22(i8 *%ptr) {
307 ; CHECK-LABEL: f22:
308 ; CHECK: larl [[REG:%r[0-5]]], g1
309 ; CHECK: nc 0(1,%r2), 0([[REG]])
310 ; CHECK: br %r14
311 %val = load i8 *@g1
312 %old = load i8 *%ptr
313 %and = and i8 %val, %old
314 store i8 %and, i8 *%ptr
315 ret void
316 }
317
318 ; ...and again with the global on the store.
319 define void @f23(i8 *%ptr) {
320 ; CHECK-LABEL: f23:
321 ; CHECK: larl [[REG:%r[0-5]]], g1
322 ; CHECK: nc 0(1,[[REG]]), 0(%r2)
323 ; CHECK: br %r14
324 %val = load i8 *%ptr
325 %old = load i8 *@g1
326 %and = and i8 %val, %old
327 store i8 %and, i8 *@g1
328 ret void
329 }
330
331 ; Test that we use NC even where LHRL and STHRL are available.
332 define void @f24(i16 *%ptr) {
333 ; CHECK-LABEL: f24:
334 ; CHECK: larl [[REG:%r[0-5]]], g2
335 ; CHECK: nc 0(2,%r2), 0([[REG]])
336 ; CHECK: br %r14
337 %val = load i16 *@g2
338 %old = load i16 *%ptr
339 %and = and i16 %val, %old
340 store i16 %and, i16 *%ptr
341 ret void
342 }
343
344 ; ...likewise on the other side.
345 define void @f25(i16 *%ptr) {
346 ; CHECK-LABEL: f25:
347 ; CHECK: larl [[REG:%r[0-5]]], g2
348 ; CHECK: nc 0(2,[[REG]]), 0(%r2)
349 ; CHECK: br %r14
350 %val = load i16 *%ptr
351 %old = load i16 *@g2
352 %and = and i16 %val, %old
353 store i16 %and, i16 *@g2
354 ret void
355 }
356
357 ; Test a case where offset disambiguation is enough.
358 define void @f26(i64 *%ptr1) {
359 ; CHECK-LABEL: f26:
360 ; CHECK: nc 8(8,%r2), 0(%r2)
361 ; CHECK: br %r14
362 %ptr2 = getelementptr i64 *%ptr1, i64 1
363 %val = load i64 *%ptr1, align 1
364 %old = load i64 *%ptr2, align 1
365 %and = and i64 %old, %val
366 store i64 %and, i64 *%ptr2, align 1
367 ret void
368 }
369
370 ; Test a case where TBAA tells us there is no alias.
371 define void @f27(i64 *%ptr1, i64 *%ptr2) {
372 ; CHECK-LABEL: f27:
373 ; CHECK: nc 0(8,%r3), 0(%r2)
374 ; CHECK: br %r14
375 %val = load i64 *%ptr1, align 2, !tbaa !1
376 %old = load i64 *%ptr2, align 2, !tbaa !2
377 %and = and i64 %old, %val
378 store i64 %and, i64 *%ptr2, align 2, !tbaa !2
379 ret void
380 }
381
382 ; Test a case where TBAA information is present but doesn't help.
383 define void @f28(i64 *%ptr1, i64 *%ptr2) {
384 ; CHECK-LABEL: f28:
385 ; CHECK-NOT: nc
386 ; CHECK: br %r14
387 %val = load i64 *%ptr1, align 2, !tbaa !1
388 %old = load i64 *%ptr2, align 2, !tbaa !1
389 %and = and i64 %old, %val
390 store i64 %and, i64 *%ptr2, align 2, !tbaa !1
391 ret void
392 }
393
394 !0 = metadata !{ metadata !"root" }
395 !1 = metadata !{ metadata !"set1", metadata !0 }
396 !2 = metadata !{ metadata !"set2", metadata !0 }
0 ; Test memory-to-memory ORs.
1 ;
2 ; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
3
4 ; Test the simple i8 case.
5 define void @f1(i8 *%ptr1) {
6 ; CHECK-LABEL: f1:
7 ; CHECK: oc 1(1,%r2), 0(%r2)
8 ; CHECK: br %r14
9 %ptr2 = getelementptr i8 *%ptr1, i64 1
10 %val = load i8 *%ptr1
11 %old = load i8 *%ptr2
12 %or = or i8 %val, %old
13 store i8 %or, i8 *%ptr2
14 ret void
15 }
16
17 ; Test the simple i16 case.
18 define void @f2(i16 *%ptr1) {
19 ; CHECK-LABEL: f2:
20 ; CHECK: oc 2(2,%r2), 0(%r2)
21 ; CHECK: br %r14
22 %ptr2 = getelementptr i16 *%ptr1, i64 1
23 %val = load i16 *%ptr1
24 %old = load i16 *%ptr2
25 %or = or i16 %val, %old
26 store i16 %or, i16 *%ptr2
27 ret void
28 }
29
30 ; Test the simple i32 case.
31 define void @f3(i32 *%ptr1) {
32 ; CHECK-LABEL: f3:
33 ; CHECK: oc 4(4,%r2), 0(%r2)
34 ; CHECK: br %r14
35 %ptr2 = getelementptr i32 *%ptr1, i64 1
36 %val = load i32 *%ptr1
37 %old = load i32 *%ptr2
38 %or = or i32 %old, %val
39 store i32 %or, i32 *%ptr2
40 ret void
41 }
42
43 ; Test the i64 case.
44 define void @f4(i64 *%ptr1) {
45 ; CHECK-LABEL: f4:
46 ; CHECK: oc 8(8,%r2), 0(%r2)
47 ; CHECK: br %r14
48 %ptr2 = getelementptr i64 *%ptr1, i64 1
49 %val = load i64 *%ptr1
50 %old = load i64 *%ptr2
51 %or = or i64 %old, %val
52 store i64 %or, i64 *%ptr2
53 ret void
54 }
55
56 ; Leave other more complicated tests to and-08.ll.
0 ; Test memory-to-memory XORs.
1 ;
2 ; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
3
4 ; Test the simple i8 case.
5 define void @f1(i8 *%ptr1) {
6 ; CHECK-LABEL: f1:
7 ; CHECK: xc 1(1,%r2), 0(%r2)
8 ; CHECK: br %r14
9 %ptr2 = getelementptr i8 *%ptr1, i64 1
10 %val = load i8 *%ptr1
11 %old = load i8 *%ptr2
12 %xor = xor i8 %val, %old
13 store i8 %xor, i8 *%ptr2
14 ret void
15 }
16
17 ; Test the simple i16 case.
18 define void @f2(i16 *%ptr1) {
19 ; CHECK-LABEL: f2:
20 ; CHECK: xc 2(2,%r2), 0(%r2)
21 ; CHECK: br %r14
22 %ptr2 = getelementptr i16 *%ptr1, i64 1
23 %val = load i16 *%ptr1
24 %old = load i16 *%ptr2
25 %xor = xor i16 %val, %old
26 store i16 %xor, i16 *%ptr2
27 ret void
28 }
29
30 ; Test the simple i32 case.
31 define void @f3(i32 *%ptr1) {
32 ; CHECK-LABEL: f3:
33 ; CHECK: xc 4(4,%r2), 0(%r2)
34 ; CHECK: br %r14
35 %ptr2 = getelementptr i32 *%ptr1, i64 1
36 %val = load i32 *%ptr1
37 %old = load i32 *%ptr2
38 %xor = xor i32 %old, %val
39 store i32 %xor, i32 *%ptr2
40 ret void
41 }
42
43 ; Test the i64 case.
44 define void @f4(i64 *%ptr1) {
45 ; CHECK-LABEL: f4:
46 ; CHECK: xc 8(8,%r2), 0(%r2)
47 ; CHECK: br %r14
48 %ptr2 = getelementptr i64 *%ptr1, i64 1
49 %val = load i64 *%ptr1
50 %old = load i64 *%ptr2
51 %xor = xor i64 %old, %val
52 store i64 %xor, i64 *%ptr2
53 ret void
54 }
55
56 ; Leave other more complicated tests to and-08.ll.
48604860 # CHECK: mxdb %f13, 0
48614861 0xed 0xd0 0x00 0x00 0x00 0x07
48624862
4863 # CHECK: nc 0(1), 0
4864 0xd4 0x00 0x00 0x00 0x00 0x00
4865
4866 # CHECK: nc 0(1), 0(%r1)
4867 0xd4 0x00 0x00 0x00 0x10 0x00
4868
4869 # CHECK: nc 0(1), 0(%r15)
4870 0xd4 0x00 0x00 0x00 0xf0 0x00
4871
4872 # CHECK: nc 0(1), 4095
4873 0xd4 0x00 0x00 0x00 0x0f 0xff
4874
4875 # CHECK: nc 0(1), 4095(%r1)
4876 0xd4 0x00 0x00 0x00 0x1f 0xff
4877
4878 # CHECK: nc 0(1), 4095(%r15)
4879 0xd4 0x00 0x00 0x00 0xff 0xff
4880
4881 # CHECK: nc 0(1,%r1), 0
4882 0xd4 0x00 0x10 0x00 0x00 0x00
4883
4884 # CHECK: nc 0(1,%r15), 0
4885 0xd4 0x00 0xf0 0x00 0x00 0x00
4886
4887 # CHECK: nc 4095(1,%r1), 0
4888 0xd4 0x00 0x1f 0xff 0x00 0x00
4889
4890 # CHECK: nc 4095(1,%r15), 0
4891 0xd4 0x00 0xff 0xff 0x00 0x00
4892
4893 # CHECK: nc 0(256,%r1), 0
4894 0xd4 0xff 0x10 0x00 0x00 0x00
4895
4896 # CHECK: nc 0(256,%r15), 0
4897 0xd4 0xff 0xf0 0x00 0x00 0x00
4898
48634899 # CHECK: ngr %r0, %r0
48644900 0xb9 0x80 0x00 0x00
48654901
50945130 # CHECK: ny %r15, 0
50955131 0xe3 0xf0 0x00 0x00 0x00 0x54
50965132
5133 # CHECK: oc 0(1), 0
5134 0xd6 0x00 0x00 0x00 0x00 0x00
5135
5136 # CHECK: oc 0(1), 0(%r1)
5137 0xd6 0x00 0x00 0x00 0x10 0x00
5138
5139 # CHECK: oc 0(1), 0(%r15)
5140 0xd6 0x00 0x00 0x00 0xf0 0x00
5141
5142 # CHECK: oc 0(1), 4095
5143 0xd6 0x00 0x00 0x00 0x0f 0xff
5144
5145 # CHECK: oc 0(1), 4095(%r1)
5146 0xd6 0x00 0x00 0x00 0x1f 0xff
5147
5148 # CHECK: oc 0(1), 4095(%r15)
5149 0xd6 0x00 0x00 0x00 0xff 0xff
5150
5151 # CHECK: oc 0(1,%r1), 0
5152 0xd6 0x00 0x10 0x00 0x00 0x00
5153
5154 # CHECK: oc 0(1,%r15), 0
5155 0xd6 0x00 0xf0 0x00 0x00 0x00
5156
5157 # CHECK: oc 4095(1,%r1), 0
5158 0xd6 0x00 0x1f 0xff 0x00 0x00
5159
5160 # CHECK: oc 4095(1,%r15), 0
5161 0xd6 0x00 0xff 0xff 0x00 0x00
5162
5163 # CHECK: oc 0(256,%r1), 0
5164 0xd6 0xff 0x10 0x00 0x00 0x00
5165
5166 # CHECK: oc 0(256,%r15), 0
5167 0xd6 0xff 0xf0 0x00 0x00 0x00
5168
50975169 # CHECK: ogr %r0, %r0
50985170 0xb9 0x81 0x00 0x00
50995171
70117083 # CHECK: tmll %r15, 0
70127084 0xa7 0xf1 0x00 0x00
70137085
7086 # CHECK: xc 0(1), 0
7087 0xd7 0x00 0x00 0x00 0x00 0x00
7088
7089 # CHECK: xc 0(1), 0(%r1)
7090 0xd7 0x00 0x00 0x00 0x10 0x00
7091
7092 # CHECK: xc 0(1), 0(%r15)
7093 0xd7 0x00 0x00 0x00 0xf0 0x00
7094
7095 # CHECK: xc 0(1), 4095
7096 0xd7 0x00 0x00 0x00 0x0f 0xff
7097
7098 # CHECK: xc 0(1), 4095(%r1)
7099 0xd7 0x00 0x00 0x00 0x1f 0xff
7100
7101 # CHECK: xc 0(1), 4095(%r15)
7102 0xd7 0x00 0x00 0x00 0xff 0xff
7103
7104 # CHECK: xc 0(1,%r1), 0
7105 0xd7 0x00 0x10 0x00 0x00 0x00
7106
7107 # CHECK: xc 0(1,%r15), 0
7108 0xd7 0x00 0xf0 0x00 0x00 0x00
7109
7110 # CHECK: xc 4095(1,%r1), 0
7111 0xd7 0x00 0x1f 0xff 0x00 0x00
7112
7113 # CHECK: xc 4095(1,%r15), 0
7114 0xd7 0x00 0xff 0xff 0x00 0x00
7115
7116 # CHECK: xc 0(256,%r1), 0
7117 0xd7 0xff 0x10 0x00 0x00 0x00
7118
7119 # CHECK: xc 0(256,%r15), 0
7120 0xd7 0xff 0xf0 0x00 0x00 0x00
7121
70147122 # CHECK: xgr %r0, %r0
70157123 0xb9 0x82 0x00 0x00
70167124
20502050 n %r0, -1
20512051 n %r0, 4096
20522052
2053 #CHECK: error: missing length in address
2054 #CHECK: nc 0, 0
2055 #CHECK: error: missing length in address
2056 #CHECK: nc 0(%r1), 0(%r1)
2057 #CHECK: error: invalid use of length addressing
2058 #CHECK: nc 0(1,%r1), 0(2,%r1)
2059 #CHECK: error: invalid operand
2060 #CHECK: nc 0(0,%r1), 0(%r1)
2061 #CHECK: error: invalid operand
2062 #CHECK: nc 0(257,%r1), 0(%r1)
2063 #CHECK: error: invalid operand
2064 #CHECK: nc -1(1,%r1), 0(%r1)
2065 #CHECK: error: invalid operand
2066 #CHECK: nc 4096(1,%r1), 0(%r1)
2067 #CHECK: error: invalid operand
2068 #CHECK: nc 0(1,%r1), -1(%r1)
2069 #CHECK: error: invalid operand
2070 #CHECK: nc 0(1,%r1), 4096(%r1)
2071 #CHECK: error: %r0 used in an address
2072 #CHECK: nc 0(1,%r0), 0(%r1)
2073 #CHECK: error: %r0 used in an address
2074 #CHECK: nc 0(1,%r1), 0(%r0)
2075 #CHECK: error: invalid use of indexed addressing
2076 #CHECK: nc 0(%r1,%r2), 0(%r1)
2077 #CHECK: error: invalid use of indexed addressing
2078 #CHECK: nc 0(1,%r2), 0(%r1,%r2)
2079 #CHECK: error: unknown token in expression
2080 #CHECK: nc 0(-), 0
2081
2082 nc 0, 0
2083 nc 0(%r1), 0(%r1)
2084 nc 0(1,%r1), 0(2,%r1)
2085 nc 0(0,%r1), 0(%r1)
2086 nc 0(257,%r1), 0(%r1)
2087 nc -1(1,%r1), 0(%r1)
2088 nc 4096(1,%r1), 0(%r1)
2089 nc 0(1,%r1), -1(%r1)
2090 nc 0(1,%r1), 4096(%r1)
2091 nc 0(1,%r0), 0(%r1)
2092 nc 0(1,%r1), 0(%r0)
2093 nc 0(%r1,%r2), 0(%r1)
2094 nc 0(1,%r2), 0(%r1,%r2)
2095 nc 0(-), 0
2096
20532097 #CHECK: error: invalid operand
20542098 #CHECK: ng %r0, -524289
20552099 #CHECK: error: invalid operand
21652209
21662210 o %r0, -1
21672211 o %r0, 4096
2212
2213 #CHECK: error: missing length in address
2214 #CHECK: oc 0, 0
2215 #CHECK: error: missing length in address
2216 #CHECK: oc 0(%r1), 0(%r1)
2217 #CHECK: error: invalid use of length addressing
2218 #CHECK: oc 0(1,%r1), 0(2,%r1)
2219 #CHECK: error: invalid operand
2220 #CHECK: oc 0(0,%r1), 0(%r1)
2221 #CHECK: error: invalid operand
2222 #CHECK: oc 0(257,%r1), 0(%r1)
2223 #CHECK: error: invalid operand
2224 #CHECK: oc -1(1,%r1), 0(%r1)
2225 #CHECK: error: invalid operand
2226 #CHECK: oc 4096(1,%r1), 0(%r1)
2227 #CHECK: error: invalid operand
2228 #CHECK: oc 0(1,%r1), -1(%r1)
2229 #CHECK: error: invalid operand
2230 #CHECK: oc 0(1,%r1), 4096(%r1)
2231 #CHECK: error: %r0 used in an address
2232 #CHECK: oc 0(1,%r0), 0(%r1)
2233 #CHECK: error: %r0 used in an address
2234 #CHECK: oc 0(1,%r1), 0(%r0)
2235 #CHECK: error: invalid use of indexed addressing
2236 #CHECK: oc 0(%r1,%r2), 0(%r1)
2237 #CHECK: error: invalid use of indexed addressing
2238 #CHECK: oc 0(1,%r2), 0(%r1,%r2)
2239 #CHECK: error: unknown token in expression
2240 #CHECK: oc 0(-), 0
2241
2242 oc 0, 0
2243 oc 0(%r1), 0(%r1)
2244 oc 0(1,%r1), 0(2,%r1)
2245 oc 0(0,%r1), 0(%r1)
2246 oc 0(257,%r1), 0(%r1)
2247 oc -1(1,%r1), 0(%r1)
2248 oc 4096(1,%r1), 0(%r1)
2249 oc 0(1,%r1), -1(%r1)
2250 oc 0(1,%r1), 4096(%r1)
2251 oc 0(1,%r0), 0(%r1)
2252 oc 0(1,%r1), 0(%r0)
2253 oc 0(%r1,%r2), 0(%r1)
2254 oc 0(1,%r2), 0(%r1,%r2)
2255 oc 0(-), 0
21682256
21692257 #CHECK: error: invalid operand
21702258 #CHECK: og %r0, -524289
29022990 x %r0, -1
29032991 x %r0, 4096
29042992
2993 #CHECK: error: missing length in address
2994 #CHECK: xc 0, 0
2995 #CHECK: error: missing length in address
2996 #CHECK: xc 0(%r1), 0(%r1)
2997 #CHECK: error: invalid use of length addressing
2998 #CHECK: xc 0(1,%r1), 0(2,%r1)
2999 #CHECK: error: invalid operand
3000 #CHECK: xc 0(0,%r1), 0(%r1)
3001 #CHECK: error: invalid operand
3002 #CHECK: xc 0(257,%r1), 0(%r1)
3003 #CHECK: error: invalid operand
3004 #CHECK: xc -1(1,%r1), 0(%r1)
3005 #CHECK: error: invalid operand
3006 #CHECK: xc 4096(1,%r1), 0(%r1)
3007 #CHECK: error: invalid operand
3008 #CHECK: xc 0(1,%r1), -1(%r1)
3009 #CHECK: error: invalid operand
3010 #CHECK: xc 0(1,%r1), 4096(%r1)
3011 #CHECK: error: %r0 used in an address
3012 #CHECK: xc 0(1,%r0), 0(%r1)
3013 #CHECK: error: %r0 used in an address
3014 #CHECK: xc 0(1,%r1), 0(%r0)
3015 #CHECK: error: invalid use of indexed addressing
3016 #CHECK: xc 0(%r1,%r2), 0(%r1)
3017 #CHECK: error: invalid use of indexed addressing
3018 #CHECK: xc 0(1,%r2), 0(%r1,%r2)
3019 #CHECK: error: unknown token in expression
3020 #CHECK: xc 0(-), 0
3021
3022 xc 0, 0
3023 xc 0(%r1), 0(%r1)
3024 xc 0(1,%r1), 0(2,%r1)
3025 xc 0(0,%r1), 0(%r1)
3026 xc 0(257,%r1), 0(%r1)
3027 xc -1(1,%r1), 0(%r1)
3028 xc 4096(1,%r1), 0(%r1)
3029 xc 0(1,%r1), -1(%r1)
3030 xc 0(1,%r1), 4096(%r1)
3031 xc 0(1,%r0), 0(%r1)
3032 xc 0(1,%r1), 0(%r0)
3033 xc 0(%r1,%r2), 0(%r1)
3034 xc 0(1,%r2), 0(%r1,%r2)
3035 xc 0(-), 0
3036
29053037 #CHECK: error: invalid operand
29063038 #CHECK: xg %r0, -524289
29073039 #CHECK: error: invalid operand
57735773 n %r0, 4095(%r15,%r1)
57745774 n %r15, 0
57755775
5776 #CHECK: nc 0(1), 0 # encoding: [0xd4,0x00,0x00,0x00,0x00,0x00]
5777 #CHECK: nc 0(1), 0(%r1) # encoding: [0xd4,0x00,0x00,0x00,0x10,0x00]
5778 #CHECK: nc 0(1), 0(%r15) # encoding: [0xd4,0x00,0x00,0x00,0xf0,0x00]
5779 #CHECK: nc 0(1), 4095 # encoding: [0xd4,0x00,0x00,0x00,0x0f,0xff]
5780 #CHECK: nc 0(1), 4095(%r1) # encoding: [0xd4,0x00,0x00,0x00,0x1f,0xff]
5781 #CHECK: nc 0(1), 4095(%r15) # encoding: [0xd4,0x00,0x00,0x00,0xff,0xff]
5782 #CHECK: nc 0(1,%r1), 0 # encoding: [0xd4,0x00,0x10,0x00,0x00,0x00]
5783 #CHECK: nc 0(1,%r15), 0 # encoding: [0xd4,0x00,0xf0,0x00,0x00,0x00]
5784 #CHECK: nc 4095(1,%r1), 0 # encoding: [0xd4,0x00,0x1f,0xff,0x00,0x00]
5785 #CHECK: nc 4095(1,%r15), 0 # encoding: [0xd4,0x00,0xff,0xff,0x00,0x00]
5786 #CHECK: nc 0(256,%r1), 0 # encoding: [0xd4,0xff,0x10,0x00,0x00,0x00]
5787 #CHECK: nc 0(256,%r15), 0 # encoding: [0xd4,0xff,0xf0,0x00,0x00,0x00]
5788
5789 nc 0(1), 0
5790 nc 0(1), 0(%r1)
5791 nc 0(1), 0(%r15)
5792 nc 0(1), 4095
5793 nc 0(1), 4095(%r1)
5794 nc 0(1), 4095(%r15)
5795 nc 0(1,%r1), 0
5796 nc 0(1,%r15), 0
5797 nc 4095(1,%r1), 0
5798 nc 4095(1,%r15), 0
5799 nc 0(256,%r1), 0
5800 nc 0(256,%r15), 0
5801
57765802 #CHECK: ng %r0, -524288 # encoding: [0xe3,0x00,0x00,0x00,0x80,0x80]
57775803 #CHECK: ng %r0, -1 # encoding: [0xe3,0x00,0x0f,0xff,0xff,0x80]
57785804 #CHECK: ng %r0, 0 # encoding: [0xe3,0x00,0x00,0x00,0x00,0x80]
59465972 o %r0, 4095(%r1,%r15)
59475973 o %r0, 4095(%r15,%r1)
59485974 o %r15, 0
5975
5976 #CHECK: oc 0(1), 0 # encoding: [0xd6,0x00,0x00,0x00,0x00,0x00]
5977 #CHECK: oc 0(1), 0(%r1) # encoding: [0xd6,0x00,0x00,0x00,0x10,0x00]
5978 #CHECK: oc 0(1), 0(%r15) # encoding: [0xd6,0x00,0x00,0x00,0xf0,0x00]
5979 #CHECK: oc 0(1), 4095 # encoding: [0xd6,0x00,0x00,0x00,0x0f,0xff]
5980 #CHECK: oc 0(1), 4095(%r1) # encoding: [0xd6,0x00,0x00,0x00,0x1f,0xff]
5981 #CHECK: oc 0(1), 4095(%r15) # encoding: [0xd6,0x00,0x00,0x00,0xff,0xff]
5982 #CHECK: oc 0(1,%r1), 0 # encoding: [0xd6,0x00,0x10,0x00,0x00,0x00]
5983 #CHECK: oc 0(1,%r15), 0 # encoding: [0xd6,0x00,0xf0,0x00,0x00,0x00]
5984 #CHECK: oc 4095(1,%r1), 0 # encoding: [0xd6,0x00,0x1f,0xff,0x00,0x00]
5985 #CHECK: oc 4095(1,%r15), 0 # encoding: [0xd6,0x00,0xff,0xff,0x00,0x00]
5986 #CHECK: oc 0(256,%r1), 0 # encoding: [0xd6,0xff,0x10,0x00,0x00,0x00]
5987 #CHECK: oc 0(256,%r15), 0 # encoding: [0xd6,0xff,0xf0,0x00,0x00,0x00]
5988
5989 oc 0(1), 0
5990 oc 0(1), 0(%r1)
5991 oc 0(1), 0(%r15)
5992 oc 0(1), 4095
5993 oc 0(1), 4095(%r1)
5994 oc 0(1), 4095(%r15)
5995 oc 0(1,%r1), 0
5996 oc 0(1,%r15), 0
5997 oc 4095(1,%r1), 0
5998 oc 4095(1,%r15), 0
5999 oc 0(256,%r1), 0
6000 oc 0(256,%r15), 0
59496001
59506002 #CHECK: og %r0, -524288 # encoding: [0xe3,0x00,0x00,0x00,0x80,0x81]
59516003 #CHECK: og %r0, -1 # encoding: [0xe3,0x00,0x0f,0xff,0xff,0x81]
73397391 x %r0, 4095(%r15,%r1)
73407392 x %r15, 0
73417393
7394 #CHECK: xc 0(1), 0 # encoding: [0xd7,0x00,0x00,0x00,0x00,0x00]
7395 #CHECK: xc 0(1), 0(%r1) # encoding: [0xd7,0x00,0x00,0x00,0x10,0x00]
7396 #CHECK: xc 0(1), 0(%r15) # encoding: [0xd7,0x00,0x00,0x00,0xf0,0x00]
7397 #CHECK: xc 0(1), 4095 # encoding: [0xd7,0x00,0x00,0x00,0x0f,0xff]
7398 #CHECK: xc 0(1), 4095(%r1) # encoding: [0xd7,0x00,0x00,0x00,0x1f,0xff]
7399 #CHECK: xc 0(1), 4095(%r15) # encoding: [0xd7,0x00,0x00,0x00,0xff,0xff]
7400 #CHECK: xc 0(1,%r1), 0 # encoding: [0xd7,0x00,0x10,0x00,0x00,0x00]
7401 #CHECK: xc 0(1,%r15), 0 # encoding: [0xd7,0x00,0xf0,0x00,0x00,0x00]
7402 #CHECK: xc 4095(1,%r1), 0 # encoding: [0xd7,0x00,0x1f,0xff,0x00,0x00]
7403 #CHECK: xc 4095(1,%r15), 0 # encoding: [0xd7,0x00,0xff,0xff,0x00,0x00]
7404 #CHECK: xc 0(256,%r1), 0 # encoding: [0xd7,0xff,0x10,0x00,0x00,0x00]
7405 #CHECK: xc 0(256,%r15), 0 # encoding: [0xd7,0xff,0xf0,0x00,0x00,0x00]
7406
7407 xc 0(1), 0
7408 xc 0(1), 0(%r1)
7409 xc 0(1), 0(%r15)
7410 xc 0(1), 4095
7411 xc 0(1), 4095(%r1)
7412 xc 0(1), 4095(%r15)
7413 xc 0(1,%r1), 0
7414 xc 0(1,%r15), 0
7415 xc 4095(1,%r1), 0
7416 xc 4095(1,%r15), 0
7417 xc 0(256,%r1), 0
7418 xc 0(256,%r15), 0
7419
73427420 #CHECK: xg %r0, -524288 # encoding: [0xe3,0x00,0x00,0x00,0x80,0x82]
73437421 #CHECK: xg %r0, -1 # encoding: [0xe3,0x00,0x0f,0xff,0xff,0x82]
73447422 #CHECK: xg %r0, 0 # encoding: [0xe3,0x00,0x00,0x00,0x00,0x82]