llvm.org GIT mirror llvm / 152932b
Don't force promotion of return arguments on the callee. Some architectures (like x86) don't require it. This fixes bug 3779. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67132 91177308-0d34-0410-b5e6-96231b3b80d8 Rafael Espindola 10 years ago
17 changed file(s) with 37 addition(s) and 38 deletion(s). Raw diff Collapse all Expand all
977977 SDValue RetOp = getValue(I.getOperand(i));
978978 for (unsigned j = 0, f = NumValues; j != f; ++j) {
979979 MVT VT = ValueVTs[j];
980
981 // FIXME: C calling convention requires the return type to be promoted to
982 // at least 32-bit. But this is not necessary for non-C calling
983 // conventions.
984 if (VT.isInteger()) {
985 MVT MinVT = TLI.getRegisterType(MVT::i32);
986 if (VT.bitsLT(MinVT))
987 VT = MinVT;
988 }
989980
990981 unsigned NumParts = TLI.getNumRegisters(VT);
991982 MVT PartVT = TLI.getRegisterType(VT);
0 ; RUN: llvm-as -o - %s | llc -march=cellspu > %t1.s
1 ; RUN: grep and %t1.s | count 234
1 ; RUN: grep and %t1.s | count 230
22 ; RUN: grep andc %t1.s | count 85
3 ; RUN: grep andi %t1.s | count 37
3 ; RUN: grep andi %t1.s | count 35
44 ; RUN: grep andhi %t1.s | count 30
55 ; RUN: grep andbi %t1.s | count 4
66
0 ; RUN: llvm-as -o - %s | llc -march=cellspu > %t1.s
11 ; RUN: grep eqv %t1.s | count 18
2 ; RUN: grep xshw %t1.s | count 6
3 ; RUN: grep xsbh %t1.s | count 3
4 ; RUN: grep andi %t1.s | count 3
52
63 ; Test the 'eqv' instruction, whose boolean expression is:
74 ; (a & b) | (~a & ~b), which simplifies to
0 ; RUN: llvm-as -o - %s | llc -march=cellspu > %t1.s
1 ; RUN: grep ilh %t1.s | count 5
1 ; RUN: grep ilh %t1.s | count 15
22 ; RUN: grep ceqh %t1.s | count 29
33 ; RUN: grep ceqhi %t1.s | count 13
44 ; RUN: grep clgth %t1.s | count 15
0 ; RUN: llvm-as -o - %s | llc -march=cellspu > %t1.s
1 ; RUN: grep "ilh" %t1.s | count 5
1 ; RUN: grep "ilh" %t1.s | count 11
22 target datalayout = "E-p:32:32:128-f64:64:128-f32:32:128-i64:32:128-i32:32:128-i16:16:128-i8:8:128-i1:8:128-a0:0:128-v128:128:128-s0:128:128"
33 target triple = "spu"
44
0 ; RUN: llvm-as -o - %s | llc -march=cellspu > %t1.s
11 ; RUN: grep nand %t1.s | count 90
2 ; RUN: grep and %t1.s | count 94
3 ; RUN: grep xsbh %t1.s | count 2
4 ; RUN: grep xshw %t1.s | count 4
2 ; RUN: grep and %t1.s | count 90
53 target datalayout = "E-p:32:32:128-f64:64:128-f32:32:128-i64:32:128-i32:32:128-i16:16:128-i8:8:128-i1:8:128-a0:0:128-v128:128:128-s0:128:128"
64 target triple = "spu"
75
0 ; RUN: llvm-as -o - %s | llc -march=cellspu > %t1.s
1 ; RUN: grep and %t1.s | count 2
21 ; RUN: grep orc %t1.s | count 85
32 ; RUN: grep ori %t1.s | count 30
43 ; RUN: grep orhi %t1.s | count 30
22 ; RUN: grep {shlhi } %t1.s | count 3
33 ; RUN: grep {shl } %t1.s | count 9
44 ; RUN: grep {shli } %t1.s | count 3
5 ; RUN: grep {xshw } %t1.s | count 5
6 ; RUN: grep {and } %t1.s | count 5
75 ; RUN: grep {andi } %t1.s | count 2
86 ; RUN: grep {rotmi } %t1.s | count 2
97 ; RUN: grep {rotqmbyi } %t1.s | count 1
55 ; RUN: grep 771 %t1.s | count 4
66 ; RUN: grep 515 %t1.s | count 2
77 ; RUN: grep 1799 %t1.s | count 2
8 ; RUN: grep 1543 %t1.s | count 5
9 ; RUN: grep 1029 %t1.s | count 3
8 ; RUN: grep 1543 %t1.s | count 3
9 ; RUN: grep 1029 %t1.s | count 1
1010 ; RUN: grep {shli.*, 4} %t1.s | count 4
1111 ; RUN: grep stqx %t1.s | count 4
12 ; RUN: grep ilhu %t1.s | count 11
13 ; RUN: grep iohl %t1.s | count 8
14 ; RUN: grep shufb %t1.s | count 15
12 ; RUN: grep ilhu %t1.s | count 9
13 ; RUN: grep iohl %t1.s | count 6
14 ; RUN: grep shufb %t1.s | count 13
1515 ; RUN: grep frds %t1.s | count 1
1616
1717 ; ModuleID = 'stores.bc'
22 ; RUN: grep lqa %t1.s | count 5
33 ; RUN: grep lqd %t1.s | count 11
44 ; RUN: grep rotqbyi %t1.s | count 7
5 ; RUN: grep xshw %t1.s | count 1
6 ; RUN: grep andi %t1.s | count 5
75 ; RUN: grep cbd %t1.s | count 3
86 ; RUN: grep chd %t1.s | count 1
97 ; RUN: grep cwd %t1.s | count 3
1311 ; RUN: grep ilhu %t2.s | count 16
1412 ; RUN: grep lqd %t2.s | count 16
1513 ; RUN: grep rotqbyi %t2.s | count 7
16 ; RUN: grep xshw %t2.s | count 1
17 ; RUN: grep andi %t2.s | count 5
1814 ; RUN: grep cbd %t2.s | count 3
1915 ; RUN: grep chd %t2.s | count 1
2016 ; RUN: grep cwd %t2.s | count 3
None ; RUN: llvm-as < %s | llc -march=x86 | grep {movsbl}
0 ; RUN: llvm-as < %s | llc -march=x86 | not grep {movsbl}
11
22 @X = global i32 0 ; [#uses=1]
33
0 ; RUN: llvm-as < %s | llc -march=x86-64 > %t
1 ; RUN: grep {movswl %ax, %edi} %t
2 ; RUN: grep {movw x(%rip), %ax} %t
3
4 @x = common global i16 0
5
6 define signext i16 @f() nounwind {
7 entry:
8 %0 = tail call signext i16 @h() nounwind
9 %1 = sext i16 %0 to i32
10 tail call void @g(i32 %1) nounwind
11 %2 = load i16* @x, align 2
12 ret i16 %2
13 }
14
15 declare signext i16 @h()
16
17 declare void @g(i32)
99 ret float %iftmp.0.0
1010 }
1111
12 ; RUN: llvm-as < %s | llc | grep {movsbl.*(%e.x,%e.x,4), %eax}
12 ; RUN: llvm-as < %s | llc | grep {movb.*(%e.x,%e.x,4), %al}
1313 define signext i8 @test(i8* nocapture %P, double %F) nounwind readonly {
1414 entry:
1515 %0 = fcmp olt double %F, 4.200000e+01 ; [#uses=1]
None ; RUN: llvm-as < %s | llc -march=x86 | grep {movzbl.7(%...)}
1 ; RUN: llvm-as < %s | llc -march=x86 | not grep leal
0 ; RUN: llvm-as < %s | llc -march=x86 > %t
1 ; RUN: grep {movb.7(%...)} %t
2 ; RUN: not grep leal %t
23
34 define i8 @test(i32 *%P) nounwind {
45 %Q = getelementptr i32* %P, i32 1
0 ; RUN: llvm-as < %s | llc -march=x86 > %t
1 ; RUN: grep movsbl %t
1 ; RUN: grep movb %t
2 ; RUN: not grep movsbl %t
23 ; RUN: not grep movz %t
34 ; RUN: not grep and %t
45
0 ; RUN: llvm-as < %s | llc -march=x86 -mtriple=i386-linux-gnu > %t
1 ; RUN: grep {movzwl %gs:i@NTPOFF, %eax} %t
1 ; RUN: grep {movw %gs:i@NTPOFF, %ax} %t
22
33 @i = thread_local global i16 15
44
0 ; RUN: llvm-as < %s | llc -march=x86 -mtriple=i386-linux-gnu > %t
1 ; RUN: grep {movzbl %gs:i@NTPOFF, %eax} %t
1 ; RUN: grep {movb %gs:i@NTPOFF, %al} %t
22
33 @i = thread_local global i8 15
44