llvm.org GIT mirror llvm / 14d1dd9
Remove RegisterClassInfo::isReserved() and isAllocatable(). Clients can use the equivalent functions in MRI. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165990 91177308-0d34-0410-b5e6-96231b3b80d8 Jakob Stoklund Olesen 7 years ago
7 changed file(s) with 18 addition(s) and 36 deletion(s). Raw diff Collapse all Expand all
105105 return CalleeSaved[N-1];
106106 return 0;
107107 }
108
109 /// isReserved - Returns true when PhysReg is a reserved register.
110 ///
111 /// Reserved registers may belong to an allocatable register class, but the
112 /// target has explicitly requested that they are not used.
113 ///
114 bool isReserved(unsigned PhysReg) const {
115 return Reserved.test(PhysReg);
116 }
117
118 /// isAllocatable - Returns true when PhysReg belongs to an allocatable
119 /// register class and it hasn't been reserved.
120 ///
121 /// Allocatable registers may show up in the allocation order of some virtual
122 /// register, so a register allocator needs to track its liveness and
123 /// availability.
124 bool isAllocatable(unsigned PhysReg) const {
125 return TRI->isInAllocatableClass(PhysReg) && !isReserved(PhysReg);
126 }
127108 };
128109 } // end namespace llvm
129110
634634 --R;
635635 const unsigned NewSuperReg = Order[R];
636636 // Don't consider non-allocatable registers
637 if (!RegClassInfo.isAllocatable(NewSuperReg)) continue;
637 if (!MRI.isAllocatable(NewSuperReg)) continue;
638638 // Don't replace a register with itself.
639639 if (NewSuperReg == SuperReg) continue;
640640
817817 DEBUG(dbgs() << "\tAntidep reg: " << TRI->getName(AntiDepReg));
818818 assert(AntiDepReg != 0 && "Anti-dependence on reg0?");
819819
820 if (!RegClassInfo.isAllocatable(AntiDepReg)) {
820 if (!MRI.isAllocatable(AntiDepReg)) {
821821 // Don't break anti-dependencies on non-allocatable registers.
822822 DEBUG(dbgs() << " (non-allocatable)\n");
823823 continue;
2828 const TargetRegisterClass *RC = VRM.getRegInfo().getRegClass(VirtReg);
2929 std::pair HintPair =
3030 VRM.getRegInfo().getRegAllocationHint(VirtReg);
31 const MachineRegisterInfo &MRI = VRM.getRegInfo();
3132
3233 // HintPair.second is a register, phys or virt.
3334 Hint = HintPair.second;
5152 unsigned *P = new unsigned[Order.size()];
5253 Begin = P;
5354 for (unsigned i = 0; i != Order.size(); ++i)
54 if (!RCI.isReserved(Order[i]))
55 if (!MRI.isReserved(Order[i]))
5556 *P++ = Order[i];
5657 End = P;
5758
6869
6970 // The hint must be a valid physreg for allocation.
7071 if (Hint && (!TargetRegisterInfo::isPhysicalRegister(Hint) ||
71 !RC->contains(Hint) || RCI.isReserved(Hint)))
72 !RC->contains(Hint) || MRI.isReserved(Hint)))
7273 Hint = 0;
7374 }
7475
526526 if (Edge->getKind() == SDep::Anti) {
527527 AntiDepReg = Edge->getReg();
528528 assert(AntiDepReg != 0 && "Anti-dependence on reg0?");
529 if (!RegClassInfo.isAllocatable(AntiDepReg))
529 if (!MRI.isAllocatable(AntiDepReg))
530530 // Don't break anti-dependencies on non-allocatable registers.
531531 AntiDepReg = 0;
532532 else if (KeepRegs.test(AntiDepReg))
508508
509509 // Ignore invalid hints.
510510 if (Hint && (!TargetRegisterInfo::isPhysicalRegister(Hint) ||
511 !RC->contains(Hint) || !RegClassInfo.isAllocatable(Hint)))
511 !RC->contains(Hint) || !MRI->isAllocatable(Hint)))
512512 Hint = 0;
513513
514514 // Take hint when possible.
837837 // Add live-in registers as live.
838838 for (MachineBasicBlock::livein_iterator I = MBB->livein_begin(),
839839 E = MBB->livein_end(); I != E; ++I)
840 if (RegClassInfo.isAllocatable(*I))
840 if (MRI->isAllocatable(*I))
841841 definePhysReg(MII, *I, regReserved);
842842
843843 SmallVector VirtDead;
969969 }
970970 continue;
971971 }
972 if (!RegClassInfo.isAllocatable(Reg)) continue;
972 if (!MRI->isAllocatable(Reg)) continue;
973973 if (MO.isUse()) {
974974 usePhysReg(MO);
975975 } else if (MO.isEarlyClobber()) {
10571057 unsigned Reg = MO.getReg();
10581058
10591059 if (TargetRegisterInfo::isPhysicalRegister(Reg)) {
1060 if (!RegClassInfo.isAllocatable(Reg)) continue;
1060 if (!MRI->isAllocatable(Reg)) continue;
10611061 definePhysReg(MI, Reg, (MO.isImplicit() || MO.isDead()) ?
10621062 regFree : regReserved);
10631063 continue;
894894 /// Always join simple intervals that are defined by a single copy from a
895895 /// reserved register. This doesn't increase register pressure, so it is
896896 /// always beneficial.
897 if (!RegClassInfo.isReserved(CP.getDstReg())) {
897 if (!MRI->isReserved(CP.getDstReg())) {
898898 DEBUG(dbgs() << "\tCan only merge into reserved registers.\n");
899899 return false;
900900 }
10691069 /// Attempt joining with a reserved physreg.
10701070 bool RegisterCoalescer::joinReservedPhysReg(CoalescerPair &CP) {
10711071 assert(CP.isPhys() && "Must be a physreg copy");
1072 assert(RegClassInfo.isReserved(CP.getDstReg()) && "Not a reserved register");
1072 assert(MRI->isReserved(CP.getDstReg()) && "Not a reserved register");
10731073 LiveInterval &RHS = LIS->getInterval(CP.getSrcReg());
10741074 DEBUG(dbgs() << "\t\tRHS = " << PrintReg(CP.getSrcReg()) << ' ' << RHS
10751075 << '\n');
336336 PhysRegOperands &PhysRegOpers,
337337 VirtRegOperands &VirtRegOpers,
338338 const TargetRegisterInfo *TRI,
339 const RegisterClassInfo *RCI) {
339 const MachineRegisterInfo *MRI) {
340340 for(ConstMIBundleOperands OperI(MI); OperI.isValid(); ++OperI) {
341341 const MachineOperand &MO = *OperI;
342342 if (!MO.isReg() || !MO.getReg())
344344
345345 if (TargetRegisterInfo::isVirtualRegister(MO.getReg()))
346346 VirtRegOpers.collect(MO, TRI);
347 else if (RCI->isAllocatable(MO.getReg()))
347 else if (MRI->isAllocatable(MO.getReg()))
348348 PhysRegOpers.collect(MO, TRI);
349349 }
350350 // Remove redundant physreg dead defs.
450450
451451 PhysRegOperands PhysRegOpers;
452452 VirtRegOperands VirtRegOpers;
453 collectOperands(CurrPos, PhysRegOpers, VirtRegOpers, TRI, RCI);
453 collectOperands(CurrPos, PhysRegOpers, VirtRegOpers, TRI, MRI);
454454
455455 // Boost pressure for all dead defs together.
456456 increasePhysRegPressure(PhysRegOpers.DeadDefs);
523523
524524 PhysRegOperands PhysRegOpers;
525525 VirtRegOperands VirtRegOpers;
526 collectOperands(CurrPos, PhysRegOpers, VirtRegOpers, TRI, RCI);
526 collectOperands(CurrPos, PhysRegOpers, VirtRegOpers, TRI, MRI);
527527
528528 // Kill liveness at last uses.
529529 for (unsigned i = 0, e = PhysRegOpers.Uses.size(); i < e; ++i) {
665665 // Account for register pressure similar to RegPressureTracker::recede().
666666 PhysRegOperands PhysRegOpers;
667667 VirtRegOperands VirtRegOpers;
668 collectOperands(MI, PhysRegOpers, VirtRegOpers, TRI, RCI);
668 collectOperands(MI, PhysRegOpers, VirtRegOpers, TRI, MRI);
669669
670670 // Boost max pressure for all dead defs together.
671671 // Since CurrSetPressure and MaxSetPressure
751751 // Account for register pressure similar to RegPressureTracker::recede().
752752 PhysRegOperands PhysRegOpers;
753753 VirtRegOperands VirtRegOpers;
754 collectOperands(MI, PhysRegOpers, VirtRegOpers, TRI, RCI);
754 collectOperands(MI, PhysRegOpers, VirtRegOpers, TRI, MRI);
755755
756756 // Kill liveness at last uses. Assume allocatable physregs are single-use
757757 // rather than checking LiveIntervals.