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Inside the calling convention logic LocVT is always a simple value type, so there is no point in passing it around using an EVT. Use the simpler MVT everywhere. Rather than trying to propagate this information maximally in all the code that using the calling convention stuff, I chose to do a mainly low impact change instead. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118167 91177308-0d34-0410-b5e6-96231b3b80d8 Duncan Sands 9 years ago
16 changed file(s) with 135 addition(s) and 123 deletion(s). Raw diff Collapse all Expand all
5959 EVT ValVT;
6060
6161 /// LocVT - The type of the location being assigned to.
62 EVT LocVT;
62 MVT LocVT;
6363 public:
6464
6565 static CCValAssign getReg(unsigned ValNo, EVT ValVT,
66 unsigned RegNo, EVT LocVT,
66 unsigned RegNo, MVT LocVT,
6767 LocInfo HTP) {
6868 CCValAssign Ret;
6969 Ret.ValNo = ValNo;
7777 }
7878
7979 static CCValAssign getCustomReg(unsigned ValNo, EVT ValVT,
80 unsigned RegNo, EVT LocVT,
80 unsigned RegNo, MVT LocVT,
8181 LocInfo HTP) {
8282 CCValAssign Ret;
8383 Ret = getReg(ValNo, ValVT, RegNo, LocVT, HTP);
8686 }
8787
8888 static CCValAssign getMem(unsigned ValNo, EVT ValVT,
89 unsigned Offset, EVT LocVT,
89 unsigned Offset, MVT LocVT,
9090 LocInfo HTP) {
9191 CCValAssign Ret;
9292 Ret.ValNo = ValNo;
100100 }
101101
102102 static CCValAssign getCustomMem(unsigned ValNo, EVT ValVT,
103 unsigned Offset, EVT LocVT,
103 unsigned Offset, MVT LocVT,
104104 LocInfo HTP) {
105105 CCValAssign Ret;
106106 Ret = getMem(ValNo, ValVT, Offset, LocVT, HTP);
118118
119119 unsigned getLocReg() const { assert(isRegLoc()); return Loc; }
120120 unsigned getLocMemOffset() const { assert(isMemLoc()); return Loc; }
121 EVT getLocVT() const { return LocVT; }
121 MVT getLocVT() const { return LocVT; }
122122
123123 LocInfo getLocInfo() const { return HTP; }
124124 bool isExtInLoc() const {
130130 /// CCAssignFn - This function assigns a location for Val, updating State to
131131 /// reflect the change. It returns 'true' if it failed to handle Val.
132132 typedef bool CCAssignFn(unsigned ValNo, EVT ValVT,
133 EVT LocVT, CCValAssign::LocInfo LocInfo,
133 MVT LocVT, CCValAssign::LocInfo LocInfo,
134134 ISD::ArgFlagsTy ArgFlags, CCState &State);
135135
136136 /// CCCustomFn - This function assigns a location for Val, possibly updating
137137 /// all args to reflect changes and indicates if it handled it. It must set
138138 /// isCustom if it handles the arg and returns true.
139139 typedef bool CCCustomFn(unsigned &ValNo, EVT &ValVT,
140 EVT &LocVT, CCValAssign::LocInfo &LocInfo,
140 MVT &LocVT, CCValAssign::LocInfo &LocInfo,
141141 ISD::ArgFlagsTy &ArgFlags, CCState &State);
142142
143143 /// CCState - This class holds information needed while lowering arguments and
197197
198198 /// AnalyzeCallOperands - Same as above except it takes vectors of types
199199 /// and argument flags.
200 void AnalyzeCallOperands(SmallVectorImpl<EVT> &ArgVTs,
200 void AnalyzeCallOperands(SmallVectorImpl<MVT> &ArgVTs,
201201 SmallVectorImpl &Flags,
202202 CCAssignFn Fn);
203203
208208
209209 /// AnalyzeCallResult - Same as above except it's specialized for calls which
210210 /// produce a single value.
211 void AnalyzeCallResult(EVT VT, CCAssignFn Fn);
211 void AnalyzeCallResult(MVT VT, CCAssignFn Fn);
212212
213213 /// getFirstUnallocated - Return the first unallocated register in the set, or
214214 /// NumRegs if they are all allocated.
284284 // value. The size and alignment information of the argument is encoded in its
285285 // parameter attribute.
286286 void HandleByVal(unsigned ValNo, EVT ValVT,
287 EVT LocVT, CCValAssign::LocInfo LocInfo,
287 MVT LocVT, CCValAssign::LocInfo LocInfo,
288288 int MinSize, int MinAlign, ISD::ArgFlagsTy ArgFlags);
289289
290290 private:
132132 bool operator>(const MVT& S) const { return SimpleTy > S.SimpleTy; }
133133 bool operator<(const MVT& S) const { return SimpleTy < S.SimpleTy; }
134134 bool operator==(const MVT& S) const { return SimpleTy == S.SimpleTy; }
135 bool operator!=(const MVT& S) const { return SimpleTy != S.SimpleTy; }
135136 bool operator>=(const MVT& S) const { return SimpleTy >= S.SimpleTy; }
136137 bool operator<=(const MVT& S) const { return SimpleTy <= S.SimpleTy; }
137138
279280 }
280281 }
281282
283 /// getStoreSize - Return the number of bytes overwritten by a store
284 /// of the specified value type.
285 unsigned getStoreSize() const {
286 return (getSizeInBits() + 7) / 8;
287 }
288
289 /// getStoreSizeInBits - Return the number of bits overwritten by a store
290 /// of the specified value type.
291 unsigned getStoreSizeInBits() const {
292 return getStoreSize() * 8;
293 }
294
282295 static MVT getFloatingPointVT(unsigned BitWidth) {
283296 switch (BitWidth) {
284297 default:
105105 ///
106106 struct InputArg {
107107 ArgFlagsTy Flags;
108 EVT VT;
108 MVT VT;
109109 bool Used;
110110
111111 InputArg() : VT(MVT::Other), Used(false) {}
112112 InputArg(ArgFlagsTy flags, EVT vt, bool used)
113 : Flags(flags), VT(vt), Used(used) {
114 assert(VT.isSimple() &&
115 "InputArg value type must be Simple!");
113 : Flags(flags), Used(used) {
114 VT = vt.getSimpleVT();
116115 }
117116 };
118117
122121 ///
123122 struct OutputArg {
124123 ArgFlagsTy Flags;
125 EVT VT;
124 MVT VT;
126125
127126 /// IsFixed - Is this a "fixed" value, ie not passed through a vararg "...".
128127 bool IsFixed;
129128
130129 OutputArg() : IsFixed(false) {}
131130 OutputArg(ArgFlagsTy flags, EVT vt, bool isfixed)
132 : Flags(flags), VT(vt), IsFixed(isfixed) {
133 assert(VT.isSimple() &&
134 "OutputArg value type must be Simple!");
131 : Flags(flags), IsFixed(isfixed) {
132 VT = vt.getSimpleVT();
135133 }
136134 };
137135 }
3434 // value. The size and alignment information of the argument is encoded in its
3535 // parameter attribute.
3636 void CCState::HandleByVal(unsigned ValNo, EVT ValVT,
37 EVT LocVT, CCValAssign::LocInfo LocInfo,
37 MVT LocVT, CCValAssign::LocInfo LocInfo,
3838 int MinSize, int MinAlign,
3939 ISD::ArgFlagsTy ArgFlags) {
4040 unsigned Align = ArgFlags.getByValAlign();
6565 unsigned NumArgs = Ins.size();
6666
6767 for (unsigned i = 0; i != NumArgs; ++i) {
68 EVT ArgVT = Ins[i].VT;
68 MVT ArgVT = Ins[i].VT;
6969 ISD::ArgFlagsTy ArgFlags = Ins[i].Flags;
7070 if (Fn(i, ArgVT, ArgVT, CCValAssign::Full, ArgFlags, *this)) {
7171 #ifndef NDEBUG
7272 dbgs() << "Formal argument #" << i << " has unhandled type "
73 << ArgVT.getEVTString();
73 << EVT(ArgVT).getEVTString();
7474 #endif
7575 llvm_unreachable(0);
7676 }
8383 CCAssignFn Fn) {
8484 // Determine which register each value should be copied into.
8585 for (unsigned i = 0, e = Outs.size(); i != e; ++i) {
86 EVT VT = Outs[i].VT;
86 MVT VT = Outs[i].VT;
8787 ISD::ArgFlagsTy ArgFlags = Outs[i].Flags;
8888 if (Fn(i, VT, VT, CCValAssign::Full, ArgFlags, *this))
8989 return false;
9797 CCAssignFn Fn) {
9898 // Determine which register each value should be copied into.
9999 for (unsigned i = 0, e = Outs.size(); i != e; ++i) {
100 EVT VT = Outs[i].VT;
100 MVT VT = Outs[i].VT;
101101 ISD::ArgFlagsTy ArgFlags = Outs[i].Flags;
102102 if (Fn(i, VT, VT, CCValAssign::Full, ArgFlags, *this)) {
103103 #ifndef NDEBUG
104104 dbgs() << "Return operand #" << i << " has unhandled type "
105 << VT.getEVTString();
105 << EVT(VT).getEVTString();
106106 #endif
107107 llvm_unreachable(0);
108108 }
115115 CCAssignFn Fn) {
116116 unsigned NumOps = Outs.size();
117117 for (unsigned i = 0; i != NumOps; ++i) {
118 EVT ArgVT = Outs[i].VT;
118 MVT ArgVT = Outs[i].VT;
119119 ISD::ArgFlagsTy ArgFlags = Outs[i].Flags;
120120 if (Fn(i, ArgVT, ArgVT, CCValAssign::Full, ArgFlags, *this)) {
121121 #ifndef NDEBUG
122122 dbgs() << "Call operand #" << i << " has unhandled type "
123 << ArgVT.getEVTString();
123 << EVT(ArgVT).getEVTString();
124124 #endif
125125 llvm_unreachable(0);
126126 }
129129
130130 /// AnalyzeCallOperands - Same as above except it takes vectors of types
131131 /// and argument flags.
132 void CCState::AnalyzeCallOperands(SmallVectorImpl<EVT> &ArgVTs,
132 void CCState::AnalyzeCallOperands(SmallVectorImpl<MVT> &ArgVTs,
133133 SmallVectorImpl &Flags,
134134 CCAssignFn Fn) {
135135 unsigned NumOps = ArgVTs.size();
136136 for (unsigned i = 0; i != NumOps; ++i) {
137 EVT ArgVT = ArgVTs[i];
137 MVT ArgVT = ArgVTs[i];
138138 ISD::ArgFlagsTy ArgFlags = Flags[i];
139139 if (Fn(i, ArgVT, ArgVT, CCValAssign::Full, ArgFlags, *this)) {
140140 #ifndef NDEBUG
141141 dbgs() << "Call operand #" << i << " has unhandled type "
142 << ArgVT.getEVTString();
142 << EVT(ArgVT).getEVTString();
143143 #endif
144144 llvm_unreachable(0);
145145 }
151151 void CCState::AnalyzeCallResult(const SmallVectorImpl &Ins,
152152 CCAssignFn Fn) {
153153 for (unsigned i = 0, e = Ins.size(); i != e; ++i) {
154 EVT VT = Ins[i].VT;
154 MVT VT = Ins[i].VT;
155155 ISD::ArgFlagsTy Flags = Ins[i].Flags;
156156 if (Fn(i, VT, VT, CCValAssign::Full, Flags, *this)) {
157157 #ifndef NDEBUG
158158 dbgs() << "Call result #" << i << " has unhandled type "
159 << VT.getEVTString();
159 << EVT(VT).getEVTString();
160160 #endif
161161 llvm_unreachable(0);
162162 }
165165
166166 /// AnalyzeCallResult - Same as above except it's specialized for calls which
167167 /// produce a single value.
168 void CCState::AnalyzeCallResult(EVT VT, CCAssignFn Fn) {
168 void CCState::AnalyzeCallResult(MVT VT, CCAssignFn Fn) {
169169 if (Fn(0, VT, VT, CCValAssign::Full, ISD::ArgFlagsTy(), *this)) {
170170 #ifndef NDEBUG
171171 dbgs() << "Call result has unhandled type "
172 << VT.getEVTString();
172 << EVT(VT).getEVTString();
173173 #endif
174174 llvm_unreachable(0);
175175 }
60496049 unsigned NumRegs = getNumRegisters(RetTy->getContext(), VT);
60506050 for (unsigned i = 0; i != NumRegs; ++i) {
60516051 ISD::InputArg MyFlags;
6052 MyFlags.VT = RegisterVT;
6052 MyFlags.VT = RegisterVT.getSimpleVT();
60536053 MyFlags.Used = isReturnValueUsed;
60546054 if (RetSExt)
60556055 MyFlags.Flags.setSExt();
60856085 DEBUG(for (unsigned i = 0, e = Ins.size(); i != e; ++i) {
60866086 assert(InVals[i].getNode() &&
60876087 "LowerCall emitted a null value!");
6088 assert(Ins[i].VT == InVals[i].getValueType() &&
6088 assert(EVT(Ins[i].VT) == InVals[i].getValueType() &&
60896089 "LowerCall emitted a value with the wrong type!");
60906090 });
60916091
62466246 for (unsigned i = 0, e = Ins.size(); i != e; ++i) {
62476247 assert(InVals[i].getNode() &&
62486248 "LowerFormalArguments emitted a null value!");
6249 assert(Ins[i].VT == InVals[i].getValueType() &&
6249 assert(EVT(Ins[i].VT) == InVals[i].getValueType() &&
62506250 "LowerFormalArguments emitted a value with the wrong type!");
62516251 }
62526252 });
2525 namespace llvm {
2626
2727 // APCS f64 is in register pairs, possibly split to stack
28 static bool f64AssignAPCS(unsigned &ValNo, EVT &ValVT, EVT &LocVT,
28 static bool f64AssignAPCS(unsigned &ValNo, EVT &ValVT, MVT &LocVT,
2929 CCValAssign::LocInfo &LocInfo,
3030 CCState &State, bool CanFail) {
3131 static const unsigned RegList[] = { ARM::R0, ARM::R1, ARM::R2, ARM::R3 };
5555 return true;
5656 }
5757
58 static bool CC_ARM_APCS_Custom_f64(unsigned &ValNo, EVT &ValVT, EVT &LocVT,
58 static bool CC_ARM_APCS_Custom_f64(unsigned &ValNo, EVT &ValVT, MVT &LocVT,
5959 CCValAssign::LocInfo &LocInfo,
6060 ISD::ArgFlagsTy &ArgFlags,
6161 CCState &State) {
6868 }
6969
7070 // AAPCS f64 is in aligned register pairs
71 static bool f64AssignAAPCS(unsigned &ValNo, EVT &ValVT, EVT &LocVT,
71 static bool f64AssignAAPCS(unsigned &ValNo, EVT &ValVT, MVT &LocVT,
7272 CCValAssign::LocInfo &LocInfo,
7373 CCState &State, bool CanFail) {
7474 static const unsigned HiRegList[] = { ARM::R0, ARM::R2 };
103103 return true;
104104 }
105105
106 static bool CC_ARM_AAPCS_Custom_f64(unsigned &ValNo, EVT &ValVT, EVT &LocVT,
106 static bool CC_ARM_AAPCS_Custom_f64(unsigned &ValNo, EVT &ValVT, MVT &LocVT,
107107 CCValAssign::LocInfo &LocInfo,
108108 ISD::ArgFlagsTy &ArgFlags,
109109 CCState &State) {
115115 return true; // we handled it
116116 }
117117
118 static bool f64RetAssign(unsigned &ValNo, EVT &ValVT, EVT &LocVT,
118 static bool f64RetAssign(unsigned &ValNo, EVT &ValVT, MVT &LocVT,
119119 CCValAssign::LocInfo &LocInfo, CCState &State) {
120120 static const unsigned HiRegList[] = { ARM::R0, ARM::R2 };
121121 static const unsigned LoRegList[] = { ARM::R1, ARM::R3 };
135135 return true;
136136 }
137137
138 static bool RetCC_ARM_APCS_Custom_f64(unsigned &ValNo, EVT &ValVT, EVT &LocVT,
138 static bool RetCC_ARM_APCS_Custom_f64(unsigned &ValNo, EVT &ValVT, MVT &LocVT,
139139 CCValAssign::LocInfo &LocInfo,
140140 ISD::ArgFlagsTy &ArgFlags,
141141 CCState &State) {
146146 return true; // we handled it
147147 }
148148
149 static bool RetCC_ARM_AAPCS_Custom_f64(unsigned &ValNo, EVT &ValVT, EVT &LocVT,
149 static bool RetCC_ARM_AAPCS_Custom_f64(unsigned &ValNo, EVT &ValVT, MVT &LocVT,
150150 CCValAssign::LocInfo &LocInfo,
151151 ISD::ArgFlagsTy &ArgFlags,
152152 CCState &State) {
135135
136136 // Utility routines.
137137 private:
138 bool isTypeLegal(const Type *Ty, EVT &VT);
139 bool isLoadTypeLegal(const Type *Ty, EVT &VT);
138 bool isTypeLegal(const Type *Ty, MVT &VT);
139 bool isLoadTypeLegal(const Type *Ty, MVT &VT);
140140 bool ARMEmitLoad(EVT VT, unsigned &ResultReg, unsigned Base, int Offset);
141141 bool ARMEmitStore(EVT VT, unsigned SrcReg, unsigned Base, int Offset);
142142 bool ARMComputeRegOffset(const Value *Obj, unsigned &Base, int &Offset);
154154 CCAssignFn *CCAssignFnForCall(CallingConv::ID CC, bool Return);
155155 bool ProcessCallArgs(SmallVectorImpl &Args,
156156 SmallVectorImpl &ArgRegs,
157 SmallVectorImpl<EVT> &ArgVTs,
157 SmallVectorImpl<MVT> &ArgVTs,
158158 SmallVectorImpl &ArgFlags,
159159 SmallVectorImpl &RegArgs,
160160 CallingConv::ID CC,
161161 unsigned &NumBytes);
162 bool FinishCall(EVT RetVT, SmallVectorImpl &UsedRegs,
162 bool FinishCall(MVT RetVT, SmallVectorImpl &UsedRegs,
163163 const Instruction *I, CallingConv::ID CC,
164164 unsigned &NumBytes);
165165 bool ARMEmitLibcall(const Instruction *I, RTLIB::Libcall Call);
522522 // Don't handle dynamic allocas.
523523 if (!FuncInfo.StaticAllocaMap.count(AI)) return 0;
524524
525 EVT VT;
525 MVT VT;
526526 if (!isLoadTypeLegal(AI->getType(), VT)) return false;
527527
528528 DenseMap::iterator SI =
544544 return 0;
545545 }
546546
547 bool ARMFastISel::isTypeLegal(const Type *Ty, EVT &VT) {
548 VT = TLI.getValueType(Ty, true);
547 bool ARMFastISel::isTypeLegal(const Type *Ty, MVT &VT) {
548 EVT evt = TLI.getValueType(Ty, true);
549549
550550 // Only handle simple types.
551 if (VT == MVT::Other || !VT.isSimple()) return false;
551 if (evt == MVT::Other || !evt.isSimple()) return false;
552 VT = evt.getSimpleVT();
552553
553554 // Handle all legal types, i.e. a register that will directly hold this
554555 // value.
555556 return TLI.isTypeLegal(VT);
556557 }
557558
558 bool ARMFastISel::isLoadTypeLegal(const Type *Ty, EVT &VT) {
559 bool ARMFastISel::isLoadTypeLegal(const Type *Ty, MVT &VT) {
559560 if (isTypeLegal(Ty, VT)) return true;
560561
561562 // If this is a type than can be sign or zero-extended to a basic operation
784785
785786 bool ARMFastISel::SelectLoad(const Instruction *I) {
786787 // Verify we have a legal type before going any further.
787 EVT VT;
788 MVT VT;
788789 if (!isLoadTypeLegal(I->getType(), VT))
789790 return false;
790791
867868 unsigned SrcReg = 0;
868869
869870 // Yay type legalization
870 EVT VT;
871 MVT VT;
871872 if (!isLoadTypeLegal(I->getOperand(0)->getType(), VT))
872873 return false;
873874
948949 // TODO: Factor this out.
949950 if (const CmpInst *CI = dyn_cast(BI->getCondition())) {
950951 if (CI->hasOneUse() && (CI->getParent() == I->getParent())) {
951 EVT VT;
952 MVT VT;
952953 const Type *Ty = CI->getOperand(0)->getType();
953954 if (!isTypeLegal(Ty, VT))
954955 return false;
959960
960961 unsigned CmpOpc;
961962 unsigned CondReg;
962 switch (VT.getSimpleVT().SimpleTy) {
963 switch (VT.SimpleTy) {
963964 default: return false;
964965 // TODO: Verify compares.
965966 case MVT::f32:
10261027 bool ARMFastISel::SelectCmp(const Instruction *I) {
10271028 const CmpInst *CI = cast(I);
10281029
1029 EVT VT;
1030 MVT VT;
10301031 const Type *Ty = CI->getOperand(0)->getType();
10311032 if (!isTypeLegal(Ty, VT))
10321033 return false;
10371038
10381039 unsigned CmpOpc;
10391040 unsigned CondReg;
1040 switch (VT.getSimpleVT().SimpleTy) {
1041 switch (VT.SimpleTy) {
10411042 default: return false;
10421043 // TODO: Verify compares.
10431044 case MVT::f32:
11341135 // Make sure we have VFP.
11351136 if (!Subtarget->hasVFP2()) return false;
11361137
1137 EVT DstVT;
1138 MVT DstVT;
11381139 const Type *Ty = I->getType();
11391140 if (!isTypeLegal(Ty, DstVT))
11401141 return false;
11641165 // Make sure we have VFP.
11651166 if (!Subtarget->hasVFP2()) return false;
11661167
1167 EVT DstVT;
1168 MVT DstVT;
11681169 const Type *RetTy = I->getType();
11691170 if (!isTypeLegal(RetTy, DstVT))
11701171 return false;
11941195 }
11951196
11961197 bool ARMFastISel::SelectSelect(const Instruction *I) {
1197 EVT VT = TLI.getValueType(I->getType(), /*HandleUnknown=*/true);
1198 if (VT == MVT::Other || !isTypeLegal(I->getType(), VT))
1198 MVT VT;
1199 if (!isTypeLegal(I->getType(), VT))
11991200 return false;
12001201
12011202 // Things need to be register sized for register moves.
1202 if (VT.getSimpleVT().SimpleTy != MVT::i32) return false;
1203 if (VT != MVT::i32) return false;
12031204 const TargetRegisterClass *RC = TLI.getRegClassFor(VT);
12041205
12051206 unsigned CondReg = getRegForValue(I->getOperand(0));
12221223 }
12231224
12241225 bool ARMFastISel::SelectSDiv(const Instruction *I) {
1225 EVT VT;
1226 MVT VT;
12261227 const Type *Ty = I->getType();
12271228 if (!isTypeLegal(Ty, VT))
12281229 return false;
12501251 }
12511252
12521253 bool ARMFastISel::SelectSRem(const Instruction *I) {
1253 EVT VT;
1254 MVT VT;
12541255 const Type *Ty = I->getType();
12551256 if (!isTypeLegal(Ty, VT))
12561257 return false;
13591360
13601361 bool ARMFastISel::ProcessCallArgs(SmallVectorImpl &Args,
13611362 SmallVectorImpl &ArgRegs,
1362 SmallVectorImpl<EVT> &ArgVTs,
1363 SmallVectorImpl<MVT> &ArgVTs,
13631364 SmallVectorImpl &ArgFlags,
13641365 SmallVectorImpl &RegArgs,
13651366 CallingConv::ID CC,
13811382 for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i) {
13821383 CCValAssign &VA = ArgLocs[i];
13831384 unsigned Arg = ArgRegs[VA.getValNo()];
1384 EVT ArgVT = ArgVTs[VA.getValNo()];
1385 MVT ArgVT = ArgVTs[VA.getValNo()];
13851386
13861387 // We don't handle NEON parameters yet.
13871388 if (VA.getLocVT().isVector() && VA.getLocVT().getSizeInBits() > 64)
14211422 break;
14221423 }
14231424 case CCValAssign::BCvt: {
1424 unsigned BC = FastEmit_r(ArgVT.getSimpleVT(),
1425 VA.getLocVT().getSimpleVT(),
1426 ISD::BIT_CONVERT, Arg, /*TODO: Kill=*/false);
1425 unsigned BC = FastEmit_r(ArgVT, VA.getLocVT(), ISD::BIT_CONVERT, Arg,
1426 /*TODO: Kill=*/false);
14271427 assert(BC != 0 && "Failed to emit a bitcast!");
14281428 Arg = BC;
14291429 ArgVT = VA.getLocVT();
14651465 return true;
14661466 }
14671467
1468 bool ARMFastISel::FinishCall(EVT RetVT, SmallVectorImpl &UsedRegs,
1468 bool ARMFastISel::FinishCall(MVT RetVT, SmallVectorImpl &UsedRegs,
14691469 const Instruction *I, CallingConv::ID CC,
14701470 unsigned &NumBytes) {
14711471 // Issue CALLSEQ_END
14751475 .addImm(NumBytes).addImm(0));
14761476
14771477 // Now the return value.
1478 if (RetVT.getSimpleVT().SimpleTy != MVT::isVoid) {
1478 if (RetVT != MVT::isVoid) {
14791479 SmallVector RVLocs;
14801480 CCState CCInfo(CC, false, TM, RVLocs, *Context);
14811481 CCInfo.AnalyzeCallResult(RetVT, CCAssignFnForCall(CC, true));
14821482
14831483 // Copy all of the result registers out of their specified physreg.
1484 if (RVLocs.size() == 2 && RetVT.getSimpleVT().SimpleTy == MVT::f64) {
1484 if (RVLocs.size() == 2 && RetVT == MVT::f64) {
14851485 // For this move we copy into two registers and then move into the
14861486 // double fp reg we want.
14871487 EVT DestVT = RVLocs[0].getValVT();
15901590
15911591 // Handle *simple* calls for now.
15921592 const Type *RetTy = I->getType();
1593 EVT RetVT;
1593 MVT RetVT;
15941594 if (RetTy->isVoidTy())
15951595 RetVT = MVT::isVoid;
15961596 else if (!isTypeLegal(RetTy, RetVT))
16021602 // Set up the argument vectors.
16031603 SmallVector Args;
16041604 SmallVector ArgRegs;
1605 SmallVector<EVT, 8> ArgVTs;
1605 SmallVector<MVT, 8> ArgVTs;
16061606 SmallVector ArgFlags;
16071607 Args.reserve(I->getNumOperands());
16081608 ArgRegs.reserve(I->getNumOperands());
16141614 if (Arg == 0) return false;
16151615
16161616 const Type *ArgTy = Op->getType();
1617 EVT ArgVT;
1617 MVT ArgVT;
16181618 if (!isTypeLegal(ArgTy, ArgVT)) return false;
16191619
16201620 ISD::ArgFlagsTy Flags;
16841684
16851685 // Handle *simple* calls for now.
16861686 const Type *RetTy = I->getType();
1687 EVT RetVT;
1687 MVT RetVT;
16881688 if (RetTy->isVoidTy())
16891689 RetVT = MVT::isVoid;
16901690 else if (!isTypeLegal(RetTy, RetVT))
16971697 // Set up the argument vectors.
16981698 SmallVector Args;
16991699 SmallVector ArgRegs;
1700 SmallVector<EVT, 8> ArgVTs;
1700 SmallVector<MVT, 8> ArgVTs;
17011701 SmallVector ArgFlags;
17021702 Args.reserve(CS.arg_size());
17031703 ArgRegs.reserve(CS.arg_size());
17241724 return false;
17251725
17261726 const Type *ArgTy = (*i)->getType();
1727 EVT ArgVT;
1727 MVT ArgVT;
17281728 if (!isTypeLegal(ArgTy, ArgVT))
17291729 return false;
17301730 unsigned OriginalAlignment = TD.getABITypeAlignment(ArgTy);
468468 #include "MBlazeGenCallingConv.inc"
469469
470470 static bool CC_MBlaze2(unsigned ValNo, EVT ValVT,
471 EVT LocVT, CCValAssign::LocInfo LocInfo,
471 MVT LocVT, CCValAssign::LocInfo LocInfo,
472472 ISD::ArgFlagsTy ArgFlags, CCState &State) {
473473 static const unsigned RegsSize=6;
474474 static const unsigned IntRegs[] = {
365365 unsigned ObjSize = VA.getLocVT().getSizeInBits()/8;
366366 if (ObjSize > 2) {
367367 errs() << "LowerFormalArguments Unhandled argument type: "
368 << VA.getLocVT().getSimpleVT().SimpleTy
368 << EVT(VA.getLocVT()).getEVTString()
369369 << "\n";
370370 }
371371 // Create the frame index object for this incoming parameter...
629629 //===----------------------------------------------------------------------===//
630630
631631 static bool CC_MipsO32(unsigned ValNo, EVT ValVT,
632 EVT LocVT, CCValAssign::LocInfo LocInfo,
632 MVT LocVT, CCValAssign::LocInfo LocInfo,
633633 ISD::ArgFlagsTy ArgFlags, CCState &State) {
634634
635635 static const unsigned IntRegsSize=4, FloatRegsSize=2;
695695 }
696696
697697 static bool CC_MipsO32_VarArgs(unsigned ValNo, EVT ValVT,
698 EVT LocVT, CCValAssign::LocInfo LocInfo,
698 MVT LocVT, CCValAssign::LocInfo LocInfo,
699699 ISD::ArgFlagsTy ArgFlags, CCState &State) {
700700
701701 static const unsigned IntRegsSize=4;
126126 i->reset();
127127
128128 for (int i = 0, e = Ins.size(); i != e; ++ i) {
129 MVT::SimpleValueType VT = Ins[i].VT.getSimpleVT().SimpleTy;
129 MVT::SimpleValueType VT = Ins[i].VT.SimpleTy;
130130
131131 struct argmap_entry *entry = std::find(argmap,
132132 argmap + array_lengthof(argmap), VT);
3737 #include "llvm/DerivedTypes.h"
3838 using namespace llvm;
3939
40 static bool CC_PPC_SVR4_Custom_Dummy(unsigned &ValNo, EVT &ValVT, EVT &LocVT,
40 static bool CC_PPC_SVR4_Custom_Dummy(unsigned &ValNo, EVT &ValVT, MVT &LocVT,
4141 CCValAssign::LocInfo &LocInfo,
4242 ISD::ArgFlagsTy &ArgFlags,
4343 CCState &State);
4444 static bool CC_PPC_SVR4_Custom_AlignArgRegs(unsigned &ValNo, EVT &ValVT,
45 EVT &LocVT,
45 MVT &LocVT,
4646 CCValAssign::LocInfo &LocInfo,
4747 ISD::ArgFlagsTy &ArgFlags,
4848 CCState &State);
4949 static bool CC_PPC_SVR4_Custom_AlignFPArgRegs(unsigned &ValNo, EVT &ValVT,
50 EVT &LocVT,
50 MVT &LocVT,
5151 CCValAssign::LocInfo &LocInfo,
5252 ISD::ArgFlagsTy &ArgFlags,
5353 CCState &State);
14421442
14431443 #include "PPCGenCallingConv.inc"
14441444
1445 static bool CC_PPC_SVR4_Custom_Dummy(unsigned &ValNo, EVT &ValVT, EVT &LocVT,
1445 static bool CC_PPC_SVR4_Custom_Dummy(unsigned &ValNo, EVT &ValVT, MVT &LocVT,
14461446 CCValAssign::LocInfo &LocInfo,
14471447 ISD::ArgFlagsTy &ArgFlags,
14481448 CCState &State) {
14501450 }
14511451
14521452 static bool CC_PPC_SVR4_Custom_AlignArgRegs(unsigned &ValNo, EVT &ValVT,
1453 EVT &LocVT,
1453 MVT &LocVT,
14541454 CCValAssign::LocInfo &LocInfo,
14551455 ISD::ArgFlagsTy &ArgFlags,
14561456 CCState &State) {
14771477 }
14781478
14791479 static bool CC_PPC_SVR4_Custom_AlignFPArgRegs(unsigned &ValNo, EVT &ValVT,
1480 EVT &LocVT,
1480 MVT &LocVT,
14811481 CCValAssign::LocInfo &LocInfo,
14821482 ISD::ArgFlagsTy &ArgFlags,
14831483 CCState &State) {
27732773 unsigned NumArgs = Outs.size();
27742774
27752775 for (unsigned i = 0; i != NumArgs; ++i) {
2776 EVT ArgVT = Outs[i].VT;
2776 MVT ArgVT = Outs[i].VT;
27772777 ISD::ArgFlagsTy ArgFlags = Outs[i].Flags;
27782778 bool Result;
27792779
27882788 if (Result) {
27892789 #ifndef NDEBUG
27902790 errs() << "Call operand #" << i << " has unhandled type "
2791 << ArgVT.getEVTString() << "\n";
2791 << EVT(ArgVT).getEVTString() << "\n";
27922792 #endif
27932793 llvm_unreachable(0);
27942794 }
286286 // Count the size of the outgoing arguments.
287287 unsigned ArgsSize = 0;
288288 for (unsigned i = 0, e = Outs.size(); i != e; ++i) {
289 switch (Outs[i].VT.getSimpleVT().SimpleTy) {
289 switch (Outs[i].VT.SimpleTy) {
290290 default: llvm_unreachable("Unknown value type!");
291291 case MVT::i1:
292292 case MVT::i8:
131131 (VT == MVT::f32 && X86ScalarSSEf32); // f32 is when SSE1
132132 }
133133
134 bool isTypeLegal(const Type *Ty, EVT &VT, bool AllowI1 = false);
134 bool isTypeLegal(const Type *Ty, MVT &VT, bool AllowI1 = false);
135135 };
136136
137137 } // end anonymous namespace.
138138
139 bool X86FastISel::isTypeLegal(const Type *Ty, EVT &VT, bool AllowI1) {
140 VT = TLI.getValueType(Ty, /*HandleUnknown=*/true);
141 if (VT == MVT::Other || !VT.isSimple())
139 bool X86FastISel::isTypeLegal(const Type *Ty, MVT &VT, bool AllowI1) {
140 EVT evt = TLI.getValueType(Ty, /*HandleUnknown=*/true);
141 if (evt == MVT::Other || !evt.isSimple())
142142 // Unhandled type. Halt "fast" selection and bail.
143143 return false;
144
144
145 VT = evt.getSimpleVT();
145146 // For now, require SSE/SSE2 for performing floating-point operations,
146147 // since x87 requires additional work.
147148 if (VT == MVT::f64 && !X86ScalarSSEf64)
638639
639640 /// X86SelectStore - Select and emit code to implement store instructions.
640641 bool X86FastISel::X86SelectStore(const Instruction *I) {
641 EVT VT;
642 MVT VT;
642643 if (!isTypeLegal(I->getOperand(0)->getType(), VT, /*AllowI1=*/true))
643644 return false;
644645
739740 /// X86SelectLoad - Select and emit code to implement load instructions.
740741 ///
741742 bool X86FastISel::X86SelectLoad(const Instruction *I) {
742 EVT VT;
743 MVT VT;
743744 if (!isTypeLegal(I->getType(), VT, /*AllowI1=*/true))
744745 return false;
745746
822823 bool X86FastISel::X86SelectCmp(const Instruction *I) {
823824 const CmpInst *CI = cast(I);
824825
825 EVT VT;
826 MVT VT;
826827 if (!isTypeLegal(I->getOperand(0)->getType(), VT))
827828 return false;
828829
11111112 return false;
11121113 }
11131114
1114 EVT VT = TLI.getValueType(I->getType(), /*HandleUnknown=*/true);
1115 if (VT == MVT::Other || !isTypeLegal(I->getType(), VT))
1115 MVT VT;
1116 if (!isTypeLegal(I->getType(), VT))
11161117 return false;
11171118
11181119 unsigned Op0Reg = getRegForValue(I->getOperand(0));
11471148 }
11481149
11491150 bool X86FastISel::X86SelectSelect(const Instruction *I) {
1150 EVT VT = TLI.getValueType(I->getType(), /*HandleUnknown=*/true);
1151 if (VT == MVT::Other || !isTypeLegal(I->getType(), VT))
1151 MVT VT;
1152 if (!isTypeLegal(I->getType(), VT))
11521153 return false;
11531154
11541155 // We only use cmov here, if we don't have a cmov instruction bail.
11561157
11571158 unsigned Opc = 0;
11581159 const TargetRegisterClass *RC = NULL;
1159 if (VT.getSimpleVT() == MVT::i16) {
1160 if (VT == MVT::i16) {
11601161 Opc = X86::CMOVE16rr;
11611162 RC = &X86::GR16RegClass;
1162 } else if (VT.getSimpleVT() == MVT::i32) {
1163 } else if (VT == MVT::i32) {
11631164 Opc = X86::CMOVE32rr;
11641165 RC = &X86::GR32RegClass;
1165 } else if (VT.getSimpleVT() == MVT::i64) {
1166 } else if (VT == MVT::i64) {
11661167 Opc = X86::CMOVE64rr;
11671168 RC = &X86::GR64RegClass;
11681169 } else {
13131314
13141315 assert(CI && "Non-constant type in Intrinsic::objectsize?");
13151316
1316 EVT VT;
1317 MVT VT;
13171318 if (!isTypeLegal(Ty, VT))
13181319 return false;
13191320
13591360 const Type *RetTy =
13601361 cast(Callee->getReturnType())->getTypeAtIndex(unsigned(0));
13611362
1362 EVT VT;
1363 MVT VT;
13631364 if (!isTypeLegal(RetTy, VT))
13641365 return false;
13651366
14431444
14441445 // Handle *simple* calls for now.
14451446 const Type *RetTy = CS.getType();
1446 EVT RetVT;
1447 MVT RetVT;
14471448 if (RetTy->isVoidTy())
14481449 RetVT = MVT::isVoid;
14491450 else if (!isTypeLegal(RetTy, RetVT, true))
14731474 // Deal with call operands first.
14741475 SmallVector ArgVals;
14751476 SmallVector Args;
1476 SmallVector<EVT, 8> ArgVTs;
1477 SmallVector<MVT, 8> ArgVTs;
14771478 SmallVector ArgFlags;
14781479 Args.reserve(CS.arg_size());
14791480 ArgVals.reserve(CS.arg_size());
14991500 return false;
15001501
15011502 const Type *ArgTy = (*i)->getType();
1502 EVT ArgVT;
1503 MVT ArgVT;
15031504 if (!isTypeLegal(ArgTy, ArgVT))
15041505 return false;
15051506 unsigned OriginalAlignment = TD.getABITypeAlignment(ArgTy);
15761577 break;
15771578 }
15781579 case CCValAssign::BCvt: {
1579 unsigned BC = FastEmit_r(ArgVT.getSimpleVT(), VA.getLocVT().getSimpleVT(),
1580 unsigned BC = FastEmit_r(ArgVT.getSimpleVT(), VA.getLocVT(),
15801581 ISD::BIT_CONVERT, Arg, /*TODO: Kill=*/false);
15811582 assert(BC != 0 && "Failed to emit a bitcast!");
15821583 Arg = BC;
16791680
16801681 // Now handle call return value (if any).
16811682 SmallVector UsedRegs;
1682 if (RetVT.getSimpleVT().SimpleTy != MVT::isVoid) {
1683 if (RetVT != MVT::isVoid) {
16831684 SmallVector RVLocs;
16841685 CCState CCInfo(CC, false, TM, RVLocs, I->getParent()->getContext());
16851686 CCInfo.AnalyzeCallResult(RetVT, RetCC_X86);
17931794 }
17941795
17951796 unsigned X86FastISel::TargetMaterializeConstant(const Constant *C) {
1796 EVT VT;
1797 MVT VT;
17971798 if (!isTypeLegal(C->getType(), VT))
17981799 return false;
17991800
18001801 // Get opcode and regclass of the output for the given load instruction.
18011802 unsigned Opc = 0;
18021803 const TargetRegisterClass *RC = NULL;
1803 switch (VT.getSimpleVT().SimpleTy) {
1804 switch (VT.SimpleTy) {
18041805 default: return false;
18051806 case MVT::i8:
18061807 Opc = X86::MOV8rm;
10641064 unsigned ObjSize = VA.getLocVT().getSizeInBits()/8;
10651065 if (ObjSize > StackSlotSize) {
10661066 errs() << "LowerFormalArguments Unhandled argument type: "
1067 << (unsigned)VA.getLocVT().getSimpleVT().SimpleTy
1067 << EVT(VA.getLocVT()).getEVTString()
10681068 << "\n";
10691069 }
10701070 // Create the frame index object for this incoming parameter...
2727 O << "static bool " << CCs[i]->getName()
2828 << "(unsigned ValNo, EVT ValVT,\n"
2929 << std::string(CCs[i]->getName().size()+13, ' ')
30 << "EVT LocVT, CCValAssign::LocInfo LocInfo,\n"
30 << "MVT LocVT, CCValAssign::LocInfo LocInfo,\n"
3131 << std::string(CCs[i]->getName().size()+13, ' ')
3232 << "ISD::ArgFlagsTy ArgFlags, CCState &State);\n";
3333 }
4545 O << "\n\nstatic bool " << CC->getName()
4646 << "(unsigned ValNo, EVT ValVT,\n"
4747 << std::string(CC->getName().size()+13, ' ')
48 << "EVT LocVT, CCValAssign::LocInfo LocInfo,\n"
48 << "MVT LocVT, CCValAssign::LocInfo LocInfo,\n"
4949 << std::string(CC->getName().size()+13, ' ')
5050 << "ISD::ArgFlagsTy ArgFlags, CCState &State) {\n";
5151 // Emit all of the actions, in order.
162162 O << Size << ", ";
163163 else
164164 O << "\n" << IndentStr << " State.getTarget().getTargetData()"
165 "->getTypeAllocSize(LocVT.getTypeForEVT(State.getContext())), ";
165 "->getTypeAllocSize(EVT(LocVT).getTypeForEVT(State.getContext())), ";
166166 if (Align)
167167 O << Align;
168168 else
169169 O << "\n" << IndentStr << " State.getTarget().getTargetData()"
170 "->getABITypeAlignment(LocVT.getTypeForEVT(State.getContext()))";
170 "->getABITypeAlignment(EVT(LocVT).getTypeForEVT(State.getContext()))";
171171 if (Action->isSubClassOf("CCAssignToStackWithShadow"))
172172 O << ", " << getQualifiedName(Action->getValueAsDef("ShadowReg"));
173173 O << ");\n" << IndentStr