llvm.org GIT mirror llvm / 13c1e25
Interprocedural Register Allocation (IPRA): add a Transformation Pass Adds a MachineFunctionPass that scans the body to find calls, and update the register mask with the one saved by the RegUsageInfoCollector analysis in PhysicalRegisterUsageInfo. Patch by Vivek Pandya <vivekvpandya@gmail.com> Differential Revision: http://reviews.llvm.org/D21180 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@272414 91177308-0d34-0410-b5e6-96231b3b80d8 Mehdi Amini 4 years ago
5 changed file(s) with 172 addition(s) and 0 deletion(s). Raw diff Collapse all Expand all
364364 /// This pass is executed POST-RA to collect which physical registers are
365365 /// preserved by given machine function.
366366 FunctionPass *createRegUsageInfoCollector();
367
368 /// Return a MachineFunction pass that identifies call sites
369 /// and propagates register usage information of callee to caller
370 /// if available with PysicalRegisterUsageInfo pass.
371 FunctionPass *createRegUsageInfoPropPass();
367372 } // End llvm namespace
368373
369374 /// Target machine pass initializer for passes with dependencies. Use with
102102 RenameIndependentSubregs.cpp
103103 RegisterUsageInfo.cpp
104104 RegUsageInfoCollector.cpp
105 RegUsageInfoPropagate.cpp
105106 SafeStack.cpp
106107 ScheduleDAG.cpp
107108 ScheduleDAGInstrs.cpp
0 //=--- RegUsageInfoPropagate.cpp - Register Usage Informartion Propagation --=//
1 //
2 // The LLVM Compiler Infrastructure
3 //
4 // This file is distributed under the University of Illinois Open Source
5 // License. See LICENSE.TXT for details.
6 //
7 //===----------------------------------------------------------------------===//
8 ///
9 /// This pass is required to take advantage of the interprocedural register
10 /// allocation infrastructure.
11 ///
12 /// This pass iterates through MachineInstrs in a given MachineFunction and at
13 /// each callsite queries RegisterUsageInfo for RegMask (calculated based on
14 /// actual register allocation) of the callee function, if the RegMask detail
15 /// is available then this pass will update the RegMask of the call instruction.
16 /// This updated RegMask will be used by the register allocator while allocating
17 /// the current MachineFunction.
18 ///
19 //===----------------------------------------------------------------------===//
20
21 #include "llvm/CodeGen/MachineBasicBlock.h"
22 #include "llvm/CodeGen/MachineFunctionPass.h"
23 #include "llvm/CodeGen/MachineInstr.h"
24 #include "llvm/CodeGen/MachineRegisterInfo.h"
25 #include "llvm/CodeGen/Passes.h"
26 #include "llvm/CodeGen/RegisterUsageInfo.h"
27 #include "llvm/IR/Module.h"
28 #include "llvm/PassAnalysisSupport.h"
29 #include "llvm/Support/Debug.h"
30 #include "llvm/Support/raw_ostream.h"
31 #include "llvm/Target/TargetMachine.h"
32 #include
33 #include
34
35 namespace llvm {
36 void initializeRegUsageInfoPropagationPassPass(PassRegistry &);
37 }
38
39 using namespace llvm;
40
41 #define DEBUG_TYPE "ip-regalloc"
42
43 #define RUIP_NAME "Register Usage Information Propagation"
44
45 namespace {
46 class RegUsageInfoPropagationPass : public MachineFunctionPass {
47
48 public:
49 RegUsageInfoPropagationPass() : MachineFunctionPass(ID) {
50 PassRegistry &Registry = *PassRegistry::getPassRegistry();
51 initializeRegUsageInfoPropagationPassPass(Registry);
52 }
53
54 const char *getPassName() const override { return RUIP_NAME; }
55
56 bool runOnMachineFunction(MachineFunction &MF) override;
57
58 void getAnalysisUsage(AnalysisUsage &AU) const override;
59
60 static char ID;
61
62 private:
63 static void setRegMask(MachineInstr &MI, const uint32_t *RegMask) {
64 for (MachineOperand &MO : MI.operands()) {
65 if (MO.isRegMask())
66 MO.setRegMask(RegMask);
67 }
68 }
69 };
70 } // end of anonymous namespace
71 char RegUsageInfoPropagationPass::ID = 0;
72
73 INITIALIZE_PASS_BEGIN(RegUsageInfoPropagationPass, "reg-usage-propagation",
74 RUIP_NAME, false, false)
75 INITIALIZE_PASS_DEPENDENCY(PhysicalRegisterUsageInfo)
76 INITIALIZE_PASS_END(RegUsageInfoPropagationPass, "reg-usage-propagation",
77 RUIP_NAME, false, false)
78
79 FunctionPass *llvm::createRegUsageInfoPropPass() {
80 return new RegUsageInfoPropagationPass();
81 }
82
83 void RegUsageInfoPropagationPass::getAnalysisUsage(AnalysisUsage &AU) const {
84 AU.addRequired();
85 AU.setPreservesAll();
86 MachineFunctionPass::getAnalysisUsage(AU);
87 }
88
89 bool RegUsageInfoPropagationPass::runOnMachineFunction(MachineFunction &MF) {
90 const Module *M = MF.getFunction()->getParent();
91 PhysicalRegisterUsageInfo *PRUI = &getAnalysis();
92
93 DEBUG(dbgs() << " ++++++++++++++++++++ " << getPassName()
94 << " ++++++++++++++++++++ \n");
95 DEBUG(dbgs() << "MachineFunction : " << MF.getName() << "\n");
96
97 bool Changed = false;
98
99 for (MachineBasicBlock &MBB : MF) {
100 for (MachineInstr &MI : MBB) {
101 if (!MI.isCall())
102 continue;
103 DEBUG(dbgs()
104 << "Call Instruction Before Register Usage Info Propagation : \n");
105 DEBUG(dbgs() << MI << "\n");
106
107 auto UpdateRegMask = [&](const Function *F) {
108 const auto *RegMask = PRUI->getRegUsageInfo(F);
109 if (!RegMask)
110 return;
111 setRegMask(MI, &(*RegMask)[0]);
112 Changed = true;
113 };
114
115 MachineOperand &Operand = MI.getOperand(0);
116 if (Operand.isGlobal())
117 UpdateRegMask(cast(Operand.getGlobal()));
118 else if (Operand.isSymbol())
119 UpdateRegMask(M->getFunction(Operand.getSymbolName()));
120
121 DEBUG(dbgs()
122 << "Call Instruction After Register Usage Info Propagation : \n");
123 DEBUG(dbgs() << MI << "\n");
124 }
125 }
126
127 DEBUG(dbgs() << " +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++"
128 "++++++ \n");
129 return Changed;
130 }
537537 void TargetPassConfig::addMachinePasses() {
538538 AddingMachinePasses = true;
539539
540 if (UseIPRA)
541 addPass(createRegUsageInfoPropPass());
542
540543 // Insert a machine instr printer pass after the specified pass.
541544 if (!StringRef(PrintMachineInstrs.getValue()).equals("") &&
542545 !StringRef(PrintMachineInstrs.getValue()).equals("option-unspecified")) {
0
1 ; RUN: llc < %s | FileCheck %s -check-prefix=NOIPRA
2 ; RUN: llc -enable-ipra < %s | FileCheck %s
3
4
5 target triple = "x86_64-unknown-unknown"
6 define void @bar1() {
7 ret void
8 }
9 define preserve_allcc void @foo()#0 {
10 ; Due to preserve_allcc foo() will save some registers at start of foo()
11 ; prefix NOIPRA will verify that.
12 ; NOIPRA-LABEL: foo:
13 ; NOIPRA: pushq %r10
14 ; NOIPRA-NEXT: pushq %r9
15 ; NOIPRA-NEXT: pushq %r8
16 ; NOIPRA: callq bar1
17 ; When IPRA is present above registers will not be saved and that is verified
18 ; by prefix CHECK.
19 ; CHECK: foo:
20 ; CHECK-NOT: pushq %r10
21 ; CHECK-NOT: pushq %r9
22 ; CHECK-NOT: pushq %r8
23 ; CHECK: callq bar1
24 call void @bar1()
25 call void @bar2()
26 ret void
27 }
28 define void @bar2() {
29 ret void
30 }
31 attributes #0 = {nounwind}