llvm.org GIT mirror llvm / 1338612
Enable the instruction printer in HexagonMCTargetDesc This adds the MCInstPrinter to the LLVMHexagonDesc library and removes the dependency LLVMHexagonAsmPrinter had on LLVMHexagonDesc. This is a prerequisite needed by the disassembler. Phabricator Revision: http://reviews.llvm.org/D5734 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219826 91177308-0d34-0410-b5e6-96231b3b80d8 Sid Manning 5 years ago
4 changed file(s) with 64 addition(s) and 4 deletion(s). Raw diff Collapse all Expand all
2828 #include "HexagonGenAsmWriter.inc"
2929
3030 const char HexagonInstPrinter::PacketPadding = '\t';
31 // Return the minimum value that a constant extendable operand can have
32 // without being extended.
33 static int getMinValue(uint64_t TSFlags) {
34 unsigned isSigned =
35 (TSFlags >> HexagonII::ExtentSignedPos) & HexagonII::ExtentSignedMask;
36 unsigned bits =
37 (TSFlags >> HexagonII::ExtentBitsPos) & HexagonII::ExtentBitsMask;
38
39 if (isSigned)
40 return -1U << (bits - 1);
41 else
42 return 0;
43 }
44
45 // Return the maximum value that a constant extendable operand can have
46 // without being extended.
47 static int getMaxValue(uint64_t TSFlags) {
48 unsigned isSigned =
49 (TSFlags >> HexagonII::ExtentSignedPos) & HexagonII::ExtentSignedMask;
50 unsigned bits =
51 (TSFlags >> HexagonII::ExtentBitsPos) & HexagonII::ExtentBitsMask;
52
53 if (isSigned)
54 return ~(-1U << (bits - 1));
55 else
56 return ~(-1U << bits);
57 }
58
59 // Return true if the instruction must be extended.
60 static bool isExtended(uint64_t TSFlags) {
61 return (TSFlags >> HexagonII::ExtendedPos) & HexagonII::ExtendedMask;
62 }
63
64 // Return true if the instruction may be extended based on the operand value.
65 static bool isExtendable(uint64_t TSFlags) {
66 return (TSFlags >> HexagonII::ExtendablePos) & HexagonII::ExtendableMask;
67 }
3168
3269 StringRef HexagonInstPrinter::getOpcodeName(unsigned Opcode) const {
3370 return MII.getName(Opcode);
115152
116153 void HexagonInstPrinter::printExtOperand(const MCInst *MI, unsigned OpNo,
117154 raw_ostream &O) const {
118 const HexagonMCInst *HMCI = static_cast(MI);
119 if (HMCI->isConstExtended())
155 const MCOperand &MO = MI->getOperand(OpNo);
156 const MCInstrDesc &MII = getMII().get(MI->getOpcode());
157
158 assert((isExtendable(MII.TSFlags) || isExtended(MII.TSFlags)) &&
159 "Expecting an extendable operand");
160
161 if (MO.isExpr() || isExtended(MII.TSFlags)) {
120162 O << "#";
163 } else if (MO.isImm()) {
164 int ImmValue = MO.getImm();
165 if (ImmValue < getMinValue(MII.TSFlags) ||
166 ImmValue > getMaxValue(MII.TSFlags))
167 O << "#";
168 }
121169 printOperand(MI, OpNo, O);
122170 }
123171
1818 type = Library
1919 name = HexagonAsmPrinter
2020 parent = Hexagon
21 required_libraries = HexagonDesc MC Support
21 required_libraries = MC Support
2222 add_to_library_groups = Hexagon
7373 X->InitMCCodeGenInfo(Reloc::Static, CM, OL);
7474 return X;
7575 }
76 static MCInstPrinter *createHexagonMCInstPrinter(const Target &T,
77 unsigned SyntaxVariant,
78 const MCAsmInfo &MAI,
79 const MCInstrInfo &MII,
80 const MCRegisterInfo &MRI,
81 const MCSubtargetInfo &STI) {
82 return new HexagonInstPrinter(MAI, MII, MRI);
83 }
7684
7785 // Force static initialization.
7886 extern "C" void LLVMInitializeHexagonTargetMC() {
98106 // Register the MC Code Emitter
99107 TargetRegistry::RegisterMCCodeEmitter(TheHexagonTarget,
100108 createHexagonMCCodeEmitter);
109
110 // Register the MC Inst Printer
111 TargetRegistry::RegisterMCInstPrinter(TheHexagonTarget,
112 createHexagonMCInstPrinter);
101113 }
1818 type = Library
1919 name = HexagonDesc
2020 parent = Hexagon
21 required_libraries = HexagonInfo MC Support
21 required_libraries = HexagonAsmPrinter HexagonInfo MC Support
2222 add_to_library_groups = Hexagon