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Merging r168320: into 3.2 relase branch. Handle mixed normal and early-clobber defs on inline asm. PR14376. git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_32@168527 91177308-0d34-0410-b5e6-96231b3b80d8 Pawel Wodnicki 6 years ago
2 changed file(s) with 17 addition(s) and 2 deletion(s). Raw diff Collapse all Expand all
5858 return VNI;
5959 }
6060 if (SlotIndex::isSameInstr(Def, I->start)) {
61 assert(I->start == Def && "Cannot insert def, already live");
62 assert(I->valno->def == Def && "Inconsistent existing value def");
61 assert(I->valno->def == I->start && "Inconsistent existing value def");
62
63 // It is possible to have both normal and early-clobber defs of the same
64 // register on an instruction. It doesn't make a lot of sense, but it is
65 // possible to specify in inline assembly.
66 //
67 // Just convert everything to early-clobber.
68 Def = std::min(Def, I->start);
69 if (Def != I->start)
70 I->start = I->valno->def = Def;
6371 return I->valno;
6472 }
6573 assert(SlotIndex::isEarlierInstr(Def, I->start) && "Already live at def");
5151 %0 = call { i32, i32, i32, i32, i32 } asm sideeffect "", "=&r,=&r,=&r,=&r,=&q,r,~{ecx},~{memory},~{dirflag},~{fpsr},~{flags}"(i8* %h) nounwind
5252 ret void
5353 }
54
55 ; Mix normal and EC defs of the same register.
56 define i32 @pr14376() nounwind noinline {
57 entry:
58 %asm = tail call i32 asm sideeffect "", "={ax},i,~{eax},~{flags},~{rax}"(i64 61) nounwind
59 ret i32 %asm
60 }