llvm.org GIT mirror llvm / 12783d1
MC/X86: Add stub AsmBackend. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96763 91177308-0d34-0410-b5e6-96231b3b80d8 Daniel Dunbar 10 years ago
5 changed file(s) with 50 addition(s) and 3 deletion(s). Raw diff Collapse all Expand all
1717 MCStreamer.cpp
1818 MCSymbol.cpp
1919 MCValue.cpp
20 TargetAsmBackend.cpp
2021 )
1414 tablegen(X86GenSubtarget.inc -gen-subtarget)
1515
1616 set(sources
17 X86AsmBackend.cpp
1718 X86CodeEmitter.cpp
1819 X86COFFMachineModuleInfo.cpp
1920 X86ELFWriterInfo.cpp
1818
1919 namespace llvm {
2020
21 class X86TargetMachine;
2221 class FunctionPass;
23 class MachineCodeEmitter;
22 class JITCodeEmitter;
23 class MCAssembler;
2424 class MCCodeEmitter;
2525 class MCContext;
26 class JITCodeEmitter;
26 class MachineCodeEmitter;
2727 class Target;
28 class TargetAsmBackend;
29 class X86TargetMachine;
2830 class formatted_raw_ostream;
2931
3032 /// createX86ISelDag - This pass converts a legalized DAG into a
5456 MCCodeEmitter *createX86_64MCCodeEmitter(const Target &, TargetMachine &TM,
5557 MCContext &Ctx);
5658
59 TargetAsmBackend *createX86_32AsmBackend(const Target &, MCAssembler &);
60 TargetAsmBackend *createX86_64AsmBackend(const Target &, MCAssembler &);
61
5762 /// createX86EmitCodeToMemory - Returns a pass that converts a register
5863 /// allocated function into raw machine code in a dynamically
5964 /// allocated chunk of memory.
0 //===-- X86AsmBackend.cpp - X86 Assembler Backend -------------------------===//
1 //
2 // The LLVM Compiler Infrastructure
3 //
4 // This file is distributed under the University of Illinois Open Source
5 // License. See LICENSE.TXT for details.
6 //
7 //===----------------------------------------------------------------------===//
8
9 #include "llvm/Target/TargetAsmBackend.h"
10 #include "X86.h"
11 #include "llvm/Target/TargetRegistry.h"
12 #include "llvm/Target/TargetAsmBackend.h"
13 using namespace llvm;
14
15 namespace {
16
17 class X86AsmBackend : public TargetAsmBackend {
18 public:
19 X86AsmBackend(const Target &T, MCAssembler &A)
20 : TargetAsmBackend(T) {}
21 };
22
23 }
24
25 TargetAsmBackend *llvm::createX86_32AsmBackend(const Target &T,
26 MCAssembler &A) {
27 return new X86AsmBackend(T, A);
28 }
29
30 TargetAsmBackend *llvm::createX86_64AsmBackend(const Target &T,
31 MCAssembler &A) {
32 return new X86AsmBackend(T, A);
33 }
5050 createX86_32MCCodeEmitter);
5151 TargetRegistry::RegisterCodeEmitter(TheX86_64Target,
5252 createX86_64MCCodeEmitter);
53
54 // Register the asm backend.
55 TargetRegistry::RegisterAsmBackend(TheX86_32Target,
56 createX86_32AsmBackend);
57 TargetRegistry::RegisterAsmBackend(TheX86_64Target,
58 createX86_64AsmBackend);
5359 }
5460
5561