llvm.org GIT mirror llvm / 1144af3
Fix integer undefined behavior due to signed left shift overflow in LLVM. Reviewed offline by chandlerc. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162623 91177308-0d34-0410-b5e6-96231b3b80d8 Richard Smith 7 years ago
19 changed file(s) with 59 addition(s) and 56 deletion(s). Raw diff Collapse all Expand all
171171 unsigned BitPos = Prev % BITWORD_SIZE;
172172 BitWord Copy = Bits[WordPos];
173173 // Mask off previous bits.
174 Copy &= ~0L << BitPos;
174 Copy &= ~0UL << BitPos;
175175
176176 if (Copy != 0) {
177177 if (sizeof(BitWord) == 4)
450450 // Then set any stray high bits of the last used word.
451451 unsigned ExtraBits = Size % BITWORD_SIZE;
452452 if (ExtraBits) {
453 Bits[UsedWords-1] &= ~(~0L << ExtraBits);
454 Bits[UsedWords-1] |= (0 - (BitWord)t) << ExtraBits;
453 BitWord ExtraBitMask = ~0UL << ExtraBits;
454 if (t)
455 Bits[UsedWords-1] |= ExtraBitMask;
456 else
457 Bits[UsedWords-1] &= ~ExtraBitMask;
455458 }
456459 }
457460
3030 template
3131 struct DenseMapInfo {
3232 static inline T* getEmptyKey() {
33 intptr_t Val = -1;
33 uintptr_t Val = static_cast(-1);
3434 Val <<= PointerLikeTypeTraits::NumLowBitsAvailable;
3535 return reinterpret_cast(Val);
3636 }
3737 static inline T* getTombstoneKey() {
38 intptr_t Val = -2;
38 uintptr_t Val = static_cast(-2);
3939 Val <<= PointerLikeTypeTraits::NumLowBitsAvailable;
4040 return reinterpret_cast(Val);
4141 }
104104 // Provide DenseMapInfo for longs.
105105 template<> struct DenseMapInfo {
106106 static inline long getEmptyKey() {
107 return (1UL << (sizeof(long) * 8 - 1)) - 1L;
107 return (1UL << (sizeof(long) * 8 - 1)) - 1UL;
108108 }
109109 static inline long getTombstoneKey() { return getEmptyKey() - 1L; }
110110 static unsigned getHashValue(const long& Val) {
134134 struct DenseMapInfo > {
135135 typedef PointerIntPair Ty;
136136 static Ty getEmptyKey() {
137 intptr_t Val = -1;
137 uintptr_t Val = static_cast(-1);
138138 Val <<= PointerLikeTypeTraits::NumLowBitsAvailable;
139139 return Ty(reinterpret_cast(Val), IntType((1 << IntBits)-1));
140140 }
141141 static Ty getTombstoneKey() {
142 intptr_t Val = -2;
142 uintptr_t Val = static_cast(-2);
143143 Val <<= PointerLikeTypeTraits::NumLowBitsAvailable;
144144 return Ty(reinterpret_cast(Val), IntType(0));
145145 }
157157 && "Word Position outside of element");
158158
159159 // Mask off previous bits.
160 Copy &= ~0L << BitPos;
160 Copy &= ~0UL << BitPos;
161161
162162 if (Copy != 0) {
163163 if (sizeof(BitWord) == 4)
420420 int64_t getOffset() const {
421421 assert((isGlobal() || isSymbol() || isCPI() || isTargetIndex() ||
422422 isBlockAddress()) && "Wrong MachineOperand accessor");
423 return (int64_t(Contents.OffsetedInfo.OffsetHi) << 32) |
423 return int64_t(uint64_t(Contents.OffsetedInfo.OffsetHi) << 32) |
424424 SmallContents.OffsetLo;
425425 }
426426
462462 return int32_t(x << (32 - B)) >> (32 - B);
463463 }
464464
465 /// \brief Sign extend number in the bottom B bits of X to a 32-bit int.
466 /// Requires 0 < B <= 32.
467 inline int32_t SignExtend32(uint32_t X, unsigned B) {
468 return int32_t(X << (32 - B)) >> (32 - B);
469 }
470
465471 /// SignExtend64 - Sign extend B-bit number x to 64-bit int.
466472 /// Usage int64_t r = SignExtend64<5>(x);
467473 template inline int64_t SignExtend64(uint64_t x) {
468474 return int64_t(x << (64 - B)) >> (64 - B);
469475 }
470476
477 /// \brief Sign extend number in the bottom B bits of X to a 64-bit int.
478 /// Requires 0 < B <= 64.
479 inline int64_t SignExtend64(uint64_t X, unsigned B) {
480 return int64_t(X << (64 - B)) >> (64 - B);
481 }
482
471483 } // End llvm namespace
472484
473485 #endif
16131613 // right.
16141614 unsigned PtrSize = TD.getPointerSizeInBits();
16151615 if (PtrSize < 64)
1616 Offset = (Offset << (64-PtrSize)) >> (64-PtrSize);
1616 Offset = SignExtend64(Offset, PtrSize);
16171617
16181618 return GetPointerBaseWithConstantOffset(GEP->getPointerOperand(), Offset, TD);
16191619 }
14741474 return Base;
14751475
14761476 // Truncate/sext the offset to the pointer size.
1477 if (TD.getPointerSizeInBits() != 64) {
1478 int SExtAmount = 64-TD.getPointerSizeInBits();
1479 Offset = (Offset << SExtAmount) >> SExtAmount;
1480 }
1477 unsigned Width = TD.getPointerSizeInBits();
1478 if (Width < 64)
1479 Offset = SignExtend64(Offset, Width);
14811480
14821481 return MCBinaryExpr::CreateAdd(Base, MCConstantExpr::Create(Offset, Ctx),
14831482 Ctx);
10961096 "Cannot set target flags on target-independent globals");
10971097
10981098 // Truncate (with sign-extension) the offset value to the pointer size.
1099 EVT PTy = TLI.getPointerTy();
1100 unsigned BitWidth = PTy.getSizeInBits();
1099 unsigned BitWidth = TLI.getPointerTy().getSizeInBits();
11011100 if (BitWidth < 64)
1102 Offset = (Offset << (64 - BitWidth) >> (64 - BitWidth));
1101 Offset = SignExtend64(Offset, BitWidth);
11031102
11041103 const GlobalVariable *GVar = dyn_cast(GV);
11051104 if (!GVar) {
6868 #define SETUP(v) ((v) = 0)
6969 #define onestate long
7070 #define INIT(o, n) ((o) = (unsigned long)1 << (n))
71 #define INC(o) ((o) <<= 1)
71 #define INC(o) ((o) = (unsigned long)(o) << 1)
7272 #define ISSTATEIN(v, o) (((v) & (o)) != 0)
7373 /* some abbreviations; note that some of these know variable names! */
7474 /* do "if I'm here, I can also be there" etc without branches */
31693169 int imm = Val & 0xFF;
31703170
31713171 if (!(Val & 0x100)) imm *= -1;
3172 Inst.addOperand(MCOperand::CreateImm(imm << 2));
3172 Inst.addOperand(MCOperand::CreateImm(imm * 4));
31733173 }
31743174
31753175 return MCDisassembler::Success;
129129 void
130130 printS10ImmOperand(const MachineInstr *MI, unsigned OpNo, raw_ostream &O)
131131 {
132 short value = (short) (((int) MI->getOperand(OpNo).getImm() << 16)
133 >> 16);
132 short value = MI->getOperand(OpNo).getImm();
134133 assert((value >= -(1 << 9) && value <= (1 << 9) - 1)
135134 && "Invalid s10 argument");
136135 O << value;
139138 void
140139 printU10ImmOperand(const MachineInstr *MI, unsigned OpNo, raw_ostream &O)
141140 {
142 short value = (short) (((int) MI->getOperand(OpNo).getImm() << 16)
143 >> 16);
141 short value = MI->getOperand(OpNo).getImm();
144142 assert((value <= (1 << 10) - 1) && "Invalid u10 argument");
145143 O << value;
146144 }
8282 return true;
8383 } else if (vt == MVT::i32) {
8484 int32_t i_val = (int32_t) CN->getZExtValue();
85 short s_val = (short) i_val;
86 return i_val == s_val;
85 return i_val == SignExtend32<16>(i_val);
8786 } else {
8887 int64_t i_val = (int64_t) CN->getZExtValue();
89 short s_val = (short) i_val;
90 return i_val == s_val;
88 return i_val == SignExtend64<16>(i_val);
9189 }
9290 }
9391
9896 EVT vt = FPN->getValueType(0);
9997 if (vt == MVT::f32) {
10098 int val = FloatToBits(FPN->getValueAPF().convertToFloat());
101 int sval = (int) ((val << 16) >> 16);
102 Imm = (short) val;
103 return val == sval;
99 if (val == SignExtend32<16>(val)) {
100 Imm = (short) val;
101 return true;
102 }
104103 }
105104
106105 return false;
9090
9191 // Sign-extend and shift operand of ADDiu and see if it still fits in 16-bit.
9292 int64_t Imm = SignExtend64<16>(Seq[0].ImmOpnd);
93 int64_t ShiftedImm = Imm << (Seq[1].ImmOpnd - 16);
93 int64_t ShiftedImm = (uint64_t)Imm << (Seq[1].ImmOpnd - 16);
9494
9595 if (!isInt<16>(ShiftedImm))
9696 return;
136136 void PPCInstPrinter::printS5ImmOperand(const MCInst *MI, unsigned OpNo,
137137 raw_ostream &O) {
138138 char Value = MI->getOperand(OpNo).getImm();
139 Value = (Value << (32-5)) >> (32-5);
139 Value = SignExtend32<5>(Value);
140140 O << (int)Value;
141141 }
142142
810810 }
811811
812812 // Properly sign extend the value.
813 int ShAmt = (4-ByteSize)*8;
814 int MaskVal = ((int)Value << ShAmt) >> ShAmt;
813 int MaskVal = SignExtend32(Value, ByteSize * 8);
815814
816815 // If this is zero, don't match, zero matches ISD::isBuildVectorAllZeros.
817816 if (MaskVal == 0) return SDValue();
818817
819818 // Finally, if this value fits in a 5 bit sext field, return it
820 if (((MaskVal << (32-5)) >> (32-5)) == MaskVal)
819 if (SignExtend32<5>(MaskVal) == MaskVal)
821820 return DAG.getTargetConstant(MaskVal, MVT::i32);
822821 return SDValue();
823822 }
24232422
24242423 int Addr = C->getZExtValue();
24252424 if ((Addr & 3) != 0 || // Low 2 bits are implicitly zero.
2426 (Addr << 6 >> 6) != Addr)
2425 SignExtend32<26>(Addr) != Addr)
24272426 return 0; // Top 6 bits have to be sext of immediate.
24282427
24292428 return DAG.getConstant((int)C->getZExtValue() >> 2,
41414140 unsigned TypeShiftAmt = i & (SplatBitSize-1);
41424141
41434142 // vsplti + shl self.
4144 if (SextVal == (i << (int)TypeShiftAmt)) {
4143 if (SextVal == (int)((unsigned)i << TypeShiftAmt)) {
41454144 SDValue Res = BuildSplatI(i, SplatSize, MVT::Other, DAG, dl);
41464145 static const unsigned IIDs[] = { // Intrinsic to use for each size.
41474146 Intrinsic::ppc_altivec_vslb, Intrinsic::ppc_altivec_vslh, 0,
41864185 }
41874186
41884187 // t = vsplti c, result = vsldoi t, t, 1
4189 if (SextVal == ((i << 8) | (i < 0 ? 0xFF : 0))) {
4188 if (SextVal == (int)(((unsigned)i << 8) | (i < 0 ? 0xFF : 0))) {
41904189 SDValue T = BuildSplatI(i, SplatSize, MVT::v16i8, DAG, dl);
41914190 return BuildVSLDOI(T, T, 1, Op.getValueType(), DAG, dl);
41924191 }
41934192 // t = vsplti c, result = vsldoi t, t, 2
4194 if (SextVal == ((i << 16) | (i < 0 ? 0xFFFF : 0))) {
4193 if (SextVal == (int)(((unsigned)i << 16) | (i < 0 ? 0xFFFF : 0))) {
41954194 SDValue T = BuildSplatI(i, SplatSize, MVT::v16i8, DAG, dl);
41964195 return BuildVSLDOI(T, T, 2, Op.getValueType(), DAG, dl);
41974196 }
41984197 // t = vsplti c, result = vsldoi t, t, 3
4199 if (SextVal == ((i << 24) | (i < 0 ? 0xFFFFFF : 0))) {
4198 if (SextVal == (int)(((unsigned)i << 24) | (i < 0 ? 0xFFFFFF : 0))) {
42004199 SDValue T = BuildSplatI(i, SplatSize, MVT::v16i8, DAG, dl);
42014200 return BuildVSLDOI(T, T, 3, Op.getValueType(), DAG, dl);
42024201 }
199199 insn->readerCursor + offset); \
200200 if (ret) \
201201 return ret; \
202 combined = combined | ((type)byte << ((type)offset * 8)); \
202 combined = combined | ((uint64_t)byte << (offset * 8)); \
203203 } \
204204 *ptr = combined; \
205205 insn->readerCursor += sizeof(type); \
10101010 AM.IndexReg = ShVal.getNode()->getOperand(0);
10111011 ConstantSDNode *AddVal =
10121012 cast(ShVal.getNode()->getOperand(1));
1013 uint64_t Disp = AddVal->getSExtValue() << Val;
1013 uint64_t Disp = (uint64_t)AddVal->getSExtValue() << Val;
10141014 if (!FoldOffsetIntoAddress(Disp, AM))
10151015 return false;
10161016 }
21152115
21162116 // Make sure that we don't change the operation by removing bits.
21172117 // This only matters for OR and XOR, AND is unaffected.
2118 if (Opcode != ISD::AND && ((Val >> ShlVal) << ShlVal) != Val)
2118 uint64_t RemovedBitsMask = (1ULL << ShlVal) - 1;
2119 if (Opcode != ISD::AND && (Val & RemovedBitsMask) != 0)
21192120 break;
21202121
21212122 unsigned ShlOp, Op;
14091409 // Make sure that the value is representable for this type.
14101410 if (Size >= 32) return MadeChange;
14111411
1412 int Val = (II->getValue() << (32-Size)) >> (32-Size);
1413 if (Val == II->getValue()) return MadeChange;
1414
1415 // If sign-extended doesn't fit, does it fit as unsigned?
1416 unsigned ValueMask;
1417 unsigned UnsignedVal;
1418 ValueMask = unsigned(~uint32_t(0UL) >> (32-Size));
1419 UnsignedVal = unsigned(II->getValue());
1420
1421 if ((ValueMask & UnsignedVal) == UnsignedVal)
1412 // Check that the value doesn't use more bits than we have. It must either
1413 // be a sign- or zero-extended equivalent of the original.
1414 int64_t SignBitAndAbove = II->getValue() >> (Size - 1);
1415 if (SignBitAndAbove == -1 || SignBitAndAbove == 0 || SignBitAndAbove == 1)
14221416 return MadeChange;
14231417
1424 TP.error("Integer value '" + itostr(II->getValue())+
1418 TP.error("Integer value '" + itostr(II->getValue()) +
14251419 "' is out of range for type '" + getEnumName(getType(0)) + "'!");
14261420 return MadeChange;
14271421 }
33993393 DEBUG(errs() << "\n");
34003394 }
34013395 }
3402