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[PPC] Adjust some PowerPC tests to account for presence/absence of VSX Patch by Bill Seurer; committed on his behalf. These test cases generate slightly different code sequences when VSX is activated and thus fail. The update turns off VSX explicitly for the existing checks and then adds a second set of checks for most of them that test the VSX instruction output. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@220019 91177308-0d34-0410-b5e6-96231b3b80d8 Bill Schmidt 5 years ago
19 changed file(s) with 243 addition(s) and 37 deletion(s). Raw diff Collapse all Expand all
None ; RUN: llc < %s | grep stfd | count 3
1 ; RUN: llc < %s | grep stfs | count 1
2 ; RUN: llc < %s | grep lfd | count 2
3 ; RUN: llc < %s | grep lfs | count 2
0 ; RUN: llc -mattr=-vsx < %s | grep stfd | count 3
1 ; RUN: llc -mattr=-vsx < %s | grep stfs | count 1
2 ; RUN: llc -mattr=-vsx < %s | grep lfd | count 2
3 ; RUN: llc -mattr=-vsx < %s | grep lfs | count 2
4 ; RUN: llc -mattr=+vsx < %s | grep stxsdx | count 3
5 ; RUN: llc -mattr=+vsx < %s | grep stfs | count 1
6 ; RUN: llc -mattr=+vsx < %s | grep lxsdx | count 2
7 ; RUN: llc -mattr=+vsx < %s | grep lfs | count 2
48 ; ModuleID = 'foo.c'
59 target datalayout = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f128:64:128"
610 target triple = "powerpc-apple-darwin8"
None ; RUN: llc -mattr=+altivec < %s | FileCheck %s
0 ; RUN: llc -mattr=-vsx -mattr=+altivec < %s | FileCheck %s
1 ; RUN: llc -mattr=+vsx -mattr=+altivec < %s | FileCheck -check-prefix=CHECK-VSX %s
12 target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32:64"
23 target triple = "powerpc64-unknown-linux-gnu"
34
1718 ; CHECK: lwz 3, -16(1)
1819 ; CHECK: blr
1920
21 ; CHECK-VSX: addi [[REGISTER:[0-9]+]], 1, -16
22 ; CHECK-VSX: stxvd2x 34, 0, [[REGISTER]]
23 ; CHECK-VSX: lwz 3, -16(1)
24 ; CHECK-VSX: blr
None ; RUN: llc < %s -march=ppc32 -mattr=+altivec --enable-unsafe-fp-math | FileCheck %s
0 ; RUN: llc < %s -mattr=-vsx -march=ppc32 -mattr=+altivec --enable-unsafe-fp-math | FileCheck %s
1 ; RUN: llc < %s -mattr=+vsx -march=ppc32 -mattr=+altivec --enable-unsafe-fp-math | FileCheck -check-prefix=CHECK-VSX %s
12
23 define void @VXOR(<4 x float>* %P1, <4 x i32>* %P2, <4 x float>* %P3) {
34 %tmp = load <4 x float>* %P3 ; <<4 x float>> [#uses=1]
1314 ; CHECK: @VXOR
1415 ; CHECK: vsplti
1516 ; CHECK: vxor
17 ; CHECK-VSX: @VXOR
18 ; CHECK-VSX: vxor
19 ; CHECK-VSX: xvmulsp
1620
1721 define void @VSPLTI(<4 x i32>* %P2, <8 x i16>* %P3) {
1822 store <4 x i32> bitcast (<16 x i8> < i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1 > to <4 x i32>), <4 x i32>* %P2
2125 }
2226 ; CHECK: @VSPLTI
2327 ; CHECK: vsplti
28 ; CHECK-VSX: @VSPLTI
29 ; CHECK-VSX: vsplti
None ; RUN: llc -mcpu=pwr7 -mtriple=powerpc64-unknown-linux-gnu < %s | FileCheck %s
0 ; RUN: llc -mcpu=pwr7 -mtriple=powerpc64-unknown-linux-gnu -mattr=-vsx < %s | FileCheck %s
1 ; RUN: llc -mcpu=pwr7 -mtriple=powerpc64-unknown-linux-gnu -mattr=+vsx < %s | FileCheck %s -check-prefix=CHECK-VSX
12 target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128-v128:128:128-n32:64"
23 target triple = "powerpc64-unknown-linux-gnu"
34
1011 ; CHECK-LABEL: @foo_d_ll
1112 ; CHECK: fcpsgn 1, 3, 1
1213 ; CHECK: blr
14 ; CHECK-VSX-LABEL: @foo_d_ll
15 ; CHECK-VSX: xscpsgndp 1, 3, 1
16 ; CHECK-VSX: blr
1317 }
1418
1519 declare ppc_fp128 @copysignl(ppc_fp128, ppc_fp128) #0
2327 ; CHECK-LABEL: @foo_dl
2428 ; CHECK: fcpsgn 1, 2, 1
2529 ; CHECK: blr
30 ; CHECK-VSX-LABEL: @foo_dl
31 ; CHECK-VSX: xscpsgndp 1, 2, 1
32 ; CHECK-VSX: blr
2633 }
2734
2835 declare double @copysign(double, double) #0
3643 ; CHECK-LABEL: @foo_ll
3744 ; CHECK: bl copysignl
3845 ; CHECK: blr
46 ; CHECK-VSX-LABEL: @foo_ll
47 ; CHECK-VSX: bl copysignl
48 ; CHECK-VSX: blr
3949 }
4050
4151 define ppc_fp128 @foo_ld(double %a, double %b) #0 {
4858 ; CHECK-LABEL: @foo_ld
4959 ; CHECK: bl copysignl
5060 ; CHECK: blr
61 ; CHECK-VSX-LABEL: @foo_ld
62 ; CHECK-VSX: bl copysignl
63 ; CHECK-VSX: blr
5164 }
5265
5366 define ppc_fp128 @foo_lf(double %a, float %b) #0 {
6073 ; CHECK-LABEL: @foo_lf
6174 ; CHECK: bl copysignl
6275 ; CHECK: blr
76 ; CHECK-VSX-LABEL: @foo_lf
77 ; CHECK-VSX: bl copysignl
78 ; CHECK-VSX: blr
6379 }
6480
6581 attributes #0 = { nounwind readnone }
None ; RUN: llc < %s -march=ppc32 -mtriple=powerpc-apple-darwin | grep "fabs f1, f1"
0 ; RUN: llc < %s -mattr=-vsx -march=ppc32 -mtriple=powerpc-apple-darwin | grep "fabs f1, f1"
1 ; RUN: llc < %s -mattr=+vsx -march=ppc32 -mtriple=powerpc-apple-darwin | grep "xsabsdp f1, f1"
12
23 define double @fabs(double %f) {
34 entry:
None ; RUN: llc -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7 < %s | FileCheck %s
0 ; RUN: llc -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7 -mattr=-vsx < %s | FileCheck %s
1 ; RUN: llc -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7 -mattr=+vsx < %s | FileCheck -check-prefix=CHECK-VSX %s
12 target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128-v128:128:128-n32:64"
23 target triple = "powerpc64-unknown-linux-gnu"
34
910 ; CHECK-LABEL: @foo_dd
1011 ; CHECK: fcpsgn 1, 2, 1
1112 ; CHECK: blr
13 ; CHECK-VSX-LABEL: @foo_dd
14 ; CHECK-VSX: xscpsgndp 1, 2, 1
15 ; CHECK-VSX: blr
1216 }
1317
1418 declare double @copysign(double, double) #0
2125 ; CHECK-LABEL: @foo_ss
2226 ; CHECK: fcpsgn 1, 2, 1
2327 ; CHECK: blr
28 ; CHECK-VSX-LABEL: @foo_ss
29 ; CHECK-VSX: fcpsgn 1, 2, 1
30 ; CHECK-VSX: blr
2431 }
2532
2633 declare float @copysignf(float, float) #0
3441 ; CHECK-LABEL: @foo_sd
3542 ; CHECK: fcpsgn 1, 2, 1
3643 ; CHECK: blr
44 ; CHECK-VSX-LABEL: @foo_sd
45 ; CHECK-VSX: fcpsgn 1, 2, 1
46 ; CHECK-VSX: blr
3747 }
3848
3949 define double @foo_ds(double %a, float %b) #0 {
4555 ; CHECK-LABEL: @foo_ds
4656 ; CHECK: fcpsgn 1, 2, 1
4757 ; CHECK: blr
58 ; CHECK-VSX-LABEL: @foo_ds
59 ; CHECK-VSX: fcpsgn 1, 2, 1
60 ; CHECK-VSX: blr
4861 }
4962
5063 attributes #0 = { nounwind readnone }
None ; RUN: llc < %s -march=ppc32 | grep fnabs
0 ; RUN: llc < %s -mattr=-vsx -march=ppc32 | grep fnabs
1 ; RUN: llc < %s -mattr=+vsx -march=ppc32 | grep xsnabsdp
12
23 declare double @fabs(double)
34
None ; RUN: llc < %s -march=ppc32 | grep fcmp | count 1
0 ; RUN: llc < %s -mattr=-vsx -march=ppc32 | grep fcmp | count 1
1 ; RUN: llc < %s -mattr=+vsx -march=ppc32 | grep xscmpudp | count 1
12
23 declare i1 @llvm.isunordered.f64(double, double)
34
None ; RUN: llc < %s -march=ppc32 | grep fctiwz | count 1
0 ; RUN: llc < %s -mattr=-vsx -march=ppc32 | grep fctiwz | count 1
1 ; RUN: llc < %s -mattr=+vsx -march=ppc32 | grep xscvdpsxws | count 1
2
13
24 define i16 @foo(float %a) {
35 entry:
None ; RUN: llc < %s -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7 | FileCheck %s
1 ; RUN: llc < %s -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7 -enable-no-infs-fp-math -enable-no-nans-fp-math | FileCheck -check-prefix=CHECK-FM %s
0 ; RUN: llc < %s -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7 -mattr=-vsx | FileCheck %s
1 ; RUN: llc < %s -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7 -enable-no-infs-fp-math -enable-no-nans-fp-math -mattr=-vsx | FileCheck -check-prefix=CHECK-FM %s
2 ; RUN: llc < %s -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7 -enable-no-infs-fp-math -enable-no-nans-fp-math -mattr=+vsx | FileCheck -check-prefix=CHECK-FM-VSX %s
23 target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128-v128:128:128-n32:64"
34 target triple = "powerpc64-unknown-linux-gnu"
45
1516 ; CHECK-FM: @zerocmp1
1617 ; CHECK-FM: fsel 1, 1, 2, 3
1718 ; CHECK-FM: blr
19
20 ; CHECK-FM-VSX: @zerocmp1
21 ; CHECK-FM-VSX: fsel 1, 1, 2, 3
22 ; CHECK-FM-VSX: blr
1823 }
1924
2025 define double @zerocmp2(double %a, double %y, double %z) #0 {
3136 ; CHECK-FM: fneg [[REG:[0-9]+]], 1
3237 ; CHECK-FM: fsel 1, [[REG]], 3, 2
3338 ; CHECK-FM: blr
39
40 ; CHECK-FM-VSX: @zerocmp2
41 ; CHECK-FM-VSX: xsnegdp [[REG:[0-9]+]], 1
42 ; CHECK-FM-VSX: fsel 1, [[REG]], 3, 2
43 ; CHECK-FM-VSX: blr
3444 }
3545
3646 define double @zerocmp3(double %a, double %y, double %z) #0 {
4858 ; CHECK-FM: fneg [[REG2:[0-9]+]], 1
4959 ; CHECK-FM: fsel 1, [[REG2]], [[REG]], 3
5060 ; CHECK-FM: blr
61
62 ; CHECK-FM-VSX: @zerocmp3
63 ; CHECK-FM-VSX: xsnegdp [[REG2:[0-9]+]], 1
64 ; CHECK-FM-VSX: fsel [[REG:[0-9]+]], 1, 2, 3
65 ; CHECK-FM-VSX: fsel 1, [[REG2]], [[REG]], 3
66 ; CHECK-FM-VSX: blr
5167 }
5268
5369 define double @min1(double %a, double %b) #0 {
6480 ; CHECK-FM: fsub [[REG:[0-9]+]], 2, 1
6581 ; CHECK-FM: fsel 1, [[REG]], 1, 2
6682 ; CHECK-FM: blr
83
84 ; CHECK-FM-VSX: @min1
85 ; CHECK-FM-VSX: xssubdp [[REG:[0-9]+]], 2, 1
86 ; CHECK-FM-VSX: fsel 1, [[REG]], 1, 2
87 ; CHECK-FM-VSX: blr
6788 }
6889
6990 define double @max1(double %a, double %b) #0 {
80101 ; CHECK-FM: fsub [[REG:[0-9]+]], 1, 2
81102 ; CHECK-FM: fsel 1, [[REG]], 1, 2
82103 ; CHECK-FM: blr
104
105 ; CHECK-FM-VSX: @max1
106 ; CHECK-FM-VSX: xssubdp [[REG:[0-9]+]], 1, 2
107 ; CHECK-FM-VSX: fsel 1, [[REG]], 1, 2
108 ; CHECK-FM-VSX: blr
83109 }
84110
85111 define double @cmp1(double %a, double %b, double %y, double %z) #0 {
96122 ; CHECK-FM: fsub [[REG:[0-9]+]], 1, 2
97123 ; CHECK-FM: fsel 1, [[REG]], 3, 4
98124 ; CHECK-FM: blr
125
126 ; CHECK-FM-VSX: @cmp1
127 ; CHECK-FM-VSX: xssubdp [[REG:[0-9]+]], 1, 2
128 ; CHECK-FM-VSX: fsel 1, [[REG]], 3, 4
129 ; CHECK-FM-VSX: blr
99130 }
100131
101132 define double @cmp2(double %a, double %b, double %y, double %z) #0 {
112143 ; CHECK-FM: fsub [[REG:[0-9]+]], 2, 1
113144 ; CHECK-FM: fsel 1, [[REG]], 4, 3
114145 ; CHECK-FM: blr
146
147 ; CHECK-FM-VSX: @cmp2
148 ; CHECK-FM-VSX: xssubdp [[REG:[0-9]+]], 2, 1
149 ; CHECK-FM-VSX: fsel 1, [[REG]], 4, 3
150 ; CHECK-FM-VSX: blr
115151 }
116152
117153 define double @cmp3(double %a, double %b, double %y, double %z) #0 {
130166 ; CHECK-FM: fneg [[REG3:[0-9]+]], [[REG]]
131167 ; CHECK-FM: fsel 1, [[REG3]], [[REG2]], 4
132168 ; CHECK-FM: blr
169
170 ; CHECK-FM-VSX: @cmp3
171 ; CHECK-FM-VSX: xssubdp [[REG:[0-9]+]], 1, 2
172 ; CHECK-FM-VSX: xsnegdp [[REG3:[0-9]+]], [[REG]]
173 ; CHECK-FM-VSX: fsel [[REG2:[0-9]+]], [[REG]], 3, 4
174 ; CHECK-FM-VSX: fsel 1, [[REG3]], [[REG2]], 4
175 ; CHECK-FM-VSX: blr
133176 }
134177
135178 attributes #0 = { nounwind readnone }
0 ; fsqrt should be generated when the fsqrt feature is enabled, but not
11 ; otherwise.
22
3 ; RUN: llc < %s -march=ppc32 -mtriple=powerpc-apple-darwin8 -mattr=+fsqrt | \
3 ; RUN: llc < %s -mattr=-vsx -march=ppc32 -mtriple=powerpc-apple-darwin8 -mattr=+fsqrt | \
44 ; RUN: grep "fsqrt f1, f1"
5 ; RUN: llc < %s -march=ppc32 -mtriple=powerpc-apple-darwin8 -mcpu=g5 | \
5 ; RUN: llc < %s -mattr=-vsx -march=ppc32 -mtriple=powerpc-apple-darwin8 -mcpu=g5 | \
66 ; RUN: grep "fsqrt f1, f1"
7 ; RUN: llc < %s -march=ppc32 -mtriple=powerpc-apple-darwin8 -mattr=-fsqrt | \
7 ; RUN: llc < %s -mattr=-vsx -march=ppc32 -mtriple=powerpc-apple-darwin8 -mattr=-fsqrt | \
88 ; RUN: not grep "fsqrt f1, f1"
9 ; RUN: llc < %s -march=ppc32 -mtriple=powerpc-apple-darwin8 -mcpu=g4 | \
9 ; RUN: llc < %s -mattr=-vsx -march=ppc32 -mtriple=powerpc-apple-darwin8 -mcpu=g4 | \
1010 ; RUN: not grep "fsqrt f1, f1"
1111
1212 declare double @llvm.sqrt.f64(double)
0 ; fcfid and fctid should be generated when the 64bit feature is enabled, but not
11 ; otherwise.
22
3 ; RUN: llc < %s -march=ppc32 -mattr=+64bit | \
3 ; RUN: llc < %s -mattr=-vsx -march=ppc32 -mattr=+64bit | \
44 ; RUN: grep fcfid
5 ; RUN: llc < %s -march=ppc32 -mattr=+64bit | \
5 ; RUN: llc < %s -mattr=-vsx -march=ppc32 -mattr=+64bit | \
66 ; RUN: grep fctidz
7 ; RUN: llc < %s -march=ppc32 -mcpu=g5 | \
7 ; RUN: llc < %s -mattr=-vsx -march=ppc32 -mcpu=g5 | \
88 ; RUN: grep fcfid
9 ; RUN: llc < %s -march=ppc32 -mcpu=g5 | \
9 ; RUN: llc < %s -mattr=-vsx -march=ppc32 -mcpu=g5 | \
1010 ; RUN: grep fctidz
11 ; RUN: llc < %s -march=ppc32 -mattr=-64bit | \
11 ; RUN: llc < %s -mattr=-vsx -march=ppc32 -mattr=-64bit | \
1212 ; RUN: not grep fcfid
13 ; RUN: llc < %s -march=ppc32 -mattr=-64bit | \
13 ; RUN: llc < %s -mattr=-vsx -march=ppc32 -mattr=-64bit | \
1414 ; RUN: not grep fctidz
15 ; RUN: llc < %s -march=ppc32 -mcpu=g4 | \
15 ; RUN: llc < %s -mattr=-vsx -march=ppc32 -mcpu=g4 | \
1616 ; RUN: not grep fcfid
17 ; RUN: llc < %s -march=ppc32 -mcpu=g4 | \
17 ; RUN: llc < %s -mattr=-vsx -march=ppc32 -mcpu=g4 | \
1818 ; RUN: not grep fctidz
19 ; RUN: llc < %s -mattr=+vsx -march=ppc32 -mattr=+64bit | \
20 ; RUN: grep xscvdpsxds
21 ; RUN: llc < %s -mattr=+vsx -march=ppc32 -mattr=+64bit | \
22 ; RUN: grep xscvsxddp
1923
2024 define double @X(double %Y) {
2125 %A = fptosi double %Y to i64 ; [#uses=1]
None ; RUN: llc -mcpu=pwr7 -O1 -code-model=medium <%s | FileCheck %s
0 ; RUN: llc -mcpu=pwr7 -O1 -code-model=medium -mattr=-vsx < %s | FileCheck %s
1 ; RUN: llc -mcpu=pwr7 -O1 -code-model=medium -mattr=+vsx < %s | FileCheck -check-prefix=CHECK-VSX %s
12
23 ; Test peephole optimization for medium code model (32-bit TOC offsets)
34 ; for loading a value from the constant pool (TOC-relative).
1516 ; CHECK-LABEL: test_double_const:
1617 ; CHECK: addis [[REG1:[0-9]+]], 2, [[VAR]]@toc@ha
1718 ; CHECK: lfd {{[0-9]+}}, [[VAR]]@toc@l([[REG1]])
19
20 ; CHECK-VSX: [[VAR:[a-z0-9A-Z_.]+]]:
21 ; CHECK-VSX: .quad 4562098671269285104
22 ; CHECK-VSX-LABEL: test_double_const:
23 ; CHECK-VSX: addis [[REG1:[0-9]+]], 2, [[VAR]]@toc@ha
24 ; CHECK-VSX: addi [[REG1]], {{[0-9]+}}, [[VAR]]@toc@l
25 ; CHECK-VSX: lxsdx {{[0-9]+}}, 0, [[REG1]]
None ; RUN: llc -mcpu=pwr7 -O0 -code-model=medium -fast-isel=false <%s | FileCheck -check-prefix=MEDIUM %s
1 ; RUN: llc -mcpu=pwr7 -O0 -code-model=large -fast-isel=false <%s | FileCheck -check-prefix=LARGE %s
0 ; RUN: llc -mcpu=pwr7 -O0 -code-model=medium -fast-isel=false -mattr=-vsx <%s | FileCheck -check-prefix=MEDIUM %s
1 ; RUN: llc -mcpu=pwr7 -O0 -code-model=medium -fast-isel=false -mattr=+vsx <%s | FileCheck -check-prefix=MEDIUM-VSX %s
2 ; RUN: llc -mcpu=pwr7 -O0 -code-model=large -fast-isel=false -mattr=-vsx <%s | FileCheck -check-prefix=LARGE %s
3 ; RUN: llc -mcpu=pwr7 -O0 -code-model=large -fast-isel=false -mattr=+vsx <%s | FileCheck -check-prefix=LARGE-VSX %s
24
35 ; Test correct code generation for medium and large code model
46 ; for loading a value from the constant pool (TOC-relative).
1820 ; MEDIUM: addi [[REG2:[0-9]+]], [[REG1]], [[VAR]]@toc@l
1921 ; MEDIUM: lfd {{[0-9]+}}, 0([[REG2]])
2022
23 ; MEDIUM-VSX: [[VAR:[a-z0-9A-Z_.]+]]:
24 ; MEDIUM-VSX: .quad 4562098671269285104
25 ; MEDIUM-VSX-LABEL: test_double_const:
26 ; MEDIUM-VSX: addis [[REG1:[0-9]+]], 2, [[VAR]]@toc@ha
27 ; MEDIUM-VSX: addi [[REG2:[0-9]+]], [[REG1]], [[VAR]]@toc@l
28 ; MEDIUM-VSX: lxsdx {{[0-9]+}}, 0, [[REG2]]
29
2130 ; LARGE: [[VAR:[a-z0-9A-Z_.]+]]:
2231 ; LARGE: .quad 4562098671269285104
2332 ; LARGE-LABEL: test_double_const:
2433 ; LARGE: addis [[REG1:[0-9]+]], 2, [[VAR2:[a-z0-9A-Z_.]+]]@toc@ha
2534 ; LARGE: ld [[REG2:[0-9]+]], [[VAR2]]@toc@l([[REG1]])
2635 ; LARGE: lfd {{[0-9]+}}, 0([[REG2]])
36
37 ; LARGE-VSX: [[VAR:[a-z0-9A-Z_.]+]]:
38 ; LARGE-VSX: .quad 4562098671269285104
39 ; LARGE-VSX-LABEL: test_double_const:
40 ; LARGE-VSX: addis [[REG1:[0-9]+]], 2, [[VAR2:[a-z0-9A-Z_.]+]]@toc@ha
41 ; LARGE-VSX: ld [[REG2:[0-9]+]], [[VAR2]]@toc@l([[REG1]])
42 ; LARGE-VSX: lxsdx {{[0-9]+}}, 0, [[REG2]]
None ; RUN: llc -mcpu=pwr7 -O0 -fast-isel=false < %s | FileCheck %s
0 ; RUN: llc -mcpu=pwr7 -O0 -fast-isel=false -mattr=-vsx < %s | FileCheck %s
1 ; RUN: llc -mcpu=pwr7 -O0 -fast-isel=false -mattr=+vsx < %s | FileCheck -check-prefix=CHECK-VSX %s
12
23 ; Verify internal alignment of long double in a struct. The double
34 ; argument comes in in GPR3; GPR4 is skipped; GPRs 5 and 6 contain
2324 ; CHECK: lfd 1, 64(1)
2425 ; CHECK: lfd 2, 72(1)
2526
27 ; CHECK-VSX: std 6, 72(1)
28 ; CHECK-VSX: std 5, 64(1)
29 ; CHECK-VSX: std 4, 56(1)
30 ; CHECK-VSX: std 3, 48(1)
31 ; CHECK-VSX: li 3, 16
32 ; CHECK-VSX: addi 4, 1, 48
33 ; CHECK-VSX: lxsdx 1, 4, 3
34 ; CHECK-VSX: li 3, 24
35 ; CHECK-VSX: lxsdx 2, 4, 3
None ; RUN: llc < %s -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7 | FileCheck %s
0 ; RUN: llc -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7 -mattr=-vsx < %s | FileCheck %s
1 ; RUN: llc -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7 -mattr=+vsx < %s | FileCheck -check-prefix=CHECK-VSX %s
12 target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128-v128:128:128-n32:64"
23 target triple = "powerpc64-unknown-linux-gnu"
34
78
89 ; CHECK-LABEL: test1:
910 ; CHECK: frim 1, 1
11 ; CHECK-VSX-LABEL: test1:
12 ; CHECK-VSX: frim 1, 1
1013 }
1114
1215 declare float @floorf(float) nounwind readnone
1720
1821 ; CHECK-LABEL: test2:
1922 ; CHECK: frim 1, 1
23 ; CHECK-VSX-LABEL: test2:
24 ; CHECK-VSX: xsrdpim 1, 1
2025 }
2126
2227 declare double @floor(double) nounwind readnone
2732
2833 ; CHECK-LABEL: test3:
2934 ; CHECK: frin 1, 1
35 ; CHECK-VSX-LABEL: test3:
36 ; CHECK-VSX: frin 1, 1
3037 }
3138
3239 declare float @roundf(float) nounwind readnone
3744
3845 ; CHECK-LABEL: test4:
3946 ; CHECK: frin 1, 1
47 ; CHECK-VSX-LABEL: test4:
48 ; CHECK-VSX: xsrdpi 1, 1
4049 }
4150
4251 declare double @round(double) nounwind readnone
4756
4857 ; CHECK-LABEL: test5:
4958 ; CHECK: frip 1, 1
59 ; CHECK-VSX-LABEL: test5:
60 ; CHECK-VSX: frip 1, 1
5061 }
5162
5263 declare float @ceilf(float) nounwind readnone
5768
5869 ; CHECK-LABEL: test6:
5970 ; CHECK: frip 1, 1
71 ; CHECK-VSX-LABEL: test6:
72 ; CHECK-VSX: xsrdpip 1, 1
6073 }
6174
6275 declare double @ceil(double) nounwind readnone
6780
6881 ; CHECK-LABEL: test9:
6982 ; CHECK: friz 1, 1
83 ; CHECK-VSX-LABEL: test9:
84 ; CHECK-VSX: friz 1, 1
7085 }
7186
7287 declare float @truncf(float) nounwind readnone
7792
7893 ; CHECK-LABEL: test10:
7994 ; CHECK: friz 1, 1
95 ; CHECK-VSX-LABEL: test10:
96 ; CHECK-VSX: xsrdpiz 1, 1
8097 }
8198
8299 declare double @trunc(double) nounwind readnone
None ; RUN: llc < %s -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7 | FileCheck %s
0 ; RUN: llc < %s -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7 -mattr=-vsx | FileCheck %s
1 target datalayout = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f128:64:128-n32"
2 ; RUN: llc < %s -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7 -mattr=+vsx | FileCheck -check-prefix=CHECK-VSX %s
13 target datalayout = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f128:64:128-n32"
24
35 define void @foo1(i16* %p, i16* %r) nounwind {
911 ; CHECK: @foo1
1012 ; CHECK: lhz
1113 ; CHECK: sth
14
15 ; CHECK-VSX: @foo1
16 ; CHECK-VSX: lhz
17 ; CHECK-VSX: sth
1218 }
1319
1420 define void @foo2(i32* %p, i32* %r) nounwind {
2026 ; CHECK: @foo2
2127 ; CHECK: lwz
2228 ; CHECK: stw
29
30 ; CHECK-VSX: @foo2
31 ; CHECK-VSX: lwz
32 ; CHECK-VSX: stw
2333 }
2434
2535 define void @foo3(i64* %p, i64* %r) nounwind {
3141 ; CHECK: @foo3
3242 ; CHECK: ld
3343 ; CHECK: std
44
45 ; CHECK-VSX: @foo3
46 ; CHECK-VSX: ld
47 ; CHECK-VSX: std
3448 }
3549
3650 define void @foo4(float* %p, float* %r) nounwind {
4256 ; CHECK: @foo4
4357 ; CHECK: lfs
4458 ; CHECK: stfs
59
60 ; CHECK-VSX: @foo4
61 ; CHECK-VSX: lfs
62 ; CHECK-VSX: stfs
4563 }
4664
4765 define void @foo5(double* %p, double* %r) nounwind {
5371 ; CHECK: @foo5
5472 ; CHECK: lfd
5573 ; CHECK: stfd
74
75 ; CHECK-VSX: @foo5
76 ; CHECK-VSX: lxsdx
77 ; CHECK-VSX: stxsdx
5678 }
5779
5880 define void @foo6(<4 x float>* %p, <4 x float>* %r) nounwind {
6890 ; CHECK-DAG: ld
6991 ; CHECK-DAG: stdx
7092 ; CHECK: stdx
93
94 ; CHECK-VSX: @foo6
95 ; CHECK-VSX-DAG: ld
96 ; CHECK-VSX-DAG: ld
97 ; CHECK-VSX-DAG: stdx
98 ; CHECK-VSX: stdx
7199 }
72100
None ; RUN: llc < %s -march=ppc32 | grep fmul | count 2
1 ; RUN: llc < %s -march=ppc32 -enable-unsafe-fp-math | \
0 ; RUN: llc < %s -mattr=-vsx -march=ppc32 | grep fmul | count 2
1 ; RUN: llc < %s -mattr=-vsx -march=ppc32 -enable-unsafe-fp-math | \
22 ; RUN: grep fmul | count 1
3 ; RUN: llc < %s -mattr=+vsx -march=ppc32 | grep xsmuldp | count 2
4 ; RUN: llc < %s -mattr=+vsx -march=ppc32 -enable-unsafe-fp-math | \
5 ; RUN: grep xsmuldp | count 1
36
47 define double @foo(double %X) nounwind {
58 %tmp1 = fmul double %X, 1.23
None ; RUN: llc < %s -mtriple=powerpc-unknown-linux-gnu -march=ppc32 -mattr=+altivec | FileCheck %s
1 ; RUN: llc < %s -mtriple=powerpc64-unknown-linux-gnu -march=ppc64 -mattr=+altivec | FileCheck %s
2 ; RUN: llc < %s -mtriple=powerpc64le-unknown-linux-gnu -march=ppc64 -mattr=+altivec | FileCheck %s -check-prefix=CHECK-LE
0 ; RUN: llc < %s -mtriple=powerpc-unknown-linux-gnu -march=ppc32 -mattr=+altivec -mattr=-vsx | FileCheck %s
1 ; RUN: llc < %s -mtriple=powerpc64-unknown-linux-gnu -march=ppc64 -mattr=+altivec -mattr=-vsx | FileCheck %s
2 ; RUN: llc < %s -mtriple=powerpc64le-unknown-linux-gnu -march=ppc64 -mattr=+altivec -mattr=-vsx | FileCheck %s -check-prefix=CHECK-LE
3 ; RUN: llc < %s -mtriple=powerpc-unknown-linux-gnu -march=ppc32 -mattr=+altivec -mattr=+vsx | FileCheck %s -check-prefix=CHECK-VSX
4 ; RUN: llc < %s -mtriple=powerpc64-unknown-linux-gnu -march=ppc64 -mattr=+altivec -mattr=+vsx | FileCheck %s -check-prefix=CHECK-VSX
5 ; RUN: llc < %s -mtriple=powerpc64le-unknown-linux-gnu -march=ppc64 -mattr=+altivec -mattr=+vsx | FileCheck %s -check-prefix=CHECK-LE-VSX
36
47 define <4 x i32> @test_v4i32(<4 x i32>* %X, <4 x i32>* %Y) {
58 %tmp = load <4 x i32>* %X ; <<4 x i32>> [#uses=1]
1316 ; CHECK-LE-LABEL: test_v4i32:
1417 ; CHECK-LE: vmsumuhm
1518 ; CHECK-LE-NOT: mullw
19 ; CHECK-VSX-LABEL: test_v4i32:
20 ; CHECK-VSX: vmsumuhm
21 ; CHECK-VSX-NOT: mullw
22 ; CHECK-LE-VSX-LABEL: test_v4i32:
23 ; CHECK-LE-VSX: vmsumuhm
24 ; CHECK-LE-VSX-NOT: mullw
1625
1726 define <8 x i16> @test_v8i16(<8 x i16>* %X, <8 x i16>* %Y) {
1827 %tmp = load <8 x i16>* %X ; <<8 x i16>> [#uses=1]
2635 ; CHECK-LE-LABEL: test_v8i16:
2736 ; CHECK-LE: vmladduhm
2837 ; CHECK-LE-NOT: mullw
38 ; CHECK-VSX-LABEL: test_v8i16:
39 ; CHECK-VSX: vmladduhm
40 ; CHECK-VSX-NOT: mullw
41 ; CHECK-LE-VSX-LABEL: test_v8i16:
42 ; CHECK-LE-VSX: vmladduhm
43 ; CHECK-LE-VSX-NOT: mullw
2944
3045 define <16 x i8> @test_v16i8(<16 x i8>* %X, <16 x i8>* %Y) {
3146 %tmp = load <16 x i8>* %X ; <<16 x i8>> [#uses=1]
4257 ; CHECK-LE: vmuleub [[REG2:[0-9]+]]
4358 ; CHECK-LE: vperm {{[0-9]+}}, [[REG2]], [[REG1]]
4459 ; CHECK-LE-NOT: mullw
60 ; CHECK-VSX-LABEL: test_v16i8:
61 ; CHECK-VSX: vmuloub
62 ; CHECK-VSX: vmuleub
63 ; CHECK-VSX-NOT: mullw
64 ; CHECK-LE-VSX-LABEL: test_v16i8:
65 ; CHECK-LE-VSX: vmuloub [[REG1:[0-9]+]]
66 ; CHECK-LE-VSX: vmuleub [[REG2:[0-9]+]]
67 ; CHECK-LE-VSX: vperm {{[0-9]+}}, [[REG2]], [[REG1]]
68 ; CHECK-LE-VSX-NOT: mullw
4569
4670 define <4 x float> @test_float(<4 x float>* %X, <4 x float>* %Y) {
4771 %tmp = load <4 x float>* %X
6084 ; CHECK-LE: vspltisw [[ZNEG:[0-9]+]], -1
6185 ; CHECK-LE: vslw {{[0-9]+}}, [[ZNEG]], [[ZNEG]]
6286 ; CHECK-LE: vmaddfp
87 ; CHECK-VSX-LABEL: test_float:
88 ; CHECK-VSX: xvmulsp
89 ; CHECK-LE-VSX-LABEL: test_float:
90 ; CHECK-LE-VSX: xvmulsp