llvm.org GIT mirror llvm / 100e892
Merging r213773: ------------------------------------------------------------------------ r213773 | jholewinski | 2014-07-23 13:40:45 -0400 (Wed, 23 Jul 2014) | 5 lines [NVPTX] Make sure we do not generate MULWIDE ISD nodes when optimizations are disabled With optimizations disabled, we disable the isel patterns for mul.wide; but we were still generating MULWIDE ISD nodes. Now, we only try to generate MULWIDE ISD nodes in DAGCombine if the optimization level is not zero. ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_35@214309 91177308-0d34-0410-b5e6-96231b3b80d8 Justin Holewinski 5 years ago
2 changed file(s) with 19 addition(s) and 11 deletion(s). Raw diff Collapse all Expand all
42124212
42134213 SDValue NVPTXTargetLowering::PerformDAGCombine(SDNode *N,
42144214 DAGCombinerInfo &DCI) const {
4215 // FIXME: Get this from the DAG somehow
4216 CodeGenOpt::Level OptLevel = CodeGenOpt::Aggressive;
4215 CodeGenOpt::Level OptLevel = getTargetMachine().getOptLevel();
42174216 switch (N->getOpcode()) {
42184217 default: break;
42194218 case ISD::ADD:
None ; RUN: llc < %s -march=nvptx -mcpu=sm_20 | FileCheck %s
0 ; RUN: llc < %s -march=nvptx -mcpu=sm_20 -O3 | FileCheck %s --check-prefix=OPT
1 ; RUN: llc < %s -march=nvptx -mcpu=sm_20 -O0 | FileCheck %s --check-prefix=NOOPT
12
2 ; CHECK: mulwide16
3 ; OPT-LABEL: @mulwide16
4 ; NOOPT-LABEL: @mulwide16
35 define i32 @mulwide16(i16 %a, i16 %b) {
4 ; CHECK: mul.wide.s16
6 ; OPT: mul.wide.s16
7 ; NOOPT: mul.lo.s32
58 %val0 = sext i16 %a to i32
69 %val1 = sext i16 %b to i32
710 %val2 = mul i32 %val0, %val1
811 ret i32 %val2
912 }
1013
11 ; CHECK: mulwideu16
14 ; OPT-LABEL: @mulwideu16
15 ; NOOPT-LABEL: @mulwideu16
1216 define i32 @mulwideu16(i16 %a, i16 %b) {
13 ; CHECK: mul.wide.u16
17 ; OPT: mul.wide.u16
18 ; NOOPT: mul.lo.s32
1419 %val0 = zext i16 %a to i32
1520 %val1 = zext i16 %b to i32
1621 %val2 = mul i32 %val0, %val1
1722 ret i32 %val2
1823 }
1924
20 ; CHECK: mulwide32
25 ; OPT-LABEL: @mulwide32
26 ; NOOPT-LABEL: @mulwide32
2127 define i64 @mulwide32(i32 %a, i32 %b) {
22 ; CHECK: mul.wide.s32
28 ; OPT: mul.wide.s32
29 ; NOOPT: mul.lo.s64
2330 %val0 = sext i32 %a to i64
2431 %val1 = sext i32 %b to i64
2532 %val2 = mul i64 %val0, %val1
2633 ret i64 %val2
2734 }
2835
29 ; CHECK: mulwideu32
36 ; OPT-LABEL: @mulwideu32
37 ; NOOPT-LABEL: @mulwideu32
3038 define i64 @mulwideu32(i32 %a, i32 %b) {
31 ; CHECK: mul.wide.u32
39 ; OPT: mul.wide.u32
40 ; NOOPT: mul.lo.s64
3241 %val0 = zext i32 %a to i64
3342 %val1 = zext i32 %b to i64
3443 %val2 = mul i64 %val0, %val1