llvm.org GIT mirror llvm / 0ff018e
[x86] Allow segment and address-size overrides for INS[BWLQ] (PR9385) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199809 91177308-0d34-0410-b5e6-96231b3b80d8 David Woodhouse 6 years ago
6 changed file(s) with 31 addition(s) and 22 deletion(s). Raw diff Collapse all Expand all
23312331 delete &Op;
23322332 }
23332333 }
2334 // Transform "ins[bwl] %dx, %es:(%edi)" into "ins[bwl]"
2335 if (Name.startswith("ins") && Operands.size() == 3 &&
2336 (Name == "insb" || Name == "insw" || Name == "insl")) {
2337 X86Operand &Op = *(X86Operand*)Operands.begin()[1];
2338 X86Operand &Op2 = *(X86Operand*)Operands.begin()[2];
2339 if (Op.isReg() && Op.getReg() == X86::DX && isDstOp(Op2)) {
2340 Operands.pop_back();
2341 Operands.pop_back();
2342 delete &Op;
2343 delete &Op2;
2334
2335 // Append default arguments to "ins[bwld]"
2336 if (Name.startswith("ins") && Operands.size() == 1 &&
2337 (Name == "insb" || Name == "insw" || Name == "insl" ||
2338 Name == "insd" )) {
2339 if (isParsingIntelSyntax()) {
2340 Operands.push_back(X86Operand::CreateReg(X86::DX, NameLoc, NameLoc));
2341 Operands.push_back(DefaultMemDIOperand(NameLoc));
2342 } else {
2343 Operands.push_back(X86Operand::CreateReg(X86::DX, NameLoc, NameLoc));
2344 Operands.push_back(DefaultMemDIOperand(NameLoc));
23442345 }
23452346 }
23462347
115115 def OUT32ir : Ii8<0xE7, RawFrm, (outs), (ins i8imm:$port),
116116 "out{l}\t{%eax, $port|$port, eax}", [], IIC_OUT_IR>, OpSize16;
117117
118 def IN8 : I<0x6C, RawFrm, (outs), (ins), "ins{b}", [], IIC_INS>;
119 def IN16 : I<0x6D, RawFrm, (outs), (ins), "ins{w}", [], IIC_INS>, OpSize;
120 def IN32 : I<0x6D, RawFrm, (outs), (ins), "ins{l}", [], IIC_INS>, OpSize16;
118 def IN8 : I<0x6C, RawFrmDst, (outs dstidx8:$dst), (ins),
119 "insb\t{%dx, $dst|$dst, dx}", [], IIC_INS>;
120 def IN16 : I<0x6D, RawFrmDst, (outs dstidx16:$dst), (ins),
121 "insw\t{%dx, $dst|$dst, dx}", [], IIC_INS>, OpSize;
122 def IN32 : I<0x6D, RawFrmDst, (outs dstidx32:$dst), (ins),
123 "ins{l|d}\t{%dx, $dst|$dst, dx}", [], IIC_INS>, OpSize16;
121124 } // SchedRW
122125
123126 //===----------------------------------------------------------------------===//
138138 // 64: outsw %fs:(%esi), %dx # encoding: [0x66,0x64,0x67,0x6f]
139139 // 32: outsw %fs:(%esi), %dx # encoding: [0x66,0x64,0x6f]
140140 // 16: outsw %fs:(%esi), %dx # encoding: [0x64,0x67,0x6f]
141
142 insw %dx, (%edi)
143 // 64: insw %dx, %es:(%edi) # encoding: [0x66,0x67,0x6d]
144 // 32: insw %dx, %es:(%edi) # encoding: [0x66,0x6d]
145 // 16: insw %dx, %es:(%edi) # encoding: [0x67,0x6d]
808808 outsl %ds:(%si), %dx
809809 outsl (%si), %dx
810810
811 // CHECK: insb # encoding: [0x6c]
811 // CHECK: insb %dx, %es:(%di) # encoding: [0x6c]
812812 // CHECK: insb
813813 insb
814814 insb %dx, %es:(%di)
815815
816 // CHECK: insw # encoding: [0x6d]
816 // CHECK: insw %dx, %es:(%di) # encoding: [0x6d]
817817 // CHECK: insw
818818 insw
819819 insw %dx, %es:(%di)
820820
821 // CHECK: insl # encoding: [0x66,0x6d]
821 // CHECK: insl %dx, %es:(%di) # encoding: [0x66,0x6d]
822822 // CHECK: insl
823823 insl
824824 insl %dx, %es:(%di)
884884 outsl %ds:(%esi), %dx
885885 outsl (%esi), %dx
886886
887 // CHECK: insb # encoding: [0x6c]
887 // CHECK: insb %dx, %es:(%edi) # encoding: [0x6c]
888888 // CHECK: insb
889889 insb
890890 insb %dx, %es:(%edi)
891891
892 // CHECK: insw # encoding: [0x66,0x6d]
892 // CHECK: insw %dx, %es:(%edi) # encoding: [0x66,0x6d]
893893 // CHECK: insw
894894 insw
895895 insw %dx, %es:(%edi)
896896
897 // CHECK: insl # encoding: [0x6d]
897 // CHECK: insl %dx, %es:(%edi) # encoding: [0x6d]
898898 // CHECK: insl
899899 insl
900900 insl %dx, %es:(%edi)
10691069 outsl %ds:(%rsi), %dx
10701070 outsl (%rsi), %dx
10711071
1072 // CHECK: insb # encoding: [0x6c]
1072 // CHECK: insb %dx, %es:(%rdi) # encoding: [0x6c]
10731073 // CHECK: insb
10741074 insb
10751075 insb %dx, %es:(%rdi)
10761076
1077 // CHECK: insw # encoding: [0x66,0x6d]
1077 // CHECK: insw %dx, %es:(%rdi) # encoding: [0x66,0x6d]
10781078 // CHECK: insw
10791079 insw
10801080 insw %dx, %es:(%rdi)
10811081
1082 // CHECK: insl # encoding: [0x6d]
1082 // CHECK: insl %dx, %es:(%rdi) # encoding: [0x6d]
10831083 // CHECK: insl
10841084 insl
10851085 insl %dx, %es:(%rdi)