llvm.org GIT mirror llvm / 0f39827
R600/SI: Fixing handling of condition codes We were ignoring the ordered/onordered bits and also the signed/unsigned bits of condition codes when lowering the DAG to MachineInstrs. NOTE: This is a candidate for the 3.4 branch. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195514 91177308-0d34-0410-b5e6-96231b3b80d8 Tom Stellard 6 years ago
6 changed file(s) with 696 addition(s) and 106 deletion(s). Raw diff Collapse all Expand all
3636 def InstFlag : OperandWithDefaultOps ;
3737 def ADDRIndirect : ComplexPattern;
3838
39 //===----------------------------------------------------------------------===//
40 // PatLeafs for floating-point comparisons
41 //===----------------------------------------------------------------------===//
42
43 def COND_OEQ : PatLeaf <
44 (cond),
45 [{return N->get() == ISD::SETOEQ || N->get() == ISD::SETEQ;}]
46 >;
47
48 def COND_OGT : PatLeaf <
49 (cond),
50 [{return N->get() == ISD::SETOGT || N->get() == ISD::SETGT;}]
51 >;
52
53 def COND_OGE : PatLeaf <
54 (cond),
55 [{return N->get() == ISD::SETOGE || N->get() == ISD::SETGE;}]
56 >;
57
58 def COND_OLT : PatLeaf <
59 (cond),
60 [{return N->get() == ISD::SETOLT || N->get() == ISD::SETLT;}]
61 >;
62
63 def COND_OLE : PatLeaf <
64 (cond),
65 [{return N->get() == ISD::SETOLE || N->get() == ISD::SETLE;}]
66 >;
67
68 def COND_UNE : PatLeaf <
69 (cond),
70 [{return N->get() == ISD::SETUNE || N->get() == ISD::SETNE;}]
71 >;
72
73 def COND_O : PatLeaf <(cond), [{return N->get() == ISD::SETO;}]>;
74 def COND_UO : PatLeaf <(cond), [{return N->get() == ISD::SETUO;}]>;
75
76 //===----------------------------------------------------------------------===//
77 // PatLeafs for unsigned comparisons
78 //===----------------------------------------------------------------------===//
79
80 def COND_UGT : PatLeaf <(cond), [{return N->get() == ISD::SETUGT;}]>;
81 def COND_UGE : PatLeaf <(cond), [{return N->get() == ISD::SETUGE;}]>;
82 def COND_ULT : PatLeaf <(cond), [{return N->get() == ISD::SETULT;}]>;
83 def COND_ULE : PatLeaf <(cond), [{return N->get() == ISD::SETULE;}]>;
84
85 //===----------------------------------------------------------------------===//
86 // PatLeafs for signed comparisons
87 //===----------------------------------------------------------------------===//
88
89 def COND_SGT : PatLeaf <(cond), [{return N->get() == ISD::SETGT;}]>;
90 def COND_SGE : PatLeaf <(cond), [{return N->get() == ISD::SETGE;}]>;
91 def COND_SLT : PatLeaf <(cond), [{return N->get() == ISD::SETLT;}]>;
92 def COND_SLE : PatLeaf <(cond), [{return N->get() == ISD::SETLE;}]>;
93
94 //===----------------------------------------------------------------------===//
95 // PatLeafs for integer equality
96 //===----------------------------------------------------------------------===//
97
3998 def COND_EQ : PatLeaf <
4099 (cond),
41 [{switch(N->get()){{default: return false;
42 case ISD::SETOEQ: case ISD::SETUEQ:
43 case ISD::SETEQ: return true;}}}]
44 >;
45
46 def COND_OEQ : PatLeaf <
47 (cond),
48 [{return N->get() == ISD::SETOEQ || N->get() == ISD::SETEQ;}]
100 [{return N->get() == ISD::SETEQ || N->get() == ISD::SETUEQ;}]
49101 >;
50102
51103 def COND_NE : PatLeaf <
52104 (cond),
53 [{switch(N->get()){{default: return false;
54 case ISD::SETONE: case ISD::SETUNE:
55 case ISD::SETNE: return true;}}}]
56 >;
57
58 def COND_UNE : PatLeaf <
59 (cond),
60 [{return N->get() == ISD::SETUNE || N->get() == ISD::SETNE;}]
61 >;
62
63 def COND_GT : PatLeaf <
64 (cond),
65 [{switch(N->get()){{default: return false;
66 case ISD::SETOGT: case ISD::SETUGT:
67 case ISD::SETGT: return true;}}}]
68 >;
69
70 def COND_OGT : PatLeaf <
71 (cond),
72 [{return N->get() == ISD::SETOGT || N->get() == ISD::SETGT;}]
73 >;
74
75 def COND_GE : PatLeaf <
76 (cond),
77 [{switch(N->get()){{default: return false;
78 case ISD::SETOGE: case ISD::SETUGE:
79 case ISD::SETGE: return true;}}}]
80 >;
81
82 def COND_OGE : PatLeaf <
83 (cond),
84 [{return N->get() == ISD::SETOGE || N->get() == ISD::SETGE;}]
85 >;
86
87 def COND_LT : PatLeaf <
88 (cond),
89 [{switch(N->get()){{default: return false;
90 case ISD::SETOLT: case ISD::SETULT:
91 case ISD::SETLT: return true;}}}]
92 >;
93
94 def COND_LE : PatLeaf <
95 (cond),
96 [{switch(N->get()){{default: return false;
97 case ISD::SETOLE: case ISD::SETULE:
98 case ISD::SETLE: return true;}}}]
105 [{return N->get() == ISD::SETNE || N->get() == ISD::SETUNE;}]
99106 >;
100107
101108 def COND_NULL : PatLeaf <
821821
822822 def CNDGE_INT : R600_3OP <
823823 0x1E, "CNDGE_INT",
824 [(set i32:$dst, (selectcc i32:$src0, 0, i32:$src1, i32:$src2, COND_GE))]
824 [(set i32:$dst, (selectcc i32:$src0, 0, i32:$src1, i32:$src2, COND_SGE))]
825825 >;
826826
827827 def CNDGT_INT : R600_3OP <
828828 0x1D, "CNDGT_INT",
829 [(set i32:$dst, (selectcc i32:$src0, 0, i32:$src1, i32:$src2, COND_GT))]
829 [(set i32:$dst, (selectcc i32:$src0, 0, i32:$src1, i32:$src2, COND_SGT))]
830830 >;
831831
832832 //===----------------------------------------------------------------------===//
23122312
23132313 //CNDGE_INT extra pattern
23142314 def : Pat <
2315 (selectcc i32:$src0, -1, i32:$src1, i32:$src2, COND_GT),
2315 (selectcc i32:$src0, -1, i32:$src1, i32:$src2, COND_SGT),
23162316 (CNDGE_INT $src0, $src1, $src2)
23172317 >;
23182318
5454 addRegisterClass(MVT::v16f32, &AMDGPU::VReg_512RegClass);
5555
5656 computeRegisterProperties();
57
58 // Condition Codes
59 setCondCodeAction(ISD::SETONE, MVT::f32, Expand);
60 setCondCodeAction(ISD::SETUEQ, MVT::f32, Expand);
61 setCondCodeAction(ISD::SETUGE, MVT::f32, Expand);
62 setCondCodeAction(ISD::SETUGT, MVT::f32, Expand);
63 setCondCodeAction(ISD::SETULE, MVT::f32, Expand);
64 setCondCodeAction(ISD::SETULT, MVT::f32, Expand);
65
66 setCondCodeAction(ISD::SETONE, MVT::f64, Expand);
67 setCondCodeAction(ISD::SETUEQ, MVT::f64, Expand);
68 setCondCodeAction(ISD::SETUGE, MVT::f64, Expand);
69 setCondCodeAction(ISD::SETUGT, MVT::f64, Expand);
70 setCondCodeAction(ISD::SETULE, MVT::f64, Expand);
71 setCondCodeAction(ISD::SETULT, MVT::f64, Expand);
5772
5873 setOperationAction(ISD::VECTOR_SHUFFLE, MVT::v8i32, Expand);
5974 setOperationAction(ISD::VECTOR_SHUFFLE, MVT::v8f32, Expand);
142142 let isCompare = 1 in {
143143
144144 defm V_CMP_F_F32 : VOPC_32 <0x00000000, "V_CMP_F_F32">;
145 defm V_CMP_LT_F32 : VOPC_32 <0x00000001, "V_CMP_LT_F32", f32, COND_LT>;
146 defm V_CMP_EQ_F32 : VOPC_32 <0x00000002, "V_CMP_EQ_F32", f32, COND_EQ>;
147 defm V_CMP_LE_F32 : VOPC_32 <0x00000003, "V_CMP_LE_F32", f32, COND_LE>;
148 defm V_CMP_GT_F32 : VOPC_32 <0x00000004, "V_CMP_GT_F32", f32, COND_GT>;
149 defm V_CMP_LG_F32 : VOPC_32 <0x00000005, "V_CMP_LG_F32", f32, COND_NE>;
150 defm V_CMP_GE_F32 : VOPC_32 <0x00000006, "V_CMP_GE_F32", f32, COND_GE>;
151 defm V_CMP_O_F32 : VOPC_32 <0x00000007, "V_CMP_O_F32">;
152 defm V_CMP_U_F32 : VOPC_32 <0x00000008, "V_CMP_U_F32">;
145 defm V_CMP_LT_F32 : VOPC_32 <0x00000001, "V_CMP_LT_F32", f32, COND_OLT>;
146 defm V_CMP_EQ_F32 : VOPC_32 <0x00000002, "V_CMP_EQ_F32", f32, COND_OEQ>;
147 defm V_CMP_LE_F32 : VOPC_32 <0x00000003, "V_CMP_LE_F32", f32, COND_OLE>;
148 defm V_CMP_GT_F32 : VOPC_32 <0x00000004, "V_CMP_GT_F32", f32, COND_OGT>;
149 defm V_CMP_LG_F32 : VOPC_32 <0x00000005, "V_CMP_LG_F32">;
150 defm V_CMP_GE_F32 : VOPC_32 <0x00000006, "V_CMP_GE_F32", f32, COND_OGE>;
151 defm V_CMP_O_F32 : VOPC_32 <0x00000007, "V_CMP_O_F32", f32, COND_O>;
152 defm V_CMP_U_F32 : VOPC_32 <0x00000008, "V_CMP_U_F32", f32, COND_UO>;
153153 defm V_CMP_NGE_F32 : VOPC_32 <0x00000009, "V_CMP_NGE_F32">;
154154 defm V_CMP_NLG_F32 : VOPC_32 <0x0000000a, "V_CMP_NLG_F32">;
155155 defm V_CMP_NGT_F32 : VOPC_32 <0x0000000b, "V_CMP_NGT_F32">;
156156 defm V_CMP_NLE_F32 : VOPC_32 <0x0000000c, "V_CMP_NLE_F32">;
157 defm V_CMP_NEQ_F32 : VOPC_32 <0x0000000d, "V_CMP_NEQ_F32", f32, COND_NE>;
157 defm V_CMP_NEQ_F32 : VOPC_32 <0x0000000d, "V_CMP_NEQ_F32", f32, COND_UNE>;
158158 defm V_CMP_NLT_F32 : VOPC_32 <0x0000000e, "V_CMP_NLT_F32">;
159159 defm V_CMP_TRU_F32 : VOPC_32 <0x0000000f, "V_CMP_TRU_F32">;
160160
180180 } // End hasSideEffects = 1, Defs = [EXEC]
181181
182182 defm V_CMP_F_F64 : VOPC_64 <0x00000020, "V_CMP_F_F64">;
183 defm V_CMP_LT_F64 : VOPC_64 <0x00000021, "V_CMP_LT_F64", f64, COND_LT>;
184 defm V_CMP_EQ_F64 : VOPC_64 <0x00000022, "V_CMP_EQ_F64", f64, COND_EQ>;
185 defm V_CMP_LE_F64 : VOPC_64 <0x00000023, "V_CMP_LE_F64", f64, COND_LE>;
186 defm V_CMP_GT_F64 : VOPC_64 <0x00000024, "V_CMP_GT_F64", f64, COND_GT>;
183 defm V_CMP_LT_F64 : VOPC_64 <0x00000021, "V_CMP_LT_F64", f64, COND_OLT>;
184 defm V_CMP_EQ_F64 : VOPC_64 <0x00000022, "V_CMP_EQ_F64", f64, COND_OEQ>;
185 defm V_CMP_LE_F64 : VOPC_64 <0x00000023, "V_CMP_LE_F64", f64, COND_OLE>;
186 defm V_CMP_GT_F64 : VOPC_64 <0x00000024, "V_CMP_GT_F64", f64, COND_OGT>;
187187 defm V_CMP_LG_F64 : VOPC_64 <0x00000025, "V_CMP_LG_F64">;
188 defm V_CMP_GE_F64 : VOPC_64 <0x00000026, "V_CMP_GE_F64", f64, COND_GE>;
189 defm V_CMP_O_F64 : VOPC_64 <0x00000027, "V_CMP_O_F64">;
190 defm V_CMP_U_F64 : VOPC_64 <0x00000028, "V_CMP_U_F64">;
188 defm V_CMP_GE_F64 : VOPC_64 <0x00000026, "V_CMP_GE_F64", f64, COND_OGE>;
189 defm V_CMP_O_F64 : VOPC_64 <0x00000027, "V_CMP_O_F64", f64, COND_O>;
190 defm V_CMP_U_F64 : VOPC_64 <0x00000028, "V_CMP_U_F64", f64, COND_UO>;
191191 defm V_CMP_NGE_F64 : VOPC_64 <0x00000029, "V_CMP_NGE_F64">;
192192 defm V_CMP_NLG_F64 : VOPC_64 <0x0000002a, "V_CMP_NLG_F64">;
193193 defm V_CMP_NGT_F64 : VOPC_64 <0x0000002b, "V_CMP_NGT_F64">;
194194 defm V_CMP_NLE_F64 : VOPC_64 <0x0000002c, "V_CMP_NLE_F64">;
195 defm V_CMP_NEQ_F64 : VOPC_64 <0x0000002d, "V_CMP_NEQ_F64", f64, COND_NE>;
195 defm V_CMP_NEQ_F64 : VOPC_64 <0x0000002d, "V_CMP_NEQ_F64", f64, COND_UNE>;
196196 defm V_CMP_NLT_F64 : VOPC_64 <0x0000002e, "V_CMP_NLT_F64">;
197197 defm V_CMP_TRU_F64 : VOPC_64 <0x0000002f, "V_CMP_TRU_F64">;
198198
294294 } // End hasSideEffects = 1, Defs = [EXEC]
295295
296296 defm V_CMP_F_I32 : VOPC_32 <0x00000080, "V_CMP_F_I32">;
297 defm V_CMP_LT_I32 : VOPC_32 <0x00000081, "V_CMP_LT_I32", i32, COND_LT>;
297 defm V_CMP_LT_I32 : VOPC_32 <0x00000081, "V_CMP_LT_I32", i32, COND_SLT>;
298298 defm V_CMP_EQ_I32 : VOPC_32 <0x00000082, "V_CMP_EQ_I32", i32, COND_EQ>;
299 defm V_CMP_LE_I32 : VOPC_32 <0x00000083, "V_CMP_LE_I32", i32, COND_LE>;
300 defm V_CMP_GT_I32 : VOPC_32 <0x00000084, "V_CMP_GT_I32", i32, COND_GT>;
299 defm V_CMP_LE_I32 : VOPC_32 <0x00000083, "V_CMP_LE_I32", i32, COND_SLE>;
300 defm V_CMP_GT_I32 : VOPC_32 <0x00000084, "V_CMP_GT_I32", i32, COND_SGT>;
301301 defm V_CMP_NE_I32 : VOPC_32 <0x00000085, "V_CMP_NE_I32", i32, COND_NE>;
302 defm V_CMP_GE_I32 : VOPC_32 <0x00000086, "V_CMP_GE_I32", i32, COND_GE>;
302 defm V_CMP_GE_I32 : VOPC_32 <0x00000086, "V_CMP_GE_I32", i32, COND_SGE>;
303303 defm V_CMP_T_I32 : VOPC_32 <0x00000087, "V_CMP_T_I32">;
304304
305305 let hasSideEffects = 1, Defs = [EXEC] in {
316316 } // End hasSideEffects = 1, Defs = [EXEC]
317317
318318 defm V_CMP_F_I64 : VOPC_64 <0x000000a0, "V_CMP_F_I64">;
319 defm V_CMP_LT_I64 : VOPC_64 <0x000000a1, "V_CMP_LT_I64">;
320 defm V_CMP_EQ_I64 : VOPC_64 <0x000000a2, "V_CMP_EQ_I64">;
321 defm V_CMP_LE_I64 : VOPC_64 <0x000000a3, "V_CMP_LE_I64">;
322 defm V_CMP_GT_I64 : VOPC_64 <0x000000a4, "V_CMP_GT_I64">;
323 defm V_CMP_NE_I64 : VOPC_64 <0x000000a5, "V_CMP_NE_I64">;
324 defm V_CMP_GE_I64 : VOPC_64 <0x000000a6, "V_CMP_GE_I64">;
319 defm V_CMP_LT_I64 : VOPC_64 <0x000000a1, "V_CMP_LT_I64", i64, COND_SLT>;
320 defm V_CMP_EQ_I64 : VOPC_64 <0x000000a2, "V_CMP_EQ_I64", i64, COND_EQ>;
321 defm V_CMP_LE_I64 : VOPC_64 <0x000000a3, "V_CMP_LE_I64", i64, COND_SLE>;
322 defm V_CMP_GT_I64 : VOPC_64 <0x000000a4, "V_CMP_GT_I64", i64, COND_SGT>;
323 defm V_CMP_NE_I64 : VOPC_64 <0x000000a5, "V_CMP_NE_I64", i64, COND_NE>;
324 defm V_CMP_GE_I64 : VOPC_64 <0x000000a6, "V_CMP_GE_I64", i64, COND_SGE>;
325325 defm V_CMP_T_I64 : VOPC_64 <0x000000a7, "V_CMP_T_I64">;
326326
327327 let hasSideEffects = 1, Defs = [EXEC] in {
338338 } // End hasSideEffects = 1, Defs = [EXEC]
339339
340340 defm V_CMP_F_U32 : VOPC_32 <0x000000c0, "V_CMP_F_U32">;
341 defm V_CMP_LT_U32 : VOPC_32 <0x000000c1, "V_CMP_LT_U32">;
342 defm V_CMP_EQ_U32 : VOPC_32 <0x000000c2, "V_CMP_EQ_U32">;
343 defm V_CMP_LE_U32 : VOPC_32 <0x000000c3, "V_CMP_LE_U32">;
344 defm V_CMP_GT_U32 : VOPC_32 <0x000000c4, "V_CMP_GT_U32">;
345 defm V_CMP_NE_U32 : VOPC_32 <0x000000c5, "V_CMP_NE_U32">;
346 defm V_CMP_GE_U32 : VOPC_32 <0x000000c6, "V_CMP_GE_U32">;
341 defm V_CMP_LT_U32 : VOPC_32 <0x000000c1, "V_CMP_LT_U32", i32, COND_ULT>;
342 defm V_CMP_EQ_U32 : VOPC_32 <0x000000c2, "V_CMP_EQ_U32", i32, COND_EQ>;
343 defm V_CMP_LE_U32 : VOPC_32 <0x000000c3, "V_CMP_LE_U32", i32, COND_ULE>;
344 defm V_CMP_GT_U32 : VOPC_32 <0x000000c4, "V_CMP_GT_U32", i32, COND_UGT>;
345 defm V_CMP_NE_U32 : VOPC_32 <0x000000c5, "V_CMP_NE_U32", i32, COND_NE>;
346 defm V_CMP_GE_U32 : VOPC_32 <0x000000c6, "V_CMP_GE_U32", i32, COND_UGE>;
347347 defm V_CMP_T_U32 : VOPC_32 <0x000000c7, "V_CMP_T_U32">;
348348
349349 let hasSideEffects = 1, Defs = [EXEC] in {
360360 } // End hasSideEffects = 1, Defs = [EXEC]
361361
362362 defm V_CMP_F_U64 : VOPC_64 <0x000000e0, "V_CMP_F_U64">;
363 defm V_CMP_LT_U64 : VOPC_64 <0x000000e1, "V_CMP_LT_U64">;
364 defm V_CMP_EQ_U64 : VOPC_64 <0x000000e2, "V_CMP_EQ_U64">;
365 defm V_CMP_LE_U64 : VOPC_64 <0x000000e3, "V_CMP_LE_U64">;
366 defm V_CMP_GT_U64 : VOPC_64 <0x000000e4, "V_CMP_GT_U64">;
367 defm V_CMP_NE_U64 : VOPC_64 <0x000000e5, "V_CMP_NE_U64">;
368 defm V_CMP_GE_U64 : VOPC_64 <0x000000e6, "V_CMP_GE_U64">;
363 defm V_CMP_LT_U64 : VOPC_64 <0x000000e1, "V_CMP_LT_U64", i64, COND_ULT>;
364 defm V_CMP_EQ_U64 : VOPC_64 <0x000000e2, "V_CMP_EQ_U64", i64, COND_EQ>;
365 defm V_CMP_LE_U64 : VOPC_64 <0x000000e3, "V_CMP_LE_U64", i64, COND_ULE>;
366 defm V_CMP_GT_U64 : VOPC_64 <0x000000e4, "V_CMP_GT_U64", i64, COND_UGT>;
367 defm V_CMP_NE_U64 : VOPC_64 <0x000000e5, "V_CMP_NE_U64", i64, COND_NE>;
368 defm V_CMP_GE_U64 : VOPC_64 <0x000000e6, "V_CMP_GE_U64", i64, COND_UGE>;
369369 defm V_CMP_T_U64 : VOPC_64 <0x000000e7, "V_CMP_T_U64">;
370370
371371 let hasSideEffects = 1, Defs = [EXEC] in {
None ;RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck --check-prefix=EG-CHECK %s
1
2 ; CHECK: @setcc_v2i32
3 ; EG-CHECK-DAG: SETE_INT * T{{[0-9]+\.[XYZW]}}, KC0[3].X, KC0[3].Z
4 ; EG-CHECK-DAG: SETE_INT * T{{[0-9]+\.[XYZW]}}, KC0[2].W, KC0[3].Y
0 ;RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck --check-prefix=R600 --check-prefix=FUNC %s
1 ;RUN: llc < %s -march=r600 -mcpu=SI | FileCheck --check-prefix=SI --check-prefix=FUNC %s
2
3 ; FUNC-LABEL: @setcc_v2i32
4 ; R600-DAG: SETE_INT * T{{[0-9]+\.[XYZW]}}, KC0[3].X, KC0[3].Z
5 ; R600-DAG: SETE_INT * T{{[0-9]+\.[XYZW]}}, KC0[2].W, KC0[3].Y
56
67 define void @setcc_v2i32(<2 x i32> addrspace(1)* %out, <2 x i32> %a, <2 x i32> %b) {
78 %result = icmp eq <2 x i32> %a, %b
1011 ret void
1112 }
1213
13 ; CHECK: @setcc_v4i32
14 ; EG-CHECK-DAG: SETE_INT * T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
15 ; EG-CHECK-DAG: SETE_INT * T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
16 ; EG-CHECK-DAG: SETE_INT * T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
17 ; EG-CHECK-DAG: SETE_INT * T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
14 ; FUNC-LABEL: @setcc_v4i32
15 ; R600-DAG: SETE_INT * T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
16 ; R600-DAG: SETE_INT * T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
17 ; R600-DAG: SETE_INT * T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
18 ; R600-DAG: SETE_INT * T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
1819
1920 define void @setcc_v4i32(<4 x i32> addrspace(1)* %out, <4 x i32> addrspace(1)* %in) {
2021 %b_ptr = getelementptr <4 x i32> addrspace(1)* %in, i32 1
2526 store <4 x i32> %sext, <4 x i32> addrspace(1)* %out
2627 ret void
2728 }
29
30 ;;;==========================================================================;;;
31 ;; Float comparisons
32 ;;;==========================================================================;;;
33
34 ; FUNC-LABEL: @f32_oeq
35 ; R600: SETE_DX10
36 ; SI: V_CMP_EQ_F32
37 define void @f32_oeq(i32 addrspace(1)* %out, float %a, float %b) {
38 entry:
39 %0 = fcmp oeq float %a, %b
40 %1 = sext i1 %0 to i32
41 store i32 %1, i32 addrspace(1)* %out
42 ret void
43 }
44
45 ; FUNC-LABEL: @f32_ogt
46 ; R600: SETGT_DX10
47 ; SI: V_CMP_GT_F32
48 define void @f32_ogt(i32 addrspace(1)* %out, float %a, float %b) {
49 entry:
50 %0 = fcmp ogt float %a, %b
51 %1 = sext i1 %0 to i32
52 store i32 %1, i32 addrspace(1)* %out
53 ret void
54 }
55
56 ; FUNC-LABEL: @f32_oge
57 ; R600: SETGE_DX10
58 ; SI: V_CMP_GE_F32
59 define void @f32_oge(i32 addrspace(1)* %out, float %a, float %b) {
60 entry:
61 %0 = fcmp oge float %a, %b
62 %1 = sext i1 %0 to i32
63 store i32 %1, i32 addrspace(1)* %out
64 ret void
65 }
66
67 ; FUNC-LABEL: @f32_olt
68 ; R600: SETGT_DX10
69 ; SI: V_CMP_LT_F32
70 define void @f32_olt(i32 addrspace(1)* %out, float %a, float %b) {
71 entry:
72 %0 = fcmp olt float %a, %b
73 %1 = sext i1 %0 to i32
74 store i32 %1, i32 addrspace(1)* %out
75 ret void
76 }
77
78 ; FUNC-LABEL: @f32_ole
79 ; R600: SETGE_DX10
80 ; SI: V_CMP_LE_F32
81 define void @f32_ole(i32 addrspace(1)* %out, float %a, float %b) {
82 entry:
83 %0 = fcmp ole float %a, %b
84 %1 = sext i1 %0 to i32
85 store i32 %1, i32 addrspace(1)* %out
86 ret void
87 }
88
89 ; FUNC-LABEL: @f32_one
90 ; R600-DAG: SETE_DX10
91 ; R600-DAG: SETE_DX10
92 ; R600-DAG: AND_INT
93 ; R600-DAG: SETNE_DX10
94 ; R600-DAG: AND_INT
95 ; R600-DAG: SETNE_INT
96 ; SI: V_CMP_O_F32
97 ; SI: V_CMP_NEQ_F32
98 ; SI: S_AND_B64
99 define void @f32_one(i32 addrspace(1)* %out, float %a, float %b) {
100 entry:
101 %0 = fcmp one float %a, %b
102 %1 = sext i1 %0 to i32
103 store i32 %1, i32 addrspace(1)* %out
104 ret void
105 }
106
107 ; FUNC-LABEL: @f32_ord
108 ; R600-DAG: SETE_DX10
109 ; R600-DAG: SETE_DX10
110 ; R600-DAG: AND_INT
111 ; R600-DAG: SETNE_INT
112 ; SI: V_CMP_O_F32
113 define void @f32_ord(i32 addrspace(1)* %out, float %a, float %b) {
114 entry:
115 %0 = fcmp ord float %a, %b
116 %1 = sext i1 %0 to i32
117 store i32 %1, i32 addrspace(1)* %out
118 ret void
119 }
120
121 ; FUNC-LABEL: @f32_ueq
122 ; R600-DAG: SETNE_DX10
123 ; R600-DAG: SETNE_DX10
124 ; R600-DAG: OR_INT
125 ; R600-DAG: SETE_DX10
126 ; R600-DAG: OR_INT
127 ; R600-DAG: SETNE_INT
128 ; SI: V_CMP_U_F32
129 ; SI: V_CMP_EQ_F32
130 ; SI: S_OR_B64
131 define void @f32_ueq(i32 addrspace(1)* %out, float %a, float %b) {
132 entry:
133 %0 = fcmp ueq float %a, %b
134 %1 = sext i1 %0 to i32
135 store i32 %1, i32 addrspace(1)* %out
136 ret void
137 }
138
139 ; FUNC-LABEL: @f32_ugt
140 ; R600: SETGE
141 ; R600: SETE_DX10
142 ; SI: V_CMP_U_F32
143 ; SI: V_CMP_GT_F32
144 ; SI: S_OR_B64
145 define void @f32_ugt(i32 addrspace(1)* %out, float %a, float %b) {
146 entry:
147 %0 = fcmp ugt float %a, %b
148 %1 = sext i1 %0 to i32
149 store i32 %1, i32 addrspace(1)* %out
150 ret void
151 }
152
153 ; FUNC-LABEL: @f32_uge
154 ; R600: SETGT
155 ; R600: SETE_DX10
156 ; SI: V_CMP_U_F32
157 ; SI: V_CMP_GE_F32
158 ; SI: S_OR_B64
159 define void @f32_uge(i32 addrspace(1)* %out, float %a, float %b) {
160 entry:
161 %0 = fcmp uge float %a, %b
162 %1 = sext i1 %0 to i32
163 store i32 %1, i32 addrspace(1)* %out
164 ret void
165 }
166
167 ; FUNC-LABEL: @f32_ult
168 ; R600: SETGE
169 ; R600: SETE_DX10
170 ; SI: V_CMP_U_F32
171 ; SI: V_CMP_LT_F32
172 ; SI: S_OR_B64
173 define void @f32_ult(i32 addrspace(1)* %out, float %a, float %b) {
174 entry:
175 %0 = fcmp ult float %a, %b
176 %1 = sext i1 %0 to i32
177 store i32 %1, i32 addrspace(1)* %out
178 ret void
179 }
180
181 ; FUNC-LABEL: @f32_ule
182 ; R600: SETGT
183 ; R600: SETE_DX10
184 ; SI: V_CMP_U_F32
185 ; SI: V_CMP_LE_F32
186 ; SI: S_OR_B64
187 define void @f32_ule(i32 addrspace(1)* %out, float %a, float %b) {
188 entry:
189 %0 = fcmp ule float %a, %b
190 %1 = sext i1 %0 to i32
191 store i32 %1, i32 addrspace(1)* %out
192 ret void
193 }
194
195 ; FUNC-LABEL: @f32_une
196 ; R600: SETNE_DX10
197 ; SI: V_CMP_NEQ_F32
198 define void @f32_une(i32 addrspace(1)* %out, float %a, float %b) {
199 entry:
200 %0 = fcmp une float %a, %b
201 %1 = sext i1 %0 to i32
202 store i32 %1, i32 addrspace(1)* %out
203 ret void
204 }
205
206 ; FUNC-LABEL: @f32_uno
207 ; R600: SETNE_DX10
208 ; R600: SETNE_DX10
209 ; R600: OR_INT
210 ; R600: SETNE_INT
211 ; SI: V_CMP_U_F32
212 define void @f32_uno(i32 addrspace(1)* %out, float %a, float %b) {
213 entry:
214 %0 = fcmp uno float %a, %b
215 %1 = sext i1 %0 to i32
216 store i32 %1, i32 addrspace(1)* %out
217 ret void
218 }
219
220 ;;;==========================================================================;;;
221 ;; 32-bit integer comparisons
222 ;;;==========================================================================;;;
223
224 ; FUNC-LABEL: @i32_eq
225 ; R600: SETE_INT
226 ; SI: V_CMP_EQ_I32
227 define void @i32_eq(i32 addrspace(1)* %out, i32 %a, i32 %b) {
228 entry:
229 %0 = icmp eq i32 %a, %b
230 %1 = sext i1 %0 to i32
231 store i32 %1, i32 addrspace(1)* %out
232 ret void
233 }
234
235 ; FUNC-LABEL: @i32_ne
236 ; R600: SETNE_INT
237 ; SI: V_CMP_NE_I32
238 define void @i32_ne(i32 addrspace(1)* %out, i32 %a, i32 %b) {
239 entry:
240 %0 = icmp ne i32 %a, %b
241 %1 = sext i1 %0 to i32
242 store i32 %1, i32 addrspace(1)* %out
243 ret void
244 }
245
246 ; FUNC-LABEL: @i32_ugt
247 ; R600: SETGT_UINT
248 ; SI: V_CMP_GT_U32
249 define void @i32_ugt(i32 addrspace(1)* %out, i32 %a, i32 %b) {
250 entry:
251 %0 = icmp ugt i32 %a, %b
252 %1 = sext i1 %0 to i32
253 store i32 %1, i32 addrspace(1)* %out
254 ret void
255 }
256
257 ; FUNC-LABEL: @i32_uge
258 ; R600: SETGE_UINT
259 ; SI: V_CMP_GE_U32
260 define void @i32_uge(i32 addrspace(1)* %out, i32 %a, i32 %b) {
261 entry:
262 %0 = icmp uge i32 %a, %b
263 %1 = sext i1 %0 to i32
264 store i32 %1, i32 addrspace(1)* %out
265 ret void
266 }
267
268 ; FUNC-LABEL: @i32_ult
269 ; R600: SETGT_UINT
270 ; SI: V_CMP_LT_U32
271 define void @i32_ult(i32 addrspace(1)* %out, i32 %a, i32 %b) {
272 entry:
273 %0 = icmp ult i32 %a, %b
274 %1 = sext i1 %0 to i32
275 store i32 %1, i32 addrspace(1)* %out
276 ret void
277 }
278
279 ; FUNC-LABEL: @i32_ule
280 ; R600: SETGE_UINT
281 ; SI: V_CMP_LE_U32
282 define void @i32_ule(i32 addrspace(1)* %out, i32 %a, i32 %b) {
283 entry:
284 %0 = icmp ule i32 %a, %b
285 %1 = sext i1 %0 to i32
286 store i32 %1, i32 addrspace(1)* %out
287 ret void
288 }
289
290 ; FUNC-LABEL: @i32_sgt
291 ; R600: SETGT_INT
292 ; SI: V_CMP_GT_I32
293 define void @i32_sgt(i32 addrspace(1)* %out, i32 %a, i32 %b) {
294 entry:
295 %0 = icmp sgt i32 %a, %b
296 %1 = sext i1 %0 to i32
297 store i32 %1, i32 addrspace(1)* %out
298 ret void
299 }
300
301 ; FUNC-LABEL: @i32_sge
302 ; R600: SETGE_INT
303 ; SI: V_CMP_GE_I32
304 define void @i32_sge(i32 addrspace(1)* %out, i32 %a, i32 %b) {
305 entry:
306 %0 = icmp sge i32 %a, %b
307 %1 = sext i1 %0 to i32
308 store i32 %1, i32 addrspace(1)* %out
309 ret void
310 }
311
312 ; FUNC-LABEL: @i32_slt
313 ; R600: SETGT_INT
314 ; SI: V_CMP_LT_I32
315 define void @i32_slt(i32 addrspace(1)* %out, i32 %a, i32 %b) {
316 entry:
317 %0 = icmp slt i32 %a, %b
318 %1 = sext i1 %0 to i32
319 store i32 %1, i32 addrspace(1)* %out
320 ret void
321 }
322
323 ; FUNC-LABEL: @i32_sle
324 ; R600: SETGE_INT
325 ; SI: V_CMP_LE_I32
326 define void @i32_sle(i32 addrspace(1)* %out, i32 %a, i32 %b) {
327 entry:
328 %0 = icmp sle i32 %a, %b
329 %1 = sext i1 %0 to i32
330 store i32 %1, i32 addrspace(1)* %out
331 ret void
332 }
0 ;RUN: llc < %s -march=r600 -mcpu=SI | FileCheck --check-prefix=SI --check-prefix=FUNC %s
1
2 ; XXX: Merge this into setcc, once R600 supports 64-bit operations
3
4 ;;;==========================================================================;;;
5 ;; Double comparisons
6 ;;;==========================================================================;;;
7
8 ; FUNC-LABEL: @f64_oeq
9 ; SI: V_CMP_EQ_F64
10 define void @f64_oeq(i32 addrspace(1)* %out, double %a, double %b) {
11 entry:
12 %0 = fcmp oeq double %a, %b
13 %1 = sext i1 %0 to i32
14 store i32 %1, i32 addrspace(1)* %out
15 ret void
16 }
17
18 ; FUNC-LABEL: @f64_ogt
19 ; SI: V_CMP_GT_F64
20 define void @f64_ogt(i32 addrspace(1)* %out, double %a, double %b) {
21 entry:
22 %0 = fcmp ogt double %a, %b
23 %1 = sext i1 %0 to i32
24 store i32 %1, i32 addrspace(1)* %out
25 ret void
26 }
27
28 ; FUNC-LABEL: @f64_oge
29 ; SI: V_CMP_GE_F64
30 define void @f64_oge(i32 addrspace(1)* %out, double %a, double %b) {
31 entry:
32 %0 = fcmp oge double %a, %b
33 %1 = sext i1 %0 to i32
34 store i32 %1, i32 addrspace(1)* %out
35 ret void
36 }
37
38 ; FUNC-LABEL: @f64_olt
39 ; SI: V_CMP_LT_F64
40 define void @f64_olt(i32 addrspace(1)* %out, double %a, double %b) {
41 entry:
42 %0 = fcmp olt double %a, %b
43 %1 = sext i1 %0 to i32
44 store i32 %1, i32 addrspace(1)* %out
45 ret void
46 }
47
48 ; FUNC-LABEL: @f64_ole
49 ; SI: V_CMP_LE_F64
50 define void @f64_ole(i32 addrspace(1)* %out, double %a, double %b) {
51 entry:
52 %0 = fcmp ole double %a, %b
53 %1 = sext i1 %0 to i32
54 store i32 %1, i32 addrspace(1)* %out
55 ret void
56 }
57
58 ; FUNC-LABEL: @f64_one
59 ; SI: V_CMP_O_F64
60 ; SI: V_CMP_NEQ_F64
61 ; SI: S_AND_B64
62 define void @f64_one(i32 addrspace(1)* %out, double %a, double %b) {
63 entry:
64 %0 = fcmp one double %a, %b
65 %1 = sext i1 %0 to i32
66 store i32 %1, i32 addrspace(1)* %out
67 ret void
68 }
69
70 ; FUNC-LABEL: @f64_ord
71 ; SI: V_CMP_O_F64
72 define void @f64_ord(i32 addrspace(1)* %out, double %a, double %b) {
73 entry:
74 %0 = fcmp ord double %a, %b
75 %1 = sext i1 %0 to i32
76 store i32 %1, i32 addrspace(1)* %out
77 ret void
78 }
79
80 ; FUNC-LABEL: @f64_ueq
81 ; SI: V_CMP_U_F64
82 ; SI: V_CMP_EQ_F64
83 ; SI: S_OR_B64
84 define void @f64_ueq(i32 addrspace(1)* %out, double %a, double %b) {
85 entry:
86 %0 = fcmp ueq double %a, %b
87 %1 = sext i1 %0 to i32
88 store i32 %1, i32 addrspace(1)* %out
89 ret void
90 }
91
92 ; FUNC-LABEL: @f64_ugt
93 ; SI: V_CMP_U_F64
94 ; SI: V_CMP_GT_F64
95 ; SI: S_OR_B64
96 define void @f64_ugt(i32 addrspace(1)* %out, double %a, double %b) {
97 entry:
98 %0 = fcmp ugt double %a, %b
99 %1 = sext i1 %0 to i32
100 store i32 %1, i32 addrspace(1)* %out
101 ret void
102 }
103
104 ; FUNC-LABEL: @f64_uge
105 ; SI: V_CMP_U_F64
106 ; SI: V_CMP_GE_F64
107 ; SI: S_OR_B64
108 define void @f64_uge(i32 addrspace(1)* %out, double %a, double %b) {
109 entry:
110 %0 = fcmp uge double %a, %b
111 %1 = sext i1 %0 to i32
112 store i32 %1, i32 addrspace(1)* %out
113 ret void
114 }
115
116 ; FUNC-LABEL: @f64_ult
117 ; SI: V_CMP_U_F64
118 ; SI: V_CMP_LT_F64
119 ; SI: S_OR_B64
120 define void @f64_ult(i32 addrspace(1)* %out, double %a, double %b) {
121 entry:
122 %0 = fcmp ult double %a, %b
123 %1 = sext i1 %0 to i32
124 store i32 %1, i32 addrspace(1)* %out
125 ret void
126 }
127
128 ; FUNC-LABEL: @f64_ule
129 ; SI: V_CMP_U_F64
130 ; SI: V_CMP_LE_F64
131 ; SI: S_OR_B64
132 define void @f64_ule(i32 addrspace(1)* %out, double %a, double %b) {
133 entry:
134 %0 = fcmp ule double %a, %b
135 %1 = sext i1 %0 to i32
136 store i32 %1, i32 addrspace(1)* %out
137 ret void
138 }
139
140 ; FUNC-LABEL: @f64_une
141 ; SI: V_CMP_NEQ_F64
142 define void @f64_une(i32 addrspace(1)* %out, double %a, double %b) {
143 entry:
144 %0 = fcmp une double %a, %b
145 %1 = sext i1 %0 to i32
146 store i32 %1, i32 addrspace(1)* %out
147 ret void
148 }
149
150 ; FUNC-LABEL: @f64_uno
151 ; SI: V_CMP_U_F64
152 define void @f64_uno(i32 addrspace(1)* %out, double %a, double %b) {
153 entry:
154 %0 = fcmp uno double %a, %b
155 %1 = sext i1 %0 to i32
156 store i32 %1, i32 addrspace(1)* %out
157 ret void
158 }
159
160 ;;;==========================================================================;;;
161 ;; 64-bit integer comparisons
162 ;;;==========================================================================;;;
163
164 ; FUNC-LABEL: @i64_eq
165 ; SI: V_CMP_EQ_I64
166 define void @i64_eq(i32 addrspace(1)* %out, i64 %a, i64 %b) {
167 entry:
168 %0 = icmp eq i64 %a, %b
169 %1 = sext i1 %0 to i32
170 store i32 %1, i32 addrspace(1)* %out
171 ret void
172 }
173
174 ; FUNC-LABEL: @i64_ne
175 ; SI: V_CMP_NE_I64
176 define void @i64_ne(i32 addrspace(1)* %out, i64 %a, i64 %b) {
177 entry:
178 %0 = icmp ne i64 %a, %b
179 %1 = sext i1 %0 to i32
180 store i32 %1, i32 addrspace(1)* %out
181 ret void
182 }
183
184 ; FUNC-LABEL: @i64_ugt
185 ; SI: V_CMP_GT_U64
186 define void @i64_ugt(i32 addrspace(1)* %out, i64 %a, i64 %b) {
187 entry:
188 %0 = icmp ugt i64 %a, %b
189 %1 = sext i1 %0 to i32
190 store i32 %1, i32 addrspace(1)* %out
191 ret void
192 }
193
194 ; FUNC-LABEL: @i64_uge
195 ; SI: V_CMP_GE_U64
196 define void @i64_uge(i32 addrspace(1)* %out, i64 %a, i64 %b) {
197 entry:
198 %0 = icmp uge i64 %a, %b
199 %1 = sext i1 %0 to i32
200 store i32 %1, i32 addrspace(1)* %out
201 ret void
202 }
203
204 ; FUNC-LABEL: @i64_ult
205 ; SI: V_CMP_LT_U64
206 define void @i64_ult(i32 addrspace(1)* %out, i64 %a, i64 %b) {
207 entry:
208 %0 = icmp ult i64 %a, %b
209 %1 = sext i1 %0 to i32
210 store i32 %1, i32 addrspace(1)* %out
211 ret void
212 }
213
214 ; FUNC-LABEL: @i64_ule
215 ; SI: V_CMP_LE_U64
216 define void @i64_ule(i32 addrspace(1)* %out, i64 %a, i64 %b) {
217 entry:
218 %0 = icmp ule i64 %a, %b
219 %1 = sext i1 %0 to i32
220 store i32 %1, i32 addrspace(1)* %out
221 ret void
222 }
223
224 ; FUNC-LABEL: @i64_sgt
225 ; SI: V_CMP_GT_I64
226 define void @i64_sgt(i32 addrspace(1)* %out, i64 %a, i64 %b) {
227 entry:
228 %0 = icmp sgt i64 %a, %b
229 %1 = sext i1 %0 to i32
230 store i32 %1, i32 addrspace(1)* %out
231 ret void
232 }
233
234 ; FUNC-LABEL: @i64_sge
235 ; SI: V_CMP_GE_I64
236 define void @i64_sge(i32 addrspace(1)* %out, i64 %a, i64 %b) {
237 entry:
238 %0 = icmp sge i64 %a, %b
239 %1 = sext i1 %0 to i32
240 store i32 %1, i32 addrspace(1)* %out
241 ret void
242 }
243
244 ; FUNC-LABEL: @i64_slt
245 ; SI: V_CMP_LT_I64
246 define void @i64_slt(i32 addrspace(1)* %out, i64 %a, i64 %b) {
247 entry:
248 %0 = icmp slt i64 %a, %b
249 %1 = sext i1 %0 to i32
250 store i32 %1, i32 addrspace(1)* %out
251 ret void
252 }
253
254 ; FUNC-LABEL: @i64_sle
255 ; SI: V_CMP_LE_I64
256 define void @i64_sle(i32 addrspace(1)* %out, i64 %a, i64 %b) {
257 entry:
258 %0 = icmp sle i64 %a, %b
259 %1 = sext i1 %0 to i32
260 store i32 %1, i32 addrspace(1)* %out
261 ret void
262 }