llvm.org GIT mirror llvm / 0ef8f31
[PowerPC] Enable speculation of cttz/ctlz PPC has an instruction for ctlz with defined zero behavior, and our lowering of cttz (provided by DAGCombine) is also efficient and branchless, so speculating these makes sense. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225150 91177308-0d34-0410-b5e6-96231b3b80d8 Hal Finkel 5 years ago
2 changed file(s) with 49 addition(s) and 0 deletion(s). Raw diff Collapse all Expand all
385385 const char *getTargetNodeName(unsigned Opcode) const override;
386386
387387 MVT getScalarShiftAmountTy(EVT LHSTy) const override { return MVT::i32; }
388
389 bool isCheapToSpeculateCttz() const override {
390 return true;
391 }
392
393 bool isCheapToSpeculateCtlz() const override {
394 return true;
395 }
388396
389397 /// getSetCCResultType - Return the ISD::SETCC ValueType
390398 EVT getSetCCResultType(LLVMContext &Context, EVT VT) const override;
0 ; RUN: opt -S -codegenprepare < %s | FileCheck %s
1 target datalayout = "E-m:e-i64:64-n32:64"
2 target triple = "powerpc64-unknown-linux-gnu"
3
4 define i64 @test1(i64 %A) {
5 ; CHECK-LABEL: @test1(
6 ; CHECK: [[CTLZ:%[A-Za-z0-9]+]] = call i64 @llvm.ctlz.i64(i64 %A, i1 false)
7 ; CHECK-NEXT: ret i64 [[CTLZ]]
8 entry:
9 %tobool = icmp eq i64 %A, 0
10 br i1 %tobool, label %cond.end, label %cond.true
11
12 cond.true: ; preds = %entry
13 %0 = tail call i64 @llvm.ctlz.i64(i64 %A, i1 true)
14 br label %cond.end
15
16 cond.end: ; preds = %entry, %cond.true
17 %cond = phi i64 [ %0, %cond.true ], [ 64, %entry ]
18 ret i64 %cond
19 }
20
21 define i64 @test1b(i64 %A) {
22 ; CHECK-LABEL: @test1b(
23 ; CHECK: [[CTTZ:%[A-Za-z0-9]+]] = call i64 @llvm.cttz.i64(i64 %A, i1 false)
24 ; CHECK-NEXT: ret i64 [[CTTZ]]
25 entry:
26 %tobool = icmp eq i64 %A, 0
27 br i1 %tobool, label %cond.end, label %cond.true
28
29 cond.true: ; preds = %entry
30 %0 = tail call i64 @llvm.cttz.i64(i64 %A, i1 true)
31 br label %cond.end
32
33 cond.end: ; preds = %entry, %cond.true
34 %cond = phi i64 [ %0, %cond.true ], [ 64, %entry ]
35 ret i64 %cond
36 }
37
38 declare i64 @llvm.ctlz.i64(i64, i1)
39 declare i64 @llvm.cttz.i64(i64, i1)
40