llvm.org GIT mirror llvm / 0e496c8
Make isLegalAddressingMode() taking DataLayout as an argument Summary: This change is part of a series of commits dedicated to have a single DataLayout during compilation by using always the one owned by the module. Reviewers: echristo Subscribers: jholewinski, llvm-commits, rafael, yaron.keren Differential Revision: http://reviews.llvm.org/D11040 From: Mehdi Amini <mehdi.amini@apple.com> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241778 91177308-0d34-0410-b5e6-96231b3b80d8 Mehdi Amini 5 years ago
25 changed file(s) with 68 addition(s) and 68 deletion(s). Raw diff Collapse all Expand all
125125 AM.BaseOffs = BaseOffset;
126126 AM.HasBaseReg = HasBaseReg;
127127 AM.Scale = Scale;
128 return getTLI()->isLegalAddressingMode(AM, Ty, AddrSpace);
128 return getTLI()->isLegalAddressingMode(DL, AM, Ty, AddrSpace);
129129 }
130130
131131 int getScalingFactorCost(Type *Ty, GlobalValue *BaseGV, int64_t BaseOffset,
135135 AM.BaseOffs = BaseOffset;
136136 AM.HasBaseReg = HasBaseReg;
137137 AM.Scale = Scale;
138 return getTLI()->getScalingFactorCost(AM, Ty, AddrSpace);
138 return getTLI()->getScalingFactorCost(DL, AM, Ty, AddrSpace);
139139 }
140140
141141 bool isTruncateFree(Type *Ty1, Type *Ty2) {
14611461 /// If the address space cannot be determined, it will be -1.
14621462 ///
14631463 /// TODO: Remove default argument
1464 virtual bool isLegalAddressingMode(const AddrMode &AM, Type *Ty,
1465 unsigned AddrSpace) const;
1464 virtual bool isLegalAddressingMode(const DataLayout &DL, const AddrMode &AM,
1465 Type *Ty, unsigned AddrSpace) const;
14661466
14671467 /// \brief Return the cost of the scaling factor used in the addressing mode
14681468 /// represented by AM for this target, for a load/store of the specified type.
14711471 /// If the AM is not supported, it returns a negative value.
14721472 /// TODO: Handle pre/postinc as well.
14731473 /// TODO: Remove default argument
1474 virtual int getScalingFactorCost(const AddrMode &AM, Type *Ty,
1475 unsigned AS = 0) const {
1474 virtual int getScalingFactorCost(const DataLayout &DL, const AddrMode &AM,
1475 Type *Ty, unsigned AS = 0) const {
14761476 // Default: assume that any scaling factor used in a legal AM is free.
1477 if (isLegalAddressingMode(AM, Ty, AS))
1477 if (isLegalAddressingMode(DL, AM, Ty, AS))
14781478 return 0;
14791479 return -1;
14801480 }
22042204 TestAddrMode.ScaledReg = ScaleReg;
22052205
22062206 // If the new address isn't legal, bail out.
2207 if (!TLI.isLegalAddressingMode(TestAddrMode, AccessTy, AddrSpace))
2207 if (!TLI.isLegalAddressingMode(DL, TestAddrMode, AccessTy, AddrSpace))
22082208 return false;
22092209
22102210 // It was legal, so commit it.
22212221
22222222 // If this addressing mode is legal, commit it and remember that we folded
22232223 // this instruction.
2224 if (TLI.isLegalAddressingMode(TestAddrMode, AccessTy, AddrSpace)) {
2224 if (TLI.isLegalAddressingMode(DL, TestAddrMode, AccessTy, AddrSpace)) {
22252225 AddrModeInsts.push_back(cast(ScaleReg));
22262226 AddrMode = TestAddrMode;
22272227 return true;
27882788 if (VariableOperand == -1) {
27892789 AddrMode.BaseOffs += ConstantOffset;
27902790 if (ConstantOffset == 0 ||
2791 TLI.isLegalAddressingMode(AddrMode, AccessTy, AddrSpace)) {
2791 TLI.isLegalAddressingMode(DL, AddrMode, AccessTy, AddrSpace)) {
27922792 // Check to see if we can fold the base pointer in too.
27932793 if (MatchAddr(AddrInst->getOperand(0), Depth+1))
27942794 return true;
29112911 if (ConstantInt *CI = dyn_cast(Addr)) {
29122912 // Fold in immediates if legal for the target.
29132913 AddrMode.BaseOffs += CI->getSExtValue();
2914 if (TLI.isLegalAddressingMode(AddrMode, AccessTy, AddrSpace))
2914 if (TLI.isLegalAddressingMode(DL, AddrMode, AccessTy, AddrSpace))
29152915 return true;
29162916 AddrMode.BaseOffs -= CI->getSExtValue();
29172917 } else if (GlobalValue *GV = dyn_cast(Addr)) {
29182918 // If this is a global variable, try to fold it into the addressing mode.
29192919 if (!AddrMode.BaseGV) {
29202920 AddrMode.BaseGV = GV;
2921 if (TLI.isLegalAddressingMode(AddrMode, AccessTy, AddrSpace))
2921 if (TLI.isLegalAddressingMode(DL, AddrMode, AccessTy, AddrSpace))
29222922 return true;
29232923 AddrMode.BaseGV = nullptr;
29242924 }
29622962 AddrMode.HasBaseReg = true;
29632963 AddrMode.BaseReg = Addr;
29642964 // Still check for legality in case the target supports [imm] but not [i+r].
2965 if (TLI.isLegalAddressingMode(AddrMode, AccessTy, AddrSpace))
2965 if (TLI.isLegalAddressingMode(DL, AddrMode, AccessTy, AddrSpace))
29662966 return true;
29672967 AddrMode.HasBaseReg = false;
29682968 AddrMode.BaseReg = nullptr;
29722972 if (AddrMode.Scale == 0) {
29732973 AddrMode.Scale = 1;
29742974 AddrMode.ScaledReg = Addr;
2975 if (TLI.isLegalAddressingMode(AddrMode, AccessTy, AddrSpace))
2975 if (TLI.isLegalAddressingMode(DL, AddrMode, AccessTy, AddrSpace))
29762976 return true;
29772977 AddrMode.Scale = 0;
29782978 AddrMode.ScaledReg = nullptr;
91429142 } else
91439143 return false;
91449144
9145 return TLI.isLegalAddressingMode(AM, VT.getTypeForEVT(*DAG.getContext()), AS);
9145 return TLI.isLegalAddressingMode(DAG.getDataLayout(), AM,
9146 VT.getTypeForEVT(*DAG.getContext()), AS);
91469147 }
91479148
91489149 /// Try turning a load/store into a pre-indexed load/store when the base
16311631
16321632 /// isLegalAddressingMode - Return true if the addressing mode represented
16331633 /// by AM is legal for this target, for a load/store of the specified type.
1634 bool TargetLoweringBase::isLegalAddressingMode(const AddrMode &AM,
1635 Type *Ty,
1634 bool TargetLoweringBase::isLegalAddressingMode(const DataLayout &DL,
1635 const AddrMode &AM, Type *Ty,
16361636 unsigned AS) const {
16371637 // The default implementation of this implements a conservative RISCy, r+r and
16381638 // r+i addr mode.
68996899
69006900 /// isLegalAddressingMode - Return true if the addressing mode represented
69016901 /// by AM is legal for this target, for a load/store of the specified type.
6902 bool AArch64TargetLowering::isLegalAddressingMode(const AddrMode &AM,
6903 Type *Ty,
6902 bool AArch64TargetLowering::isLegalAddressingMode(const DataLayout &DL,
6903 const AddrMode &AM, Type *Ty,
69046904 unsigned AS) const {
69056905 // AArch64 has five basic addressing modes:
69066906 // reg
69216921 // i.e., reg + 0, reg + imm9, reg + SIZE_IN_BYTES * uimm12
69226922 uint64_t NumBytes = 0;
69236923 if (Ty->isSized()) {
6924 uint64_t NumBits = getDataLayout()->getTypeSizeInBits(Ty);
6924 uint64_t NumBits = DL.getTypeSizeInBits(Ty);
69256925 NumBytes = NumBits / 8;
69266926 if (!isPowerOf2_64(NumBits))
69276927 NumBytes = 0;
69516951 return false;
69526952 }
69536953
6954 int AArch64TargetLowering::getScalingFactorCost(const AddrMode &AM,
6955 Type *Ty,
6954 int AArch64TargetLowering::getScalingFactorCost(const DataLayout &DL,
6955 const AddrMode &AM, Type *Ty,
69566956 unsigned AS) const {
69576957 // Scaling factors are not free at all.
69586958 // Operands | Rt Latency
69616961 // -------------------------------------------
69626962 // Rt, [Xn, Xm, lsl #imm] | Rn: 4 Rm: 5
69636963 // Rt, [Xn, Wm, #imm] |
6964 if (isLegalAddressingMode(AM, Ty, AS))
6964 if (isLegalAddressingMode(DL, AM, Ty, AS))
69656965 // Scale represents reg2 * scale, thus account for 1 if
69666966 // it is not equal to 0 or 1.
69676967 return AM.Scale != 0 && AM.Scale != 1;
323323
324324 /// isLegalAddressingMode - Return true if the addressing mode represented
325325 /// by AM is legal for this target, for a load/store of the specified type.
326 bool isLegalAddressingMode(const AddrMode &AM, Type *Ty,
326 bool isLegalAddressingMode(const DataLayout &DL, const AddrMode &AM, Type *Ty,
327327 unsigned AS) const override;
328328
329329 /// \brief Return the cost of the scaling factor used in the addressing
331331 /// of the specified type.
332332 /// If the AM is supported, the return value must be >= 0.
333333 /// If the AM is not supported, it returns a negative value.
334 int getScalingFactorCost(const AddrMode &AM, Type *Ty,
334 int getScalingFactorCost(const DataLayout &DL, const AddrMode &AM, Type *Ty,
335335 unsigned AS) const override;
336336
337337 /// isFMAFasterThanFMulAndFAdd - Return true if an FMA operation is faster
253253 return false;
254254 }
255255
256 bool SITargetLowering::isLegalAddressingMode(const AddrMode &AM,
257 Type *Ty, unsigned AS) const {
256 bool SITargetLowering::isLegalAddressingMode(const DataLayout &DL,
257 const AddrMode &AM, Type *Ty,
258 unsigned AS) const {
258259 // No global is ever allowed as a base.
259260 if (AM.BaseGV)
260261 return false;
6161 bool isShuffleMaskLegal(const SmallVectorImpl &/*Mask*/,
6262 EVT /*VT*/) const override;
6363
64 bool isLegalAddressingMode(const AddrMode &AM,
65 Type *Ty, unsigned AS) const override;
64 bool isLegalAddressingMode(const DataLayout &DL, const AddrMode &AM, Type *Ty,
65 unsigned AS) const override;
6666
6767 bool allowsMisalignedMemoryAccesses(EVT VT, unsigned AS,
6868 unsigned Align,
1031810318
1031910319 /// isLegalAddressingMode - Return true if the addressing mode represented
1032010320 /// by AM is legal for this target, for a load/store of the specified type.
10321 bool ARMTargetLowering::isLegalAddressingMode(const AddrMode &AM,
10322 Type *Ty,
10321 bool ARMTargetLowering::isLegalAddressingMode(const DataLayout &DL,
10322 const AddrMode &AM, Type *Ty,
1032310323 unsigned AS) const {
10324 EVT VT = getValueType(*getDataLayout(), Ty, true);
10324 EVT VT = getValueType(DL, Ty, true);
1032510325 if (!isLegalAddressImmediate(AM.BaseOffs, VT, Subtarget))
1032610326 return false;
1032710327
286286
287287 /// isLegalAddressingMode - Return true if the addressing mode represented
288288 /// by AM is legal for this target, for a load/store of the specified type.
289 bool isLegalAddressingMode(const AddrMode &AM, Type *Ty,
290 unsigned AS) const override;
289 bool isLegalAddressingMode(const DataLayout &DL, const AddrMode &AM,
290 Type *Ty, unsigned AS) const override;
291291 bool isLegalT2ScaledAddressingMode(const AddrMode &AM, EVT VT) const;
292292
293293 /// isLegalICmpImmediate - Return true if the specified immediate is legal
23742374
23752375 /// isLegalAddressingMode - Return true if the addressing mode represented by
23762376 /// AM is legal for this target, for a load/store of the specified type.
2377 bool HexagonTargetLowering::isLegalAddressingMode(const AddrMode &AM,
2378 Type *Ty,
2377 bool HexagonTargetLowering::isLegalAddressingMode(const DataLayout &DL,
2378 const AddrMode &AM, Type *Ty,
23792379 unsigned AS) const {
23802380 // Allows a signed-extended 11-bit immediate field.
23812381 if (AM.BaseOffs <= -(1LL << 13) || AM.BaseOffs >= (1LL << 13)-1)
197197 /// The type may be VoidTy, in which case only return true if the addressing
198198 /// mode is legal for a load/store of any legal type.
199199 /// TODO: Handle pre/postinc as well.
200 bool isLegalAddressingMode(const AddrMode &AM, Type *Ty,
201 unsigned AS) const override;
200 bool isLegalAddressingMode(const DataLayout &DL, const AddrMode &AM,
201 Type *Ty, unsigned AS) const override;
202202 bool isFPImmLegal(const APFloat &Imm, EVT VT) const override;
203203
204204 /// isLegalICmpImmediate - Return true if the specified immediate is legal
35493549 TargetLowering::LowerAsmOperandForConstraint(Op, Constraint, Ops, DAG);
35503550 }
35513551
3552 bool MipsTargetLowering::isLegalAddressingMode(const AddrMode &AM,
3553 Type *Ty,
3552 bool MipsTargetLowering::isLegalAddressingMode(const DataLayout &DL,
3553 const AddrMode &AM, Type *Ty,
35543554 unsigned AS) const {
35553555 // No global is ever allowed as a base.
35563556 if (AM.BaseGV)
514514 return TargetLowering::getInlineAsmMemConstraint(ConstraintCode);
515515 }
516516
517 bool isLegalAddressingMode(const AddrMode &AM, Type *Ty,
518 unsigned AS) const override;
517 bool isLegalAddressingMode(const DataLayout &DL, const AddrMode &AM,
518 Type *Ty, unsigned AS) const override;
519519
520520 bool isOffsetFoldingLegal(const GlobalAddressSDNode *GA) const override;
521521
37313731 /// Used to guide target specific optimizations, like loop strength reduction
37323732 /// (LoopStrengthReduce.cpp) and memory optimization for address mode
37333733 /// (CodeGenPrepare.cpp)
3734 bool NVPTXTargetLowering::isLegalAddressingMode(const AddrMode &AM,
3735 Type *Ty,
3734 bool NVPTXTargetLowering::isLegalAddressingMode(const DataLayout &DL,
3735 const AddrMode &AM, Type *Ty,
37363736 unsigned AS) const {
37373737
37383738 // AddrMode - This represents an addressing mode of:
455455 /// Used to guide target specific optimizations, like loop strength
456456 /// reduction (LoopStrengthReduce.cpp) and memory optimization for
457457 /// address mode (CodeGenPrepare.cpp)
458 bool isLegalAddressingMode(const AddrMode &AM, Type *Ty,
458 bool isLegalAddressingMode(const DataLayout &DL, const AddrMode &AM, Type *Ty,
459459 unsigned AS) const override;
460460
461461 /// getFunctionAlignment - Return the Log2 alignment of this function.
1092910929
1093010930 // isLegalAddressingMode - Return true if the addressing mode represented
1093110931 // by AM is legal for this target, for a load/store of the specified type.
10932 bool PPCTargetLowering::isLegalAddressingMode(const AddrMode &AM,
10933 Type *Ty,
10932 bool PPCTargetLowering::isLegalAddressingMode(const DataLayout &DL,
10933 const AddrMode &AM, Type *Ty,
1093410934 unsigned AS) const {
1093510935 // PPC does not allow r+i addressing modes for vectors!
1093610936 if (Ty->isVectorTy() && AM.BaseOffs != 0)
562562
563563 /// isLegalAddressingMode - Return true if the addressing mode represented
564564 /// by AM is legal for this target, for a load/store of the specified type.
565 bool isLegalAddressingMode(const AddrMode &AM, Type *Ty,
566 unsigned AS) const override;
565 bool isLegalAddressingMode(const DataLayout &DL, const AddrMode &AM,
566 Type *Ty, unsigned AS) const override;
567567
568568 /// isLegalICmpImmediate - Return true if the specified immediate is legal
569569 /// icmp immediate, that is the target has icmp instructions which can
508508 return true;
509509 }
510510
511 bool SystemZTargetLowering::isLegalAddressingMode(const AddrMode &AM,
512 Type *Ty,
511 bool SystemZTargetLowering::isLegalAddressingMode(const DataLayout &DL,
512 const AddrMode &AM, Type *Ty,
513513 unsigned AS) const {
514514 // Punt on globals for now, although they can be used in limited
515515 // RELATIVE LONG cases.
369369 bool isFPImmLegal(const APFloat &Imm, EVT VT) const override;
370370 bool isLegalICmpImmediate(int64_t Imm) const override;
371371 bool isLegalAddImmediate(int64_t Imm) const override;
372 bool isLegalAddressingMode(const AddrMode &AM, Type *Ty,
372 bool isLegalAddressingMode(const DataLayout &DL, const AddrMode &AM, Type *Ty,
373373 unsigned AS) const override;
374374 bool allowsMisalignedMemoryAccesses(EVT VT, unsigned AS,
375375 unsigned Align,
1893918939
1894018940 // isLegalAddressingMode - Return true if the addressing mode represented
1894118941 // by AM is legal for this target, for a load/store of the specified type.
18942 bool X86TargetLowering::isLegalAddressingMode(const AddrMode &AM,
18943 Type *Ty,
18942 bool X86TargetLowering::isLegalAddressingMode(const DataLayout &DL,
18943 const AddrMode &AM, Type *Ty,
1894418944 unsigned AS) const {
1894518945 // X86 supports extremely general addressing modes.
1894618946 CodeModel::Model M = getTargetMachine().getCodeModel();
2608526085 return Res;
2608626086 }
2608726087
26088 int X86TargetLowering::getScalingFactorCost(const AddrMode &AM,
26089 Type *Ty,
26088 int X86TargetLowering::getScalingFactorCost(const DataLayout &DL,
26089 const AddrMode &AM, Type *Ty,
2609026090 unsigned AS) const {
2609126091 // Scaling factors are not free at all.
2609226092 // An indexed folded instruction, i.e., inst (reg1, reg2, scale),
2610626106 // E.g., on Haswell:
2610726107 // vmovaps %ymm1, (%r8, %rdi) can use port 2 or 3.
2610826108 // vmovaps %ymm1, (%r8) can use port 2, 3, or 7.
26109 if (isLegalAddressingMode(AM, Ty, AS))
26109 if (isLegalAddressingMode(DL, AM, Ty, AS))
2611026110 // Scale represents reg2 * scale, thus account for 1
2611126111 // as soon as we use a second register.
2611226112 return AM.Scale != 0;
750750
751751 /// Return true if the addressing mode represented
752752 /// by AM is legal for this target, for a load/store of the specified type.
753 bool isLegalAddressingMode(const AddrMode &AM, Type *Ty,
754 unsigned AS) const override;
753 bool isLegalAddressingMode(const DataLayout &DL, const AddrMode &AM,
754 Type *Ty, unsigned AS) const override;
755755
756756 /// Return true if the specified immediate is legal
757757 /// icmp immediate, that is the target has icmp instructions which can
770770 /// of the specified type.
771771 /// If the AM is supported, the return value must be >= 0.
772772 /// If the AM is not supported, it returns a negative value.
773 int getScalingFactorCost(const AddrMode &AM, Type *Ty,
773 int getScalingFactorCost(const DataLayout &DL, const AddrMode &AM, Type *Ty,
774774 unsigned AS) const override;
775775
776776 bool isVectorShiftByScalarCheap(Type *Ty) const override;
19221922
19231923 /// isLegalAddressingMode - Return true if the addressing mode represented
19241924 /// by AM is legal for this target, for a load/store of the specified type.
1925 bool
1926 XCoreTargetLowering::isLegalAddressingMode(const AddrMode &AM,
1927 Type *Ty,
1928 unsigned AS) const {
1925 bool XCoreTargetLowering::isLegalAddressingMode(const DataLayout &DL,
1926 const AddrMode &AM, Type *Ty,
1927 unsigned AS) const {
19291928 if (Ty->getTypeID() == Type::VoidTyID)
19301929 return AM.Scale == 0 && isImmUs(AM.BaseOffs) && isImmUs4(AM.BaseOffs);
19311930
1932 const DataLayout *TD = TM.getDataLayout();
1933 unsigned Size = TD->getTypeAllocSize(Ty);
1931 unsigned Size = DL.getTypeAllocSize(Ty);
19341932 if (AM.BaseGV) {
19351933 return Size >= 4 && !AM.HasBaseReg && AM.Scale == 0 &&
19361934 AM.BaseOffs%4 == 0;
121121 EmitInstrWithCustomInserter(MachineInstr *MI,
122122 MachineBasicBlock *MBB) const override;
123123
124 bool isLegalAddressingMode(const AddrMode &AM, Type *Ty,
125 unsigned AS) const override;
124 bool isLegalAddressingMode(const DataLayout &DL, const AddrMode &AM,
125 Type *Ty, unsigned AS) const override;
126126
127127 private:
128128 const TargetMachine &TM;