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[TableGen] Prevent invalid code generation when emitting AssemblerPredicate conditions. Summary: The loop which emits AssemblerPredicate conditions also links them together by emitting a '&&'. If the 1st predicate is not an AssemblerPredicate, while the 2nd one is, nothing gets emitted for the 1st one, but we still emit the '&&' because of the 2nd predicate. This generated code looks like "( && Cond2)" and is invalid. Reviewers: dsanders Reviewed By: dsanders Subscribers: dsanders, llvm-commits Differential Revision: http://reviews.llvm.org/D8294 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@234312 91177308-0d34-0410-b5e6-96231b3b80d8 Toma Tabacu 4 years ago
2 changed file(s) with 34 addition(s) and 1 deletion(s). Raw diff Collapse all Expand all
0 // RUN: llvm-tblgen -gen-disassembler -I %p/../../include %s | FileCheck %s
1
2 // Check that we don't generate invalid code of the form "( && Cond2)" when
3 // emitting AssemblerPredicate conditions. In the example below, the invalid
4 // code would be: "return ( && (Bits & arch::AssemblerCondition2));".
5
6 include "llvm/Target/Target.td"
7
8 def archInstrInfo : InstrInfo { }
9
10 def arch : Target {
11 let InstructionSet = archInstrInfo;
12 }
13
14 def Pred1 : Predicate<"Condition1">;
15 def Pred2 : Predicate<"Condition2">,
16 AssemblerPredicate<"AssemblerCondition2">;
17
18 def foo : Instruction {
19 let Size = 2;
20 let OutOperandList = (outs);
21 let InOperandList = (ins);
22 field bits<16> Inst;
23 let Inst = 0xAAAA;
24 let AsmString = "foo";
25 field bits<16> SoftFail = 0;
26 // This is the important bit:
27 let Predicates = [Pred1, Pred2];
28 }
29
30 // CHECK: return ((Bits & arch::AssemblerCondition2));
11111111 unsigned Opc) const {
11121112 ListInit *Predicates =
11131113 AllInstructions[Opc]->TheDef->getValueAsListInit("Predicates");
1114 bool IsFirstEmission = true;
11141115 for (unsigned i = 0; i < Predicates->getSize(); ++i) {
11151116 Record *Pred = Predicates->getElementAsRecord(i);
11161117 if (!Pred->getValue("AssemblerMatcherPredicate"))
11211122 if (!P.length())
11221123 continue;
11231124
1124 if (i != 0)
1125 if (!IsFirstEmission)
11251126 o << " && ";
11261127
11271128 StringRef SR(P);
11321133 pairs = pairs.second.split(',');
11331134 }
11341135 emitSinglePredicateMatch(o, pairs.first, Emitter->PredicateNamespace);
1136 IsFirstEmission = false;
11351137 }
11361138 return Predicates->getSize() > 0;
11371139 }