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[AVX-512] Teach X86InstrInfo::copyPhysReg to use a 512-bit move if XMM16-XMM31 or YMM16-YMM31 are the source or dest of the copy and VLX is not supported. This can happen with SUBREG_TO_REG of ZMM16-ZMM31. Fixes PR30430. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@281959 91177308-0d34-0410-b5e6-96231b3b80d8 Craig Topper 3 years ago
3 changed file(s) with 38 addition(s) and 5 deletion(s). Raw diff Collapse all Expand all
47034703 }
47044704 else if (X86::VR64RegClass.contains(DestReg, SrcReg))
47054705 Opc = X86::MMX_MOVQ64rr;
4706 else if (X86::VR128XRegClass.contains(DestReg, SrcReg))
4707 Opc = HasVLX ? X86::VMOVAPSZ128rr : HasAVX ? X86::VMOVAPSrr : X86::MOVAPSrr;
4708 else if (X86::VR256XRegClass.contains(DestReg, SrcReg))
4709 Opc = HasVLX ? X86::VMOVAPSZ256rr : X86::VMOVAPSYrr;
4710 else if (X86::VR512RegClass.contains(DestReg, SrcReg))
4706 else if (X86::VR128XRegClass.contains(DestReg, SrcReg)) {
4707 if (HasVLX)
4708 Opc = X86::VMOVAPSZ128rr;
4709 else if (X86::VR128RegClass.contains(DestReg, SrcReg))
4710 Opc = HasAVX ? X86::VMOVAPSrr : X86::MOVAPSrr;
4711 else {
4712 // If this an extended register and we don't have VLX we need to use a
4713 // 512-bit move.
4714 Opc = X86::VMOVAPSZrr;
4715 DestReg = get512BitSuperRegister(DestReg);
4716 SrcReg = get512BitSuperRegister(SrcReg);
4717 }
4718 } else if (X86::VR256XRegClass.contains(DestReg, SrcReg)) {
4719 if (HasVLX)
4720 Opc = X86::VMOVAPSZ256rr;
4721 else if (X86::VR256RegClass.contains(DestReg, SrcReg))
4722 Opc = X86::VMOVAPSYrr;
4723 else {
4724 // If this an extended register and we don't have VLX we need to use a
4725 // 512-bit move.
4726 Opc = X86::VMOVAPSZrr;
4727 DestReg = get512BitSuperRegister(DestReg);
4728 SrcReg = get512BitSuperRegister(SrcReg);
4729 }
4730 } else if (X86::VR512RegClass.contains(DestReg, SrcReg))
47114731 Opc = X86::VMOVAPSZrr;
47124732 // All KMASK RegClasses hold the same k registers, can be tested against anyone.
47134733 else if (X86::VK16RegClass.contains(DestReg, SrcReg))
690690 FrameReg = getX86SubSuperRegister(FrameReg, 32);
691691 return FrameReg;
692692 }
693
694 unsigned llvm::get512BitSuperRegister(unsigned Reg) {
695 if (Reg >= X86::XMM0 && Reg <= X86::XMM31)
696 return X86::ZMM0 + (Reg - X86::XMM0);
697 if (Reg >= X86::YMM0 && Reg <= X86::YMM31)
698 return X86::ZMM0 + (Reg - X86::YMM0);
699 if (Reg >= X86::ZMM0 && Reg <= X86::ZMM31)
700 return Reg;
701 llvm_unreachable("Unexpected SIMD register");
702 }
136136 unsigned getSlotSize() const { return SlotSize; }
137137 };
138138
139 //get512BitRegister - X86 utility - returns 512-bit super register
140 unsigned get512BitSuperRegister(unsigned Reg);
141
139142 } // End llvm namespace
140143
141144 #endif