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NFC - Various typo fixes in tests git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@336268 91177308-0d34-0410-b5e6-96231b3b80d8 Gabor Buella 1 year, 2 months ago
25 changed file(s) with 92 addition(s) and 92 deletion(s). Raw diff Collapse all Expand all
33 target datalayout = "e-m:e-i64:64-i128:128-n32:64-S128"
44 target triple = "arm64--linux-gnu"
55
6 ; CHECK-LABLE: @aarch64_tree_tests_and
6 ; CHECK-LABEL: @aarch64_tree_tests_and
77 ; CHECK: .hword 32768
88 ; CHECK: .hword 32767
99 ; CHECK: .hword 4664
2121 ret <8 x i16> %ret
2222 }
2323
24 ; CHECK-LABLE: @aarch64_tree_tests_or
24 ; CHECK-LABEL: @aarch64_tree_tests_or
2525 ; CHECK: .hword 32768
2626 ; CHECK: .hword 32766
2727 ; CHECK: .hword 4664
33
44 ; Function Attrs: nounwind readnone
55 define i32 @test1(i8 %a) {
6 ; CHECK-LABLE: @test1
6 ; CHECK-LABEL: @test1
77 ; CHECK: ubfx {{w[0-9]+}}, w0, #3, #5
88 entry:
99 %conv = zext i8 %a to i32
1313
1414 ; Function Attrs: nounwind readnone
1515 define i32 @test2(i8 %a) {
16 ; CHECK-LABLE: @test2
16 ; CHECK-LABEL: @test2
1717 ; CHECK: and {{w[0-9]+}}, w0, #0xff
1818 ; CHECK: ubfx {{w[0-9]+}}, w0, #3, #5
1919 entry:
77 ; Sign extension is used more than once, thus it should not be folded.
88 ; CodeGenPrepare is not sharing sext across uses, thus this is folded because
99 ; of that.
10 ; _CHECK-NOT_: , sxtw]
10 ; _CHECK-NOT: , sxtw]
1111 entry:
1212 %idxprom = sext i32 %i1 to i64
1313 %0 = load i8*, i8** @block, align 8
7878 entry:
7979 ; CHECK-LABEL: foo7:
8080 ; CHECK: sub
81 ; CHECK-next: adds
82 ; CHECK-next: csneg
83 ; CHECK-next: b
81 ; CHECK-NEXT: adds
82 ; CHECK-NEXT: csneg
83 ; CHECK-NEXT: b
8484 %sub = sub nsw i32 %a, %b
8585 %cmp = icmp sgt i32 %sub, -1
8686 %sub3 = sub nsw i32 0, %sub
0 ; RUN: llc < %s -O3 -mtriple=aarch64-eabi | FileCheck %s
11
22 define i16 @test_1cmp_signed_1(i16* %ptr1) {
3 ; CHECK-LABLE: @test_1cmp_signed_1
3 ; CHECK-LABEL: @test_1cmp_signed_1
44 ; CHECK: ldrsh
55 ; CHECK-NEXT: cmn
66 entry:
1515 }
1616
1717 define i16 @test_1cmp_signed_2(i16* %ptr1) {
18 ; CHECK-LABLE: @test_1cmp_signed_2
18 ; CHECK-LABEL: @test_1cmp_signed_2
1919 ; CHECK: ldrsh
2020 ; CHECK-NEXT: cmn
2121 entry:
3030 }
3131
3232 define i16 @test_1cmp_unsigned_1(i16* %ptr1) {
33 ; CHECK-LABLE: @test_1cmp_unsigned_1
33 ; CHECK-LABEL: @test_1cmp_unsigned_1
3434 ; CHECK: ldrsh
3535 ; CHECK-NEXT: cmn
3636 entry:
3333 define i32* @test_array4(i32* %a) {
3434 ; CHECK-LABEL: test_array4
3535 ; CHECK: mov [[REG:x[0-9]+]], #4104
36 ; CHECK-NEXR: add x0, x0, [[REG]]
36 ; CHECK-NEXT: add x0, x0, [[REG]]
3737 %1 = getelementptr inbounds i32, i32* %a, i64 1026
3838 ret i32* %1
3939 }
2929 ; CHECK: ADJCALLSTACKDOWN 8, 0, 14, $noreg, implicit-def $sp, implicit $sp
3030 ; CHECK-DAG: $r0 = COPY [[BVREG]]
3131 ; CHECK-DAG: $r1 = COPY [[AVREG]]
32 ; CHECK-DxAG: $r2 = COPY [[BVREG]]
32 ; CHECK-DAG: $r2 = COPY [[BVREG]]
3333 ; CHECK-DAG: $r3 = COPY [[AVREG]]
3434 ; CHECK: [[SP1:%[0-9]+]]:_(p0) = COPY $sp
3535 ; CHECK: [[OFF1:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
395395 ; CHECK-T1-M0: str r3, [r2]
396396
397397 ; CHECK-BAREMETAL-NOT: dmb
398 ; CHECK-BAREMTEAL: str r1, [r0]
398 ; CHECK-BAREMETAL: str r1, [r0]
399399 ; CHECK-BAREMETAL-NOT: dmb
400 ; CHECK-BAREMTEAL: str r3, [r2]
400 ; CHECK-BAREMETAL: str r3, [r2]
401401
402402 ret void
403403 }
3434 ; CHECK-ARM: sub sp, sp, #4096
3535 ; CHECK-ARM: .cfi_endproc
3636
37 ; CHECK-ARM-FP_ELIM-LABEL: test2:
38 ; CHECK-ARM-FP_ELIM: .cfi_startproc
39 ; CHECK-ARM-FP_ELIM: push {r4, r5}
40 ; CHECK-ARM-FP_ELIM: .cfi_def_cfa_offset 8
41 ; CHECK-ARM-FP_ELIM: .cfi_offset 54, -4
42 ; CHECK-ARM-FP_ELIM: .cfi_offset r4, -8
43 ; CHECK-ARM-FP_ELIM: sub sp, sp, #72
44 ; CHECK-ARM-FP_ELIM: sub sp, sp, #4096
45 ; CHECK-ARM-FP_ELIM: .cfi_def_cfa_offset 4176
46 ; CHECK-ARM-FP_ELIM: .cfi_endproc
37 ; CHECK-ARM-FP-ELIM-LABEL: test2:
38 ; CHECK-ARM-FP-ELIM: .cfi_startproc
39 ; CHECK-ARM-FP-ELIM: push {r4, r5}
40 ; CHECK-ARM-FP-ELIM: .cfi_def_cfa_offset 8
41 ; CHECK-ARM-FP-ELIM: .cfi_offset 54, -4
42 ; CHECK-ARM-FP-ELIM: .cfi_offset r4, -8
43 ; CHECK-ARM-FP-ELIM: sub sp, sp, #72
44 ; CHECK-ARM-FP-ELIM: sub sp, sp, #4096
45 ; CHECK-ARM-FP-ELIM: .cfi_def_cfa_offset 4176
46 ; CHECK-ARM-FP-ELIM: .cfi_endproc
4747
4848 define i32 @test3() {
4949 %retval = alloca i32, align 4
1919 ; * all functions use base AAPCS
2020 ; * floating point instructions permitted, so __aeabi_ helpers only
2121 ; expected when there is no available instruction.
22 ; CHECK-HARD-FP-SP -mfloat-abi=hardfp (single precision instructions)
22 ; CHECK-HARDFP-SP -mfloat-abi=hardfp (single precision instructions)
2323 ; * all non Runtime ABI helper functions use AAPCS VFP
2424 ; * floating point instructions permitted, so __aeabi_ helpers only
2525 ; expected when there is no available instruction.
26 ; CHECK-HARD-FP-DP -mfloat-abi=hardfp (double precision instructions)
27 ; CHECK-HARD_FP_SPONLY -mfloat-abi=hardfp (double precision but single
26 ; CHECK-HARDFP-DP -mfloat-abi=hardfp (double precision instructions)
27 ; CHECK-HARDFP-SPONLY -mfloat-abi=hardfp (double precision but single
2828 ; precision only FPU)
29 ; * as CHECK-HARD-FP-SP, but we split up the double precision helper
29 ; * as CHECK-HARDFP-SP, but we split up the double precision helper
3030 ; functions so we can test a single precision only FPU, which has to use
3131 ; helper function for all double precision operations.
3232
2828 ; CHECK-HARDFLOAT-EABI: __aeabi_h2f
2929 ; CHECK-HARDFLOAT-GNU: __gnu_h2f_ieee
3030 ; CHECK-FP16: vcvtb.f32.f16
31 ; CHECK-ARMv8: vcvtb.f32.f16
31 ; CHECK-ARMV8: vcvtb.f32.f16
3232 ; CHECK-SOFTFLOAT-EABI: __aeabi_h2f
3333 ; CHECK-SOFTFLOAT-GNU: __gnu_h2f_ieee
3434 %3 = tail call float @llvm.convert.from.fp16.f32(i16 %1)
88
99 define i32 @test_lshr_and1(i32 %x) {
1010 entry:
11 ;CHECK-LABLE: test_lshr_and1:
11 ;CHECK-LABEL: test_lshr_and1:
1212 ;CHECK-COMMON: movw r1, :lower16:array
1313 ;CHECK-COMMON-NEXT: and r0, r0, #12
1414 ;CHECK-COMMON-NEXT: movt r1, :upper16:array
107107 define void @myctlz_store16(i16 %a, i16* %b) {
108108 ; CHECK: ld.param.
109109 ; CHECK-NEXT: cvt.u32.u16
110 ; CHECK-NET: clz.b32
110 ; CHECK-NEXT: clz.b32
111111 ; CHECK-DAG: cvt.u16.u32
112112 ; CHECK-DAG: sub.
113113 ; CHECK: st.{{[a-z]}}16
120120 define void @myctlz_store16_2(i16 %a, i16* %b) {
121121 ; CHECK: ld.param.
122122 ; CHECK-NEXT: cvt.u32.u16
123 ; CHECK-NET: clz.b32
123 ; CHECK-NEXT: clz.b32
124124 ; CHECK-DAG: cvt.u16.u32
125125 ; CHECK-DAG: sub.
126126 ; CHECK: st.{{[a-z]}}16
2929 define <2 x i64> @test_vsrad(<2 x i64> %x, <2 x i64> %y) nounwind readnone {
3030 %tmp = ashr <2 x i64> %x, %y
3131 ret <2 x i64> %tmp
32 ; CHECK-LABER: @test_vsrad
32 ; CHECK-LABEL: @test_vsrad
3333 ; CHECK: vsrad 2, 2, 3
3434 }
3535
150150 }
151151
152152 define i1 @test_gesf2(float %a, float %b) #0 {
153 ; CHECK-LABLE: test_gesf2:
153 ; CHECK-LABEL: test_gesf2:
154154 ; CHECK: call __gesf2
155155 %cmp = fcmp oge float %a, %b
156156 ret i1 %cmp
157157 }
158158
159159 define i1 @test_gedf2(double %a, double %b) #0 {
160 ; CHECK-LABLE: test_gedf2:
160 ; CHECK-LABEL: test_gedf2:
161161 ; CHECK: call __gedf2
162162 %cmp = fcmp oge double %a, %b
163163 ret i1 %cmp
164164 }
165165
166166 define i1 @test_getf2(fp128 %a, fp128 %b) #0 {
167 ; CHECK-LABLE: test_getf2:
167 ; CHECK-LABEL: test_getf2:
168168 ; CHECK: call __getf2
169169 %cmp = fcmp oge fp128 %a, %b
170170 ret i1 %cmp
3535 ; CHECK-NEXT: param i32{{$}}
3636 ; CHECK-NEXT: result i32{{$}}
3737 ; CHECK-NEXT: i32.const $push0=, 2{{$}}
38 ; CHECK-NEX T: i32.shl $push1=, $0, $pop0{{$}}
39 ; CHECK-NEX T: i32.load $push2=, g+40($pop1){{$}}
40 ; CHECK-NEX T: return $pop2{{$}}
38 ; CHECK-NEXT: i32.shl $push1=, $0, $pop0{{$}}
39 ; CHECK-NEXT: i32.load $push2=, g+40($pop1){{$}}
40 ; CHECK-NEXT: return $pop2{{$}}
4141 define i32 @load_test1(i32 %n) {
4242 %add = add nsw i32 %n, 10
4343 %arrayidx = getelementptr inbounds [0 x i32], [0 x i32]* @g, i32 0, i32 %add
4949 ; CHECK-NEXT: param i32{{$}}
5050 ; CHECK-NEXT: result i32{{$}}
5151 ; CHECK-NEXT: i32.const $push0=, 2{{$}}
52 ; CHECK-NEX T: i32.shl $push1=, $0, $pop0{{$}}
53 ; CHECK-NEX T: i32.load $push2=, g+40($pop1){{$}}
54 ; CHECK-NEX T: return $pop2{{$}}
52 ; CHECK-NEXT: i32.shl $push1=, $0, $pop0{{$}}
53 ; CHECK-NEXT: i32.load $push2=, g+40($pop1){{$}}
54 ; CHECK-NEXT: return $pop2{{$}}
5555 define i32 @load_test2(i32 %n) {
5656 %add = add nsw i32 10, %n
5757 %arrayidx = getelementptr inbounds [0 x i32], [0 x i32]* @g, i32 0, i32 %add
6363 ; CHECK-NEXT: param i32{{$}}
6464 ; CHECK-NEXT: result i32{{$}}
6565 ; CHECK-NEXT: i32.const $push0=, 2{{$}}
66 ; CHECK-NEX T: i32.shl $push1=, $0, $pop0{{$}}
67 ; CHECK-NEX T: i32.load $push2=, g+40($pop1){{$}}
68 ; CHECK-NEX T: return $pop2{{$}}
66 ; CHECK-NEXT: i32.shl $push1=, $0, $pop0{{$}}
67 ; CHECK-NEXT: i32.load $push2=, g+40($pop1){{$}}
68 ; CHECK-NEXT: return $pop2{{$}}
6969 define i32 @load_test3(i32 %n) {
7070 %add.ptr = getelementptr inbounds [0 x i32], [0 x i32]* @g, i32 0, i32 %n
7171 %add.ptr1 = getelementptr inbounds i32, i32* %add.ptr, i32 10
7777 ; CHECK-NEXT: param i32{{$}}
7878 ; CHECK-NEXT: result i32{{$}}
7979 ; CHECK-NEXT: i32.const $push0=, 2{{$}}
80 ; CHECK-NEX T: i32.shl $push1=, $0, $pop0{{$}}
81 ; CHECK-NEX T: i32.load $push2=, g+40($pop1){{$}}
82 ; CHECK-NEX T: return $pop2{{$}}
80 ; CHECK-NEXT: i32.shl $push1=, $0, $pop0{{$}}
81 ; CHECK-NEXT: i32.load $push2=, g+40($pop1){{$}}
82 ; CHECK-NEXT: return $pop2{{$}}
8383 define i32 @load_test4(i32 %n) {
8484 %add.ptr = getelementptr inbounds i32, i32* getelementptr inbounds ([0 x i32], [0 x i32]* @g, i32 0, i32 10), i32 %n
8585 %t = load i32, i32* %add.ptr, align 4
9090 ; CHECK-NEXT: param i32{{$}}
9191 ; CHECK-NEXT: result i32{{$}}
9292 ; CHECK-NEXT: i32.const $push0=, 2{{$}}
93 ; CHECK-NEX T: i32.shl $push1=, $0, $pop0{{$}}
94 ; CHECK-NEX T: i32.load $push2=, g+40($pop1){{$}}
95 ; CHECK-NEX T: return $pop2{{$}}
93 ; CHECK-NEXT: i32.shl $push1=, $0, $pop0{{$}}
94 ; CHECK-NEXT: i32.load $push2=, g+40($pop1){{$}}
95 ; CHECK-NEXT: return $pop2{{$}}
9696 define i32 @load_test5(i32 %n) {
9797 %add.ptr = getelementptr inbounds i32, i32* getelementptr inbounds ([0 x i32], [0 x i32]* @g, i32 0, i32 10), i32 %n
9898 %t = load i32, i32* %add.ptr, align 4
103103 ; CHECK-NEXT: param i32{{$}}
104104 ; CHECK-NEXT: result i32{{$}}
105105 ; CHECK-NEXT: i32.const $push0=, 2{{$}}
106 ; CHECK-NEX T: i32.shl $push1=, $0, $pop0{{$}}
107 ; CHECK-NEX T: i32.load $push2=, g+40($pop1){{$}}
108 ; CHECK-NEX T: return $pop2{{$}}
106 ; CHECK-NEXT: i32.shl $push1=, $0, $pop0{{$}}
107 ; CHECK-NEXT: i32.load $push2=, g+40($pop1){{$}}
108 ; CHECK-NEXT: return $pop2{{$}}
109109 define i32 @load_test6(i32 %n) {
110110 %add = add nsw i32 %n, 10
111111 %add.ptr = getelementptr inbounds [0 x i32], [0 x i32]* @g, i32 0, i32 %add
117117 ; CHECK-NEXT: param i32{{$}}
118118 ; CHECK-NEXT: result i32{{$}}
119119 ; CHECK-NEXT: i32.const $push0=, 2{{$}}
120 ; CHECK-NEX T: i32.shl $push1=, $0, $pop0{{$}}
121 ; CHECK-NEX T: i32.load $push2=, g+40($pop1){{$}}
122 ; CHECK-NEX T: return $pop2{{$}}
120 ; CHECK-NEXT: i32.shl $push1=, $0, $pop0{{$}}
121 ; CHECK-NEXT: i32.load $push2=, g+40($pop1){{$}}
122 ; CHECK-NEXT: return $pop2{{$}}
123123 define i32 @load_test7(i32 %n) {
124124 %add.ptr = getelementptr inbounds [0 x i32], [0 x i32]* @g, i32 0, i32 %n
125125 %add.ptr1 = getelementptr inbounds i32, i32* %add.ptr, i32 10
131131 ; CHECK-NEXT: param i32{{$}}
132132 ; CHECK-NEXT: result i32{{$}}
133133 ; CHECK-NEXT: i32.const $push0=, 2{{$}}
134 ; CHECK-NEX T: i32.shl $push1=, $0, $pop0{{$}}
135 ; CHECK-NEX T: i32.load $push2=, g+40($pop1){{$}}
136 ; CHECK-NEX T: return $pop2{{$}}
134 ; CHECK-NEXT: i32.shl $push1=, $0, $pop0{{$}}
135 ; CHECK-NEXT: i32.load $push2=, g+40($pop1){{$}}
136 ; CHECK-NEXT: return $pop2{{$}}
137137 define i32 @load_test8(i32 %n) {
138138 %add = add nsw i32 10, %n
139139 %add.ptr = getelementptr inbounds [0 x i32], [0 x i32]* @g, i32 0, i32 %add
377377 ; CHECK-NEXT: param i32, i32{{$}}
378378 ; CHECK-NEXT: i32.const $push0=, 2{{$}}
379379 ; CHECK-NEXT: i32.shl $push1=, $0, $pop0{{$}}
380 ; CHECK-NEX T: i32.store g+40($pop1), $1{{$}}
381 ; CHECK-NEX T: return{{$}}
380 ; CHECK-NEXT: i32.store g+40($pop1), $1{{$}}
381 ; CHECK-NEXT: return{{$}}
382382 define void @store_test1(i32 %n, i32 %i) {
383383 %add = add nsw i32 %n, 10
384384 %arrayidx = getelementptr inbounds [0 x i32], [0 x i32]* @g, i32 0, i32 %add
390390 ; CHECK-NEXT: param i32, i32{{$}}
391391 ; CHECK-NEXT: i32.const $push0=, 2{{$}}
392392 ; CHECK-NEXT: i32.shl $push1=, $0, $pop0{{$}}
393 ; CHECK-NEX T: i32.store g+40($pop1), $1{{$}}
394 ; CHECK-NEX T: return{{$}}
393 ; CHECK-NEXT: i32.store g+40($pop1), $1{{$}}
394 ; CHECK-NEXT: return{{$}}
395395 define void @store_test2(i32 %n, i32 %i) {
396396 %add = add nsw i32 10, %n
397397 %arrayidx = getelementptr inbounds [0 x i32], [0 x i32]* @g, i32 0, i32 %add
403403 ; CHECK-NEXT: param i32, i32{{$}}
404404 ; CHECK-NEXT: i32.const $push0=, 2{{$}}
405405 ; CHECK-NEXT: i32.shl $push1=, $0, $pop0{{$}}
406 ; CHECK-NEX T: i32.store g+40($pop1), $1{{$}}
407 ; CHECK-NEX T: return{{$}}
406 ; CHECK-NEXT: i32.store g+40($pop1), $1{{$}}
407 ; CHECK-NEXT: return{{$}}
408408 define void @store_test3(i32 %n, i32 %i) {
409409 %add.ptr = getelementptr inbounds [0 x i32], [0 x i32]* @g, i32 0, i32 %n
410410 %add.ptr1 = getelementptr inbounds i32, i32* %add.ptr, i32 10
416416 ; CHECK-NEXT: param i32, i32{{$}}
417417 ; CHECK-NEXT: i32.const $push0=, 2{{$}}
418418 ; CHECK-NEXT: i32.shl $push1=, $0, $pop0{{$}}
419 ; CHECK-NEX T: i32.store g+40($pop1), $1{{$}}
420 ; CHECK-NEX T: return{{$}}
419 ; CHECK-NEXT: i32.store g+40($pop1), $1{{$}}
420 ; CHECK-NEXT: return{{$}}
421421 define void @store_test4(i32 %n, i32 %i) {
422422 %add.ptr = getelementptr inbounds i32, i32* getelementptr inbounds ([0 x i32], [0 x i32]* @g, i32 0, i32 10), i32 %n
423423 store i32 %i, i32* %add.ptr, align 4
428428 ; CHECK-NEXT: param i32, i32{{$}}
429429 ; CHECK-NEXT: i32.const $push0=, 2{{$}}
430430 ; CHECK-NEXT: i32.shl $push1=, $0, $pop0{{$}}
431 ; CHECK-NEX T: i32.store g+40($pop1), $1{{$}}
432 ; CHECK-NEX T: return{{$}}
431 ; CHECK-NEXT: i32.store g+40($pop1), $1{{$}}
432 ; CHECK-NEXT: return{{$}}
433433 define void @store_test5(i32 %n, i32 %i) {
434434 %add.ptr = getelementptr inbounds i32, i32* getelementptr inbounds ([0 x i32], [0 x i32]* @g, i32 0, i32 10), i32 %n
435435 store i32 %i, i32* %add.ptr, align 4
440440 ; CHECK-NEXT: param i32, i32{{$}}
441441 ; CHECK-NEXT: i32.const $push0=, 2{{$}}
442442 ; CHECK-NEXT: i32.shl $push1=, $0, $pop0{{$}}
443 ; CHECK-NEX T: i32.store g+40($pop1), $1{{$}}
444 ; CHECK-NEX T: return{{$}}
443 ; CHECK-NEXT: i32.store g+40($pop1), $1{{$}}
444 ; CHECK-NEXT: return{{$}}
445445 define void @store_test6(i32 %n, i32 %i) {
446446 %add = add nsw i32 %n, 10
447447 %add.ptr = getelementptr inbounds [0 x i32], [0 x i32]* @g, i32 0, i32 %add
453453 ; CHECK-NEXT: param i32, i32{{$}}
454454 ; CHECK-NEXT: i32.const $push0=, 2{{$}}
455455 ; CHECK-NEXT: i32.shl $push1=, $0, $pop0{{$}}
456 ; CHECK-NEX T: i32.store g+40($pop1), $1{{$}}
457 ; CHECK-NEX T: return{{$}}
456 ; CHECK-NEXT: i32.store g+40($pop1), $1{{$}}
457 ; CHECK-NEXT: return{{$}}
458458 define void @store_test7(i32 %n, i32 %i) {
459459 %add.ptr = getelementptr inbounds [0 x i32], [0 x i32]* @g, i32 0, i32 %n
460460 %add.ptr1 = getelementptr inbounds i32, i32* %add.ptr, i32 10
466466 ; CHECK-NEXT: param i32, i32{{$}}
467467 ; CHECK-NEXT: i32.const $push0=, 2{{$}}
468468 ; CHECK-NEXT: i32.shl $push1=, $0, $pop0{{$}}
469 ; CHECK-NEX T: i32.store g+40($pop1), $1{{$}}
470 ; CHECK-NEX T: return{{$}}
469 ; CHECK-NEXT: i32.store g+40($pop1), $1{{$}}
470 ; CHECK-NEXT: return{{$}}
471471 define void @store_test8(i32 %n, i32 %i) {
472472 %add = add nsw i32 10, %n
473473 %add.ptr = getelementptr inbounds [0 x i32], [0 x i32]* @g, i32 0, i32 %add
99 br i1 undef, label %if.then, label %if.end, !dbg !16
1010
1111 if.then: ; preds = %entry
12 ; CHECK-label: if.then:
12 ; CHECK-LABEL: if.then:
1313 ; CHECK: %mul = fmul x86_fp80
1414 ; CHECK: call void @llvm.dbg.value(metadata x86_fp80 %mul, metadata {{.*}}, metadata !DIExpression())
1515 %mul = fmul x86_fp80 undef, undef, !dbg !18
1717 br label %if.end, !dbg !20
1818
1919 if.end: ; preds = %if.then, %entry
20 ; CHECK-label: if.end:
20 ; CHECK-LABEL: if.end:
2121 ; CHECK: %r.0 = phi x86_fp80
2222 ; CHECK: call void @llvm.dbg.value(metadata x86_fp80 %r.0, metadata {{.*}}, metadata !DIExpression())
2323 %out = load x86_fp80, x86_fp80* %r, align 16, !dbg !21
6666 # CHECK-NEXT: if (cmp.eq(r17.new,#21)) jump:nt
6767 0x11 0x40 0x71 0x70 0x92 0xf5 0x02 0x24
6868 # CHECK: r17 = r17
69 # CHECK-NETX: if (cmp.eq(r17.new,#21)) jump:t
69 # CHECK-NEXT: if (cmp.eq(r17.new,#21)) jump:t
7070 0x11 0x40 0x71 0x70 0x92 0xd5 0x42 0x24
7171 # CHECK: r17 = r17
7272 # CHECK-NEXT: if (!cmp.eq(r17.new,#21)) jump:nt
9696 }
9797
9898 define void @caller_with_lifetime() {
99 ; CHECK-LABLE: @caller_with_lifetime(
99 ; CHECK-LABEL: @caller_with_lifetime(
100100 ; CHECK: call void (...) @llvm.experimental.deoptimize.isVoid(i32 1) [ "deopt"(i8* %t.i) ]
101101 ; CHECK-NEXT: ret void
102102
197197 ; For single-BB loop with <=1 avg trip count, sink load to b1
198198 ; CHECK: t4
199199 ; CHECK: .preheader:
200 ; CHECK-not: load i32, i32* @g
200 ; CHECK-NOT: load i32, i32* @g
201201 ; CHECK: .b1:
202202 ; CHECK: load i32, i32* @g
203203 ; CHECK: .exit:
4242 !8 = !{!3, !7, i64 4}
4343
4444 ; CHECK-DAG: [[TYPE_char:!.*]] = !{!"omnipotent char", {{.*}}, i64 0}
45 ; CHECK-FAG: [[TAG_char]] = !{[[TYPE_char]], [[TYPE_char]], i64 0}
45 ; CHECK-DAG: [[TAG_char]] = !{[[TYPE_char]], [[TYPE_char]], i64 0}
9797 ;; A[i-1][j-1] = A[i - 1][j-1] + B[i][j];
9898
9999 ; CHECK: Name: InterchangeNotProfitable
100 ; CHECK-ENXT: Function: interchange_03
100 ; CHECK-NEXT: Function: interchange_03
101101 define void @interchange_03(){
102102 entry:
103103 br label %for1.header
135135 ;; A[i][j] = A[i][j]+k;
136136
137137 ; CHECK: Name: InterchangeNotProfitable
138 ; CHECK-ENXT: Function: interchange_04
138 ; CHECK-NEXT: Function: interchange_04
139139 define void @interchange_04(i32 %k) {
140140 entry:
141141 br label %for.cond1.preheader
1515 ; widest type in the loop for maximum bandwidth when
1616 ; -vectorizer-maximize-bandwidth is indicated.
1717 ;
18 ; CHECK-label: foo
18 ; CHECK-LABEL: foo
1919 ; CHECK-AVX1: LV: Selecting VF: 16.
2020 ; CHECK-AVX2: LV: Selecting VF: 32.
2121 define void @foo() {
66 declare cc42 double @llvm.experimental.deoptimize.f64(...)
77
88 define double @caller_3() gc "statepoint-example" {
9 ; CHECK-LABELL @caller_3(
9 ; CHECK-LABEL: @caller_3(
1010 ; CHECK: call cc42 token (i64, i32, void ()*, i32, i32, ...) @llvm.experimental.gc.statepoint
1111 ; CHECK: unreachable
1212
22
33 CHECK-A: debug_line[0x00000000]
44 CHECK-A: Address Line Column File ISA Discriminator Flags
5 CHECK-A-NET: ------------------ ------ ------ ------ --- ------------- -------------
6 CHECK-A-NET: 0x0000000000000000 26 0 1 0 0 is_stmt
7 CHECK-A-NET: 0x0000000000000004 27 10 1 0 0 is_stmt prologue_end
8 CHECK-A-NET: 0x0000000000000009 27 3 1 0 0
9 CHECK-A-NET: 0x0000000000000074 27 3 1 0 0 end_sequence
5 CHECK-A-NEXT: ------------------ ------ ------ ------ --- ------------- -------------
6 CHECK-A-NEXT: 0x0000000000000000 26 0 1 0 0 is_stmt
7 CHECK-A-NEXT: 0x0000000000000004 27 10 1 0 0 is_stmt prologue_end
8 CHECK-A-NEXT: 0x0000000000000009 27 3 1 0 0
9 CHECK-A-NEXT: 0x0000000000000074 27 3 1 0 0 end_sequence
1010 CHECK-A-NOT: debug_line[0x0000009a]
1111
1212 RUN: llvm-dwarfdump %S/../../dsymutil/Inputs/basic-lto-dw4.macho.x86_64.o \