llvm.org GIT mirror llvm / 0a783f7
For PR950: Replace the REM instruction with UREM, SREM and FREM. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31369 91177308-0d34-0410-b5e6-96231b3b80d8 Reid Spencer 12 years ago
21 changed file(s) with 520 addition(s) and 292 deletion(s). Raw diff Collapse all Expand all
7979
  • 'udiv' Instruction
  • 8080
  • 'sdiv' Instruction
  • 8181
  • 'fdiv' Instruction
  • 82
  • 'rem' Instruction
  • 82
  • 'urem' Instruction
  • 83
  • 'srem' Instruction
  • 84
  • 'frem' Instruction
  • 8385
  • 'setcc' Instructions
  • 8486
    8587
    16981700
    16991701
    17001702
    1701
    1703
    1704
    1705
    1706
    Syntax:
    1707
      <result> = urem <ty> <var1>, <var2>   ; yields {ty}:result
    
                      
                    
    1708
    1709
    Overview:
    1710

    The 'urem' instruction returns the remainder from the

    1711 unsigned division of its two arguments.

    1712
    Arguments:
    1713

    The two arguments to the 'urem' instruction must be

    1714 integer values. Both arguments must have identical
    1715 types.

    1716
    Semantics:
    1717

    This instruction returns the unsigned integer remainder of a division.

    1718 This instruction always performs an unsigned division to get the remainder,
    1719 regardless of whether the arguments are unsigned or not.

    1720
    Example:
    1721
      <result> = urem uint 4, %var          ; yields {uint}:result = 4 % %var
    
                      
                    
    1722
    1723
    1724
    1725
    1726
    17021727 Instruction
    17031728
    17041729
    Syntax:
    1705
      <result> = rem <ty> <var1>, <var2>   ; yields {ty}:result
    
                      
                    
    1706
    1707
    Overview:
    1708

    The 'rem' instruction returns the remainder from the

    1709 division of its two operands.

    1710
    Arguments:
    1711

    The two arguments to the 'rem' instruction must be either

    1712 href="#t_integer">integer or floating point
    1713 values.
    1714 This instruction can also take packed versions of the values.
    1715 Both arguments must have identical types.

    1716
    Semantics:
    1717 >This returns the remainder of a division (where the result
    1730 re> <result> = srem <ty> <var1>, <var2> ; yields {ty}:result
    1731
    1732
    Overview:
    1733

    The 'srem' instruction returns the remainder from the

    1734 signed division of its two operands.

    1735
    Arguments:
    1736

    The two arguments to the 'srem' instruction must be

    1737 integer values. Both arguments must have identical
    1738 types.

    1739
    Semantics:
    1740

    This instruction returns the remainder of a division (where the result

    17181741 has the same sign as the divisor), not the modulus (where the
    17191742 result has the same sign as the dividend) of a value. For more
    17201743 information about the difference, see
    17211744 href="http://mathforum.org/dr.math/problems/anne.4.28.99.html">The
    17221745 Math Forum.

    17231746
    Example:
    1724
      <result> = rem int 4, %var          ; yields {int}:result = 4 % %var
                      
                    
    1747
      <result> = srem int 4, %var          ; yields {int}:result = 4 % %var
                      
                    
    1748
    1749
    1750
    1751
    1752
    1753 Instruction
    1754
    1755
    Syntax:
    1756
      <result> = frem <ty> <var1>, <var2>   ; yields {ty}:result
    
                      
                    
    1757
    1758
    Overview:
    1759

    The 'frem' instruction returns the remainder from the

    1760 division of its two operands.

    1761
    Arguments:
    1762

    The two arguments to the 'frem' instruction must be

    1763 floating point values. Both arguments must have
    1764 identical types.

    1765
    Semantics:
    1766

    This instruction returns the remainder of a division.

    1767
    Example:
    1768
      <result> = frem float 4.0, %var          ; yields {float}:result = 4.0 % %var
    
                      
                    
    17251769
    17261770
    17271771
    550550 static Constant *getUDiv(Constant *C1, Constant *C2);
    551551 static Constant *getSDiv(Constant *C1, Constant *C2);
    552552 static Constant *getFDiv(Constant *C1, Constant *C2);
    553 static Constant *getRem(Constant *C1, Constant *C2);
    553 static Constant *getURem(Constant *C1, Constant *C2); // unsigned rem
    554 static Constant *getSRem(Constant *C1, Constant *C2); // signed rem
    555 static Constant *getFRem(Constant *C1, Constant *C2);
    554556 static Constant *getAnd(Constant *C1, Constant *C2);
    555557 static Constant *getOr(Constant *C1, Constant *C2);
    556558 static Constant *getXor(Constant *C1, Constant *C2);
    8989
    9090 // Standard binary operators...
    9191 FIRST_BINARY_INST( 7)
    92 HANDLE_BINARY_INST( 7, Add , BinaryOperator)
    93 HANDLE_BINARY_INST( 8, Sub , BinaryOperator)
    94 HANDLE_BINARY_INST( 9, Mul , BinaryOperator)
    95 HANDLE_BINARY_INST(10, UDiv , BinaryOperator)
    96 HANDLE_BINARY_INST(11, SDiv , BinaryOperator)
    97 HANDLE_BINARY_INST(12, FDiv , BinaryOperator)
    98 HANDLE_BINARY_INST(13, Rem , BinaryOperator)
    92 HANDLE_BINARY_INST( 7, Add , BinaryOperator)
    93 HANDLE_BINARY_INST( 8, Sub , BinaryOperator)
    94 HANDLE_BINARY_INST( 9, Mul , BinaryOperator)
    95 HANDLE_BINARY_INST(10, UDiv , BinaryOperator)
    96 HANDLE_BINARY_INST(11, SDiv , BinaryOperator)
    97 HANDLE_BINARY_INST(12, FDiv , BinaryOperator)
    98 HANDLE_BINARY_INST(13, URem , BinaryOperator)
    99 HANDLE_BINARY_INST(14, SRem , BinaryOperator)
    100 HANDLE_BINARY_INST(15, FRem , BinaryOperator)
    99101
    100102 // Logical operators...
    101 HANDLE_BINARY_INST(14, And , BinaryOperator)
    102 HANDLE_BINARY_INST(15, Or , BinaryOperator)
    103 HANDLE_BINARY_INST(16, Xor , BinaryOperator)
    103 HANDLE_BINARY_INST(16, And , BinaryOperator)
    104 HANDLE_BINARY_INST(17, Or , BinaryOperator)
    105 HANDLE_BINARY_INST(18, Xor , BinaryOperator)
    104106
    105107 // Binary comparison operators...
    106 HANDLE_BINARY_INST(17, SetEQ , SetCondInst)
    107 HANDLE_BINARY_INST(18, SetNE , SetCondInst)
    108 HANDLE_BINARY_INST(19, SetLE , SetCondInst)
    109 HANDLE_BINARY_INST(20, SetGE , SetCondInst)
    110 HANDLE_BINARY_INST(21, SetLT , SetCondInst)
    111 HANDLE_BINARY_INST(22, SetGT , SetCondInst)
    112 LAST_BINARY_INST(22)
    108 HANDLE_BINARY_INST(19, SetEQ , SetCondInst)
    109 HANDLE_BINARY_INST(20, SetNE , SetCondInst)
    110 HANDLE_BINARY_INST(21, SetLE , SetCondInst)
    111 HANDLE_BINARY_INST(22, SetGE , SetCondInst)
    112 HANDLE_BINARY_INST(23, SetLT , SetCondInst)
    113 HANDLE_BINARY_INST(24, SetGT , SetCondInst)
    114 LAST_BINARY_INST(24)
    113115
    114116 // Memory operators...
    115 FIRST_MEMORY_INST(23)
    116 HANDLE_MEMORY_INST(23, Malloc, MallocInst) // Heap management instructions
    117 HANDLE_MEMORY_INST(24, Free , FreeInst )
    118 HANDLE_MEMORY_INST(25, Alloca, AllocaInst) // Stack management
    119 HANDLE_MEMORY_INST(26, Load , LoadInst ) // Memory manipulation instrs
    120 HANDLE_MEMORY_INST(27, Store , StoreInst )
    121 HANDLE_MEMORY_INST(28, GetElementPtr, GetElementPtrInst)
    122 LAST_MEMORY_INST(28)
    117 FIRST_MEMORY_INST(25)
    118 HANDLE_MEMORY_INST(25, Malloc, MallocInst) // Heap management instructions
    119 HANDLE_MEMORY_INST(26, Free , FreeInst )
    120 HANDLE_MEMORY_INST(27, Alloca, AllocaInst) // Stack management
    121 HANDLE_MEMORY_INST(28, Load , LoadInst ) // Memory manipulation instrs
    122 HANDLE_MEMORY_INST(29, Store , StoreInst )
    123 HANDLE_MEMORY_INST(30, GetElementPtr, GetElementPtrInst)
    124 LAST_MEMORY_INST(30)
    123125
    124126 // Other operators...
    125 FIRST_OTHER_INST(29)
    126 HANDLE_OTHER_INST(29, PHI , PHINode ) // PHI node instruction
    127 HANDLE_OTHER_INST(30, Cast , CastInst ) // Type cast
    128 HANDLE_OTHER_INST(31, Call , CallInst ) // Call a function
    129 HANDLE_OTHER_INST(32, Shl , ShiftInst ) // Shift operations
    130 HANDLE_OTHER_INST(33, Shr , ShiftInst )
    131 HANDLE_OTHER_INST(34, Select , SelectInst ) // select instruction
    132 HANDLE_OTHER_INST(35, UserOp1, Instruction) // May be used internally in a pass
    133 HANDLE_OTHER_INST(36, UserOp2, Instruction)
    134 HANDLE_OTHER_INST(37, VAArg , VAArgInst ) // vaarg instruction
    135 HANDLE_OTHER_INST(38, ExtractElement, ExtractElementInst)// extract from vector.
    136 HANDLE_OTHER_INST(39, InsertElement, InsertElementInst) // insert into vector
    137 HANDLE_OTHER_INST(40, ShuffleVector, ShuffleVectorInst) // shuffle two vectors.
    138 LAST_OTHER_INST(40)
    127 FIRST_OTHER_INST(31)
    128 HANDLE_OTHER_INST(31, PHI , PHINode ) // PHI node instruction
    129 HANDLE_OTHER_INST(32, Cast , CastInst ) // Type cast
    130 HANDLE_OTHER_INST(33, Call , CallInst ) // Call a function
    131 HANDLE_OTHER_INST(34, Shl , ShiftInst ) // Shift operations
    132 HANDLE_OTHER_INST(35, Shr , ShiftInst )
    133 HANDLE_OTHER_INST(36, Select , SelectInst ) // select instruction
    134 HANDLE_OTHER_INST(37, UserOp1, Instruction) // May be used internally in a pass
    135 HANDLE_OTHER_INST(38, UserOp2, Instruction)
    136 HANDLE_OTHER_INST(39, VAArg , VAArgInst ) // vaarg instruction
    137 HANDLE_OTHER_INST(40, ExtractElement, ExtractElementInst)// extract from vector.
    138 HANDLE_OTHER_INST(41, InsertElement, InsertElementInst) // insert into vector
    139 HANDLE_OTHER_INST(42, ShuffleVector, ShuffleVectorInst) // shuffle two vectors.
    140 LAST_OTHER_INST(42)
    139141
    140142 #undef FIRST_TERM_INST
    141143 #undef HANDLE_TERM_INST
    129129 }
    130130
    131131 template
    132 inline BinaryOp_match m_Rem(const LHS &L,
    133 const RHS &R) {
    134 return BinaryOp_match(L, R);
    132 inline BinaryOp_match m_URem(const LHS &L,
    133 const RHS &R) {
    134 return BinaryOp_match(L, R);
    135 }
    136
    137 template
    138 inline BinaryOp_match m_SRem(const LHS &L,
    139 const RHS &R) {
    140 return BinaryOp_match(L, R);
    141 }
    142
    143 template
    144 inline BinaryOp_match m_FRem(const LHS &L,
    145 const RHS &R) {
    146 return BinaryOp_match(L, R);
    135147 }
    136148
    137149 template
    21462146 if (SCEVConstant *StartC = dyn_cast(Start)) {
    21472147 ConstantInt *StartCC = StartC->getValue();
    21482148 Constant *StartNegC = ConstantExpr::getNeg(StartCC);
    2149 Constant *Rem = ConstantExpr::getRem(StartNegC, StepC->getValue());
    2149 Constant *Rem = ConstantExpr::getSRem(StartNegC, StepC->getValue());
    21502150 if (Rem->isNullValue()) {
    21512151 Constant *Result =ConstantExpr::getSDiv(StartNegC,StepC->getValue());
    21522152 return SCEVUnknown::get(Result);
    260260 udiv { RET_TOK(BinaryOpVal, UDiv, UDIV); }
    261261 sdiv { RET_TOK(BinaryOpVal, SDiv, SDIV); }
    262262 fdiv { RET_TOK(BinaryOpVal, FDiv, FDIV); }
    263 rem { RET_TOK(BinaryOpVal, Rem, REM); }
    263 rem { RET_TOK_OBSOLETE(BinaryOpVal, URem, UREM); }
    264 urem { RET_TOK(BinaryOpVal, URem, UREM); }
    265 srem { RET_TOK(BinaryOpVal, SRem, SREM); }
    266 frem { RET_TOK(BinaryOpVal, FRem, FREM); }
    264267 and { RET_TOK(BinaryOpVal, And, AND); }
    265268 or { RET_TOK(BinaryOpVal, Or , OR ); }
    266269 xor { RET_TOK(BinaryOpVal, Xor, XOR); }
    835835 // Depending on the opcode ..
    836836 switch (OI.opcode) {
    837837 default:
    838 GenerateError("Invalid Obsolete OpCode");
    838 GenerateError("Invalid obsolete opCode (check Lexer.l)");
    839839 break;
    840840 case Instruction::UDiv:
    841841 // Handle cases where the opcode needs to change
    844844 else if (Ty->isSigned())
    845845 OI.opcode = Instruction::SDiv;
    846846 break;
    847 case Instruction::URem:
    848 if (Ty->isFloatingPoint())
    849 OI.opcode = Instruction::FRem;
    850 else if (Ty->isSigned())
    851 OI.opcode = Instruction::SRem;
    852 break;
    847853 }
    848854 // Its not obsolete any more, we fixed it.
    849855 OI.obsolete = false;
    850856 }
    851
    852
    857
    853858 // common code from the two 'RunVMAsmParser' functions
    854859 static Module* RunParser(Module * M) {
    855860
    11121117
    11131118 // Binary Operators
    11141119 %type ArithmeticOps LogicalOps SetCondOps // Binops Subcatagories
    1115 %token ADD SUB MUL UDIV SDIV FDIV REM AND OR XOR
    1120 %token ADD SUB MUL UDIV SDIV FDIV UREM SREM FREM AND OR XOR
    11161121 %token SETLE SETGE SETLT SETGT SETEQ SETNE // Binary Comparators
    11171122
    11181123 // Memory Instructions
    11501155 // Operations that are notably excluded from this list include:
    11511156 // RET, BR, & SWITCH because they end basic blocks and are treated specially.
    11521157 //
    1153 ArithmeticOps: ADD | SUB | MUL | UDIV | SDIV | FDIV | REM ;
    1158 ArithmeticOps: ADD | SUB | MUL | UDIV | SDIV | FDIV | UREM | SREM | FREM;
    11541159 LogicalOps : AND | OR | XOR;
    11551160 SetCondOps : SETLE | SETGE | SETLT | SETGT | SETEQ | SETNE;
    11561161
    24642469 !isa((*$2).get()))
    24652470 GEN_ERROR(
    24662471 "Arithmetic operator requires integer, FP, or packed operands!");
    2467 if (isa((*$2).get()) && $1.opcode == Instruction::Rem)
    2468 GEN_ERROR("Rem not supported on packed types!");
    2472 if (isa((*$2).get()) &&
    2473 ($1.opcode == Instruction::URem ||
    2474 $1.opcode == Instruction::SRem ||
    2475 $1.opcode == Instruction::FRem))
    2476 GEN_ERROR("U/S/FRem not supported on packed types!");
    24692477 // Upgrade the opcode from obsolete versions before we do anything with it.
    24702478 sanitizeOpCode($1,*$2);
    24712479 CHECK_FOR_ERROR;
    651651 break;
    652652
    653653 case 11: // Rem
    654 Opcode = Instruction::Rem;
    654 // As with "Div", make the signed/unsigned or floating point Rem
    655 // instruction choice based on the type of the operands.
    656 if (iType == 10 || iType == 11)
    657 Opcode = Instruction::FRem;
    658 else if (iType >= 2 && iType <= 9 && iType % 2 != 0)
    659 Opcode = Instruction::SRem;
    660 else
    661 Opcode = Instruction::URem;
    655662 break;
    656663 case 12: // And
    657664 Opcode = Instruction::And;
    16531660 else
    16541661 Opcode = Instruction::UDiv;
    16551662 break;
    1656
    16571663 case 11: // Rem
    1658 // As with "Div", make the signed/unsigned Rem instruction choice based
    1659 // on the type of the instruction.
    1664 // As with "Div", make the signed/unsigned or floating point Rem
    1665 // instruction choice based on the type of the operands.
    16601666 if (ArgVec[0]->getType()->isFloatingPoint())
    1661 Opcode = Instruction::Rem;
    1667 Opcode = Instruction::FRem;
    16621668 else if (ArgVec[0]->getType()->isSigned())
    1663 Opcode = Instruction::Rem;
    1669 Opcode = Instruction::SRem;
    16641670 else
    1665 Opcode = Instruction::Rem;
    1666 break;
    1667
    1671 Opcode = Instruction::URem;
    1672 break;
    16681673 case 12: // And
    16691674 Opcode = Instruction::And;
    16701675 break;
    527527 else
    528528 visitIntBinary(I, ISD::MUL, ISD::VMUL);
    529529 }
    530 void visitURem(User &I) { visitIntBinary(I, ISD::UREM, 0); }
    531 void visitSRem(User &I) { visitIntBinary(I, ISD::SREM, 0); }
    532 void visitFRem(User &I) { visitFPBinary (I, ISD::FREM, 0); }
    530533 void visitUDiv(User &I) { visitIntBinary(I, ISD::UDIV, ISD::VUDIV); }
    531534 void visitSDiv(User &I) { visitIntBinary(I, ISD::SDIV, ISD::VSDIV); }
    532 void visitFDiv(User &I) { visitFPBinary(I, ISD::FDIV, ISD::VSDIV); }
    533 void visitRem(User &I) {
    534 const Type *Ty = I.getType();
    535 if (Ty->isFloatingPoint())
    536 visitFPBinary(I, ISD::FREM, 0);
    537 else
    538 visitIntBinary(I, Ty->isSigned() ? ISD::SREM : ISD::UREM, 0);
    539 }
    535 void visitFDiv(User &I) { visitFPBinary (I, ISD::FDIV, ISD::VSDIV); }
    540536 void visitAnd(User &I) { visitIntBinary(I, ISD::AND, ISD::VAND); }
    541537 void visitOr (User &I) { visitIntBinary(I, ISD::OR, ISD::VOR); }
    542538 void visitXor(User &I) { visitIntBinary(I, ISD::XOR, ISD::VXOR); }
    4646 static GenericValue executeSDivInst(GenericValue Src1, GenericValue Src2,
    4747 const Type *Ty);
    4848 static GenericValue executeFDivInst(GenericValue Src1, GenericValue Src2,
    49 const Type *Ty);
    50 static GenericValue executeURemInst(GenericValue Src1, GenericValue Src2,
    51 const Type *Ty);
    52 static GenericValue executeSRemInst(GenericValue Src1, GenericValue Src2,
    53 const Type *Ty);
    54 static GenericValue executeFRemInst(GenericValue Src1, GenericValue Src2,
    4955 const Type *Ty);
    5056 static GenericValue executeAndInst(GenericValue Src1, GenericValue Src2,
    5157 const Type *Ty);
    104110 return executeFDivInst(getOperandValue(CE->getOperand(0), SF),
    105111 getOperandValue(CE->getOperand(1), SF),
    106112 CE->getOperand(0)->getType());
    107 case Instruction::Rem:
    108 return executeRemInst(getOperandValue(CE->getOperand(0), SF),
    113 case Instruction::URem:
    114 return executeURemInst(getOperandValue(CE->getOperand(0), SF),
    109115 getOperandValue(CE->getOperand(1), SF),
    110116 CE->getOperand(0)->getType());
    117 case Instruction::SRem:
    118 return executeSRemInst(getOperandValue(CE->getOperand(0), SF),
    119 getOperandValue(CE->getOperand(1), SF),
    120 CE->getOperand(0)->getType());
    121 case Instruction::FRem:
    122 return executeFRemInst(getOperandValue(CE->getOperand(0), SF),
    123 getOperandValue(CE->getOperand(1), SF),
    124 CE->getOperand(0)->getType());
    111125 case Instruction::And:
    112126 return executeAndInst(getOperandValue(CE->getOperand(0), SF),
    113127 getOperandValue(CE->getOperand(1), SF),
    299313 return Dest;
    300314 }
    301315
    302 static GenericValue executeRemInst(GenericValue Src1, GenericValue Src2,
    303 const Type *Ty) {
    304 GenericValue Dest;
    305 switch (Ty->getTypeID()) {
    306 IMPLEMENT_BINARY_OPERATOR(%, UByte);
    307 IMPLEMENT_BINARY_OPERATOR(%, SByte);
    308 IMPLEMENT_BINARY_OPERATOR(%, UShort);
    309 IMPLEMENT_BINARY_OPERATOR(%, Short);
    310 IMPLEMENT_BINARY_OPERATOR(%, UInt);
    311 IMPLEMENT_BINARY_OPERATOR(%, Int);
    312 IMPLEMENT_BINARY_OPERATOR(%, ULong);
    313 IMPLEMENT_BINARY_OPERATOR(%, Long);
    316 static GenericValue executeURemInst(GenericValue Src1, GenericValue Src2,
    317 const Type *Ty) {
    318 GenericValue Dest;
    319 switch (Ty->getTypeID()) {
    320 IMPLEMENT_SIGNLESS_BINOP(%, UByte, SByte);
    321 IMPLEMENT_SIGNLESS_BINOP(%, UShort, Short);
    322 IMPLEMENT_SIGNLESS_BINOP(%, UInt, Int);
    323 IMPLEMENT_SIGNLESS_BINOP(%, ULong, Long);
    324 default:
    325 std::cout << "Unhandled type for URem instruction: " << *Ty << "\n";
    326 abort();
    327 }
    328 return Dest;
    329 }
    330
    331 static GenericValue executeSRemInst(GenericValue Src1, GenericValue Src2,
    332 const Type *Ty) {
    333 GenericValue Dest;
    334 switch (Ty->getTypeID()) {
    335 IMPLEMENT_SIGNLESS_BINOP(%, SByte, UByte);
    336 IMPLEMENT_SIGNLESS_BINOP(%, Short, UShort);
    337 IMPLEMENT_SIGNLESS_BINOP(%, Int, UInt);
    338 IMPLEMENT_SIGNLESS_BINOP(%, Long, ULong);
    339 default:
    340 std::cout << "Unhandled type for Rem instruction: " << *Ty << "\n";
    341 abort();
    342 }
    343 return Dest;
    344 }
    345
    346 static GenericValue executeFRemInst(GenericValue Src1, GenericValue Src2,
    347 const Type *Ty) {
    348 GenericValue Dest;
    349 switch (Ty->getTypeID()) {
    314350 case Type::FloatTyID:
    315351 Dest.FloatVal = fmod(Src1.FloatVal, Src2.FloatVal);
    316352 break;
    543579 case Instruction::UDiv: R = executeUDivInst (Src1, Src2, Ty); break;
    544580 case Instruction::SDiv: R = executeSDivInst (Src1, Src2, Ty); break;
    545581 case Instruction::FDiv: R = executeFDivInst (Src1, Src2, Ty); break;
    546 case Instruction::Rem: R = executeRemInst (Src1, Src2, Ty); break;
    582 case Instruction::URem: R = executeURemInst (Src1, Src2, Ty); break;
    583 case Instruction::SRem: R = executeSRemInst (Src1, Src2, Ty); break;
    584 case Instruction::FRem: R = executeFRemInst (Src1, Src2, Ty); break;
    547585 case Instruction::And: R = executeAndInst (Src1, Src2, Ty); break;
    548586 case Instruction::Or: R = executeOrInst (Src1, Src2, Ty); break;
    549587 case Instruction::Xor: R = executeXorInst (Src1, Src2, Ty); break;
    592592 case Instruction::SDiv:
    593593 case Instruction::UDiv:
    594594 case Instruction::FDiv:
    595 case Instruction::Rem:
    595 case Instruction::URem:
    596 case Instruction::SRem:
    597 case Instruction::FRem:
    596598 case Instruction::And:
    597599 case Instruction::Or:
    598600 case Instruction::Xor:
    612614 case Instruction::Add: Out << " + "; break;
    613615 case Instruction::Sub: Out << " - "; break;
    614616 case Instruction::Mul: Out << " * "; break;
    617 case Instruction::URem:
    618 case Instruction::SRem:
    619 case Instruction::FRem: Out << " % "; break;
    615620 case Instruction::UDiv:
    616621 case Instruction::SDiv:
    617622 case Instruction::FDiv: Out << " / "; break;
    618 case Instruction::Rem: Out << " % "; break;
    619623 case Instruction::And: Out << " & "; break;
    620624 case Instruction::Or: Out << " | "; break;
    621625 case Instruction::Xor: Out << " ^ "; break;
    824828 bool Result = false;
    825829 const Type* Ty = CE->getOperand(0)->getType();
    826830 switch (CE->getOpcode()) {
    827 case Instruction::UDiv: Result = Ty->isSigned(); break;
    828 case Instruction::SDiv: Result = Ty->isUnsigned(); break;
    831 case Instruction::UDiv:
    832 case Instruction::URem:
    833 Result = Ty->isSigned(); break;
    834 case Instruction::SDiv:
    835 case Instruction::SRem:
    836 Result = Ty->isUnsigned(); break;
    829837 default: break;
    830838 }
    831839 if (Result) {
    855863 // for most instructions, it doesn't matter
    856864 break;
    857865 case Instruction::UDiv:
    858 // For UDiv to have unsigned operands
    866 case Instruction::URem:
    867 // For UDiv/URem get correct type
    859868 if (OpTy->isSigned()) {
    860869 OpTy = OpTy->getUnsignedVersion();
    861870 shouldCast = true;
    862871 }
    863872 break;
    864873 case Instruction::SDiv:
    874 case Instruction::SRem:
    875 // For SDiv/SRem get correct type
    865876 if (OpTy->isUnsigned()) {
    866877 OpTy = OpTy->getSignedVersion();
    867878 shouldCast = true;
    918929 bool Result = false;
    919930 const Type* Ty = I.getOperand(0)->getType();
    920931 switch (I.getOpcode()) {
    921 case Instruction::UDiv: Result = Ty->isSigned(); break;
    922 case Instruction::SDiv: Result = Ty->isUnsigned(); break;
    932 case Instruction::UDiv:
    933 case Instruction::URem:
    934 Result = Ty->isSigned(); break;
    935 case Instruction::SDiv:
    936 case Instruction::SRem:
    937 Result = Ty->isUnsigned(); break;
    923938 default: break;
    924939 }
    925940 if (Result) {
    949964 // for most instructions, it doesn't matter
    950965 break;
    951966 case Instruction::UDiv:
    967 case Instruction::URem:
    952968 // For UDiv to have unsigned operands
    953969 if (OpTy->isSigned()) {
    954970 OpTy = OpTy->getUnsignedVersion();
    956972 }
    957973 break;
    958974 case Instruction::SDiv:
    975 case Instruction::SRem:
    959976 if (OpTy->isUnsigned()) {
    960977 OpTy = OpTy->getSignedVersion();
    961978 shouldCast = true;
    17731790 Out << "-(";
    17741791 writeOperand(BinaryOperator::getNegArgument(cast(&I)));
    17751792 Out << ")";
    1776 } else if (I.getOpcode() == Instruction::Rem &&
    1777 I.getType()->isFloatingPoint()) {
    1793 } else if (I.getOpcode() == Instruction::FRem) {
    17781794 // Output a call to fmod/fmodf instead of emitting a%b
    17791795 if (I.getType() == Type::FloatTy)
    17801796 Out << "fmodf(";
    17991815 case Instruction::Add: Out << " + "; break;
    18001816 case Instruction::Sub: Out << " - "; break;
    18011817 case Instruction::Mul: Out << '*'; break;
    1818 case Instruction::URem:
    1819 case Instruction::SRem:
    1820 case Instruction::FRem: Out << '%'; break;
    18021821 case Instruction::UDiv:
    18031822 case Instruction::SDiv:
    18041823 case Instruction::FDiv: Out << '/'; break;
    1805 case Instruction::Rem: Out << '%'; break;
    18061824 case Instruction::And: Out << " & "; break;
    18071825 case Instruction::Or: Out << " | "; break;
    18081826 case Instruction::Xor: Out << " ^ "; break;
    592592 case Instruction::SDiv:
    593593 case Instruction::UDiv:
    594594 case Instruction::FDiv:
    595 case Instruction::Rem:
    595 case Instruction::URem:
    596 case Instruction::SRem:
    597 case Instruction::FRem:
    596598 case Instruction::And:
    597599 case Instruction::Or:
    598600 case Instruction::Xor:
    612614 case Instruction::Add: Out << " + "; break;
    613615 case Instruction::Sub: Out << " - "; break;
    614616 case Instruction::Mul: Out << " * "; break;
    617 case Instruction::URem:
    618 case Instruction::SRem:
    619 case Instruction::FRem: Out << " % "; break;
    615620 case Instruction::UDiv:
    616621 case Instruction::SDiv:
    617622 case Instruction::FDiv: Out << " / "; break;
    618 case Instruction::Rem: Out << " % "; break;
    619623 case Instruction::And: Out << " & "; break;
    620624 case Instruction::Or: Out << " | "; break;
    621625 case Instruction::Xor: Out << " ^ "; break;
    824828 bool Result = false;
    825829 const Type* Ty = CE->getOperand(0)->getType();
    826830 switch (CE->getOpcode()) {
    827 case Instruction::UDiv: Result = Ty->isSigned(); break;
    828 case Instruction::SDiv: Result = Ty->isUnsigned(); break;
    831 case Instruction::UDiv:
    832 case Instruction::URem:
    833 Result = Ty->isSigned(); break;
    834 case Instruction::SDiv:
    835 case Instruction::SRem:
    836 Result = Ty->isUnsigned(); break;
    829837 default: break;
    830838 }
    831839 if (Result) {
    855863 // for most instructions, it doesn't matter
    856864 break;
    857865 case Instruction::UDiv:
    858 // For UDiv to have unsigned operands
    866 case Instruction::URem:
    867 // For UDiv/URem get correct type
    859868 if (OpTy->isSigned()) {
    860869 OpTy = OpTy->getUnsignedVersion();
    861870 shouldCast = true;
    862871 }
    863872 break;
    864873 case Instruction::SDiv:
    874 case Instruction::SRem:
    875 // For SDiv/SRem get correct type
    865876 if (OpTy->isUnsigned()) {
    866877 OpTy = OpTy->getSignedVersion();
    867878 shouldCast = true;
    918929 bool Result = false;
    919930 const Type* Ty = I.getOperand(0)->getType();
    920931 switch (I.getOpcode()) {
    921 case Instruction::UDiv: Result = Ty->isSigned(); break;
    922 case Instruction::SDiv: Result = Ty->isUnsigned(); break;
    932 case Instruction::UDiv:
    933 case Instruction::URem:
    934 Result = Ty->isSigned(); break;
    935 case Instruction::SDiv:
    936 case Instruction::SRem:
    937 Result = Ty->isUnsigned(); break;
    923938 default: break;
    924939 }
    925940 if (Result) {
    949964 // for most instructions, it doesn't matter
    950965 break;
    951966 case Instruction::UDiv:
    967 case Instruction::URem:
    952968 // For UDiv to have unsigned operands
    953969 if (OpTy->isSigned()) {
    954970 OpTy = OpTy->getUnsignedVersion();
    956972 }
    957973 break;
    958974 case Instruction::SDiv:
    975 case Instruction::SRem:
    959976 if (OpTy->isUnsigned()) {
    960977 OpTy = OpTy->getSignedVersion();
    961978 shouldCast = true;
    17731790 Out << "-(";
    17741791 writeOperand(BinaryOperator::getNegArgument(cast(&I)));
    17751792 Out << ")";
    1776 } else if (I.getOpcode() == Instruction::Rem &&
    1777 I.getType()->isFloatingPoint()) {
    1793 } else if (I.getOpcode() == Instruction::FRem) {
    17781794 // Output a call to fmod/fmodf instead of emitting a%b
    17791795 if (I.getType() == Type::FloatTy)
    17801796 Out << "fmodf(";
    17991815 case Instruction::Add: Out << " + "; break;
    18001816 case Instruction::Sub: Out << " - "; break;
    18011817 case Instruction::Mul: Out << '*'; break;
    1818 case Instruction::URem:
    1819 case Instruction::SRem:
    1820 case Instruction::FRem: Out << '%'; break;
    18021821 case Instruction::UDiv:
    18031822 case Instruction::SDiv:
    18041823 case Instruction::FDiv: Out << '/'; break;
    1805 case Instruction::Rem: Out << '%'; break;
    18061824 case Instruction::And: Out << " & "; break;
    18071825 case Instruction::Or: Out << " | "; break;
    18081826 case Instruction::Xor: Out << " ^ "; break;
    130130 Instruction *visitAdd(BinaryOperator &I);
    131131 Instruction *visitSub(BinaryOperator &I);
    132132 Instruction *visitMul(BinaryOperator &I);
    133 Instruction *visitURem(BinaryOperator &I);
    134 Instruction *visitSRem(BinaryOperator &I);
    135 Instruction *visitFRem(BinaryOperator &I);
    136 Instruction *commonRemTransforms(BinaryOperator &I);
    137 Instruction *commonIRemTransforms(BinaryOperator &I);
    133138 Instruction *commonDivTransforms(BinaryOperator &I);
    134139 Instruction *commonIDivTransforms(BinaryOperator &I);
    135140 Instruction *visitUDiv(BinaryOperator &I);
    136141 Instruction *visitSDiv(BinaryOperator &I);
    137142 Instruction *visitFDiv(BinaryOperator &I);
    138 Instruction *visitRem(BinaryOperator &I);
    139143 Instruction *visitAnd(BinaryOperator &I);
    140144 Instruction *visitOr (BinaryOperator &I);
    141145 Instruction *visitXor(BinaryOperator &I);
    24112415 return Result;
    24122416 }
    24132417
    2414 Instruction *InstCombiner::visitRem(BinaryOperator &I) {
    2418 /// This function implements the transforms on rem instructions that work
    2419 /// regardless of the kind of rem instruction it is (urem, srem, or frem). It
    2420 /// is used by the visitors to those instructions.
    2421 /// @brief Transforms common to all three rem instructions
    2422 Instruction *InstCombiner::commonRemTransforms(BinaryOperator &I) {
    24152423 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1);
    2416
    2424
    24172425 // 0 % X == 0, we don't need to preserve faults!
    24182426 if (Constant *LHS = dyn_cast(Op0))
    24192427 if (LHS->isNullValue())
    24232431 return ReplaceInstUsesWith(I, Constant::getNullValue(I.getType()));
    24242432 if (isa(Op1))
    24252433 return ReplaceInstUsesWith(I, Op1); // X % undef -> undef
    2426
    2427 if (I.getType()->isSigned()) {
    2428 if (Value *RHSNeg = dyn_castNegVal(Op1))
    2429 if (!isa(RHSNeg) || !RHSNeg->getType()->isSigned() ||
    2430 cast(RHSNeg)->getSExtValue() > 0) {
    2431 // X % -Y -> X % Y
    2432 AddUsesToWorkList(I);
    2433 I.setOperand(1, RHSNeg);
    2434
    2435 // Handle cases involving: rem X, (select Cond, Y, Z)
    2436 if (SelectInst *SI = dyn_cast(Op1)) {
    2437 // rem X, (Cond ? 0 : Y) -> rem X, Y. If the rem and the select are in
    2438 // the same basic block, then we replace the select with Y, and the
    2439 // condition of the select with false (if the cond value is in the same
    2440 // BB). If the select has uses other than the div, this allows them to be
    2441 // simplified also.
    2442 if (Constant *ST = dyn_cast(SI->getOperand(1)))
    2443 if (ST->isNullValue()) {
    2444 Instruction *CondI = dyn_cast(SI->getOperand(0));
    2445 if (CondI && CondI->getParent() == I.getParent())
    2446 UpdateValueUsesWith(CondI, ConstantBool::getFalse());
    2447 else if (I.getParent() != SI->getParent() || SI->hasOneUse())
    2448 I.setOperand(1, SI->getOperand(2));
    2449 else
    2450 UpdateValueUsesWith(SI, SI->getOperand(2));
    24342451 return &I;
    24352452 }
    2436
    2437 // If the top bits of both operands are zero (i.e. we can prove they are
    2438 // unsigned inputs), turn this into a urem.
    2439 uint64_t Mask = 1ULL << (I.getType()->getPrimitiveSizeInBits()-1);
    2440 if (MaskedValueIsZero(Op1, Mask) && MaskedValueIsZero(Op0, Mask)) {
    2441 const Type *NTy = Op0->getType()->getUnsignedVersion();
    2442 Value *LHS = InsertCastBefore(Op0, NTy, I);
    2443 Value *RHS;
    2444 if (Constant *R = dyn_cast(Op1))
    2445 RHS = ConstantExpr::getCast(R, NTy);
    2446 else
    2447 RHS = InsertCastBefore(Op1, NTy, I);
    2448 Instruction *Rem = BinaryOperator::createRem(LHS, RHS, I.getName());
    2449 InsertNewInstBefore(Rem, I);
    2450 return new CastInst(Rem, I.getType());
    2451 }
    2452 }
    2453 // Likewise for: rem X, (Cond ? Y : 0) -> rem X, Y
    2454 if (Constant *ST = dyn_cast(SI->getOperand(2)))
    2455 if (ST->isNullValue()) {
    2456 Instruction *CondI = dyn_cast(SI->getOperand(0));
    2457 if (CondI && CondI->getParent() == I.getParent())
    2458 UpdateValueUsesWith(CondI, ConstantBool::getTrue());
    2459 else if (I.getParent() != SI->getParent() || SI->hasOneUse())
    2460 I.setOperand(1, SI->getOperand(1));
    2461 else
    2462 UpdateValueUsesWith(SI, SI->getOperand(1));
    2463 return &I;
    2464 }
    2465 }
    2466
    2467 return 0;
    2468 }
    2469
    2470 /// This function implements the transforms common to both integer remainder
    2471 /// instructions (urem and srem). It is called by the visitors to those integer
    2472 /// remainder instructions.
    2473 /// @brief Common integer remainder transforms
    2474 Instruction *InstCombiner::commonIRemTransforms(BinaryOperator &I) {
    2475 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1);
    2476
    2477 if (Instruction *common = commonRemTransforms(I))
    2478 return common;
    24532479
    24542480 if (ConstantInt *RHS = dyn_cast(Op1)) {
    24552481 // X % 0 == undef, we don't need to preserve faults!
    24592485 if (RHS->equalsInt(1)) // X % 1 == 0
    24602486 return ReplaceInstUsesWith(I, Constant::getNullValue(I.getType()));
    24612487
    2462 // Check to see if this is an unsigned remainder with an exact power of 2,
    2463 // if so, convert to a bitwise and.
    2464 if (ConstantInt *C = dyn_cast(RHS))
    2465 if (RHS->getType()->isUnsigned())
    2466 if (isPowerOf2_64(C->getZExtValue()))
    2467 return BinaryOperator::createAnd(Op0, SubOne(C));
    2468
    24692488 if (Instruction *Op0I = dyn_cast(Op0)) {
    24702489 if (SelectInst *SI = dyn_cast(Op0I)) {
    24712490 if (Instruction *R = FoldOpIntoSelect(I, SI, this))
    24742493 if (Instruction *NV = FoldOpIntoPhi(I))
    24752494 return NV;
    24762495 }
    2477
    2478 // X*C1%C2 --> 0 iff C1%C2 == 0
    2479 if (ConstantExpr::getRem(GetFactor(Op0I), RHS)->isNullValue())
    2496 // (X * C1) % C2 --> 0 iff C1 % C2 == 0
    2497 if (ConstantExpr::getSRem(GetFactor(Op0I), RHS)->isNullValue())
    24802498 return ReplaceInstUsesWith(I, Constant::getNullValue(I.getType()));
    24812499 }
    24822500 }
    24832501
    2502 return 0;
    2503 }
    2504
    2505 Instruction *InstCombiner::visitURem(BinaryOperator &I) {
    2506 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1);
    2507
    2508 if (Instruction *common = commonIRemTransforms(I))
    2509 return common;
    2510
    2511 if (ConstantInt *RHS = dyn_cast(Op1)) {
    2512 // X urem C^2 -> X and C
    2513 // Check to see if this is an unsigned remainder with an exact power of 2,
    2514 // if so, convert to a bitwise and.
    2515 if (ConstantInt *C = dyn_cast(RHS))
    2516 if (isPowerOf2_64(C->getZExtValue()))
    2517 return BinaryOperator::createAnd(Op0, SubOne(C));
    2518 }
    2519
    24842520 if (Instruction *RHSI = dyn_cast(I.getOperand(1))) {
    2485 // Turn A % (C << N), where C is 2^k, into A & ((C << N)-1) [urem only].
    2486 if (I.getType()->isUnsigned() &&
    2487 RHSI->getOpcode() == Instruction::Shl &&
    2488 isa(RHSI->getOperand(0)) &&
    2489 RHSI->getOperand(0)->getType()->isUnsigned()) {
    2521 // Turn A % (C << N), where C is 2^k, into A & ((C << N)-1)
    2522 if (RHSI->getOpcode() == Instruction::Shl &&
    2523 isa(RHSI->getOperand(0))) {
    24902524 unsigned C1 = cast(RHSI->getOperand(0))->getZExtValue();
    24912525 if (isPowerOf2_64(C1)) {
    24922526 Constant *N1 = ConstantInt::getAllOnesValue(I.getType());
    24952529 return BinaryOperator::createAnd(Op0, Add);
    24962530 }
    24972531 }
    2498
    2499 // If this is 'urem X, (Cond ? C1, C2)' where C1&C2 are powers of two,
    2500 // transform this into: '(Cond ? (urem X, C1) : (urem X, C2))'.
    2501 if (SelectInst *SI = dyn_cast(Op1)) {
    2502 // rem X, (Cond ? 0 : Y) -> rem X, Y. If the rem and the select are in
    2503 // the same basic block, then we replace the select with Y, and the
    2504 // condition of the select with false (if the cond value is in the same
    2505 // BB). If the select has uses other than the div, this allows them to be
    2506 // simplified also.
    2507 if (Constant *ST = dyn_cast(SI->getOperand(1)))
    2508 if (ST->isNullValue()) {
    2509 Instruction *CondI = dyn_cast(SI->getOperand(0));
    2510 if (CondI && CondI->getParent() == I.getParent())
    2511 UpdateValueUsesWith(CondI, ConstantBool::getFalse());
    2512 else if (I.getParent() != SI->getParent() || SI->hasOneUse())
    2513 I.setOperand(1, SI->getOperand(2));
    2514 else
    2515 UpdateValueUsesWith(SI, SI->getOperand(2));
    2516 return &I;
    2532 }
    2533
    2534 // urem X, (select Cond, 2^C1, 2^C2) --> select Cond, (and X, C1), (and X, C2)
    2535 // where C1&C2 are powers of two.
    2536 if (SelectInst *SI = dyn_cast(Op1)) {
    2537 if (ConstantInt *STO = dyn_cast(SI->getOperand(1)))
    2538 if (ConstantInt *SFO = dyn_cast(SI->getOperand(2))) {
    2539 // STO == 0 and SFO == 0 handled above.
    2540 if (isPowerOf2_64(STO->getZExtValue()) &&
    2541 isPowerOf2_64(SFO->getZExtValue())) {
    2542 Value *TrueAnd = InsertNewInstBefore(
    2543 BinaryOperator::createAnd(Op0, SubOne(STO), SI->getName()+".t"), I);
    2544 Value *FalseAnd = InsertNewInstBefore(
    2545 BinaryOperator::createAnd(Op0, SubOne(SFO), SI->getName()+".f"), I);
    2546 return new SelectInst(SI->getOperand(0), TrueAnd, FalseAnd);
    25172547 }
    2518 // Likewise for: rem X, (Cond ? Y : 0) -> rem X, Y
    2519 if (Constant *ST = dyn_cast(SI->getOperand(2)))
    2520 if (ST->isNullValue()) {
    2521 Instruction *CondI = dyn_cast(SI->getOperand(0));
    2522 if (CondI && CondI->getParent() == I.getParent())
    2523 UpdateValueUsesWith(CondI, ConstantBool::getTrue());
    2524 else if (I.getParent() != SI->getParent() || SI->hasOneUse())
    2525 I.setOperand(1, SI->getOperand(1));
    2526 else
    2527 UpdateValueUsesWith(SI, SI->getOperand(1));
    2528 return &I;
    2529 }
    2530
    2531
    2532 if (ConstantInt *STO = dyn_cast(SI->getOperand(1)))
    2533 if (ConstantInt *SFO = dyn_cast(SI->getOperand(2)))
    2534 if (STO->getType()->isUnsigned() && SFO->getType()->isUnsigned()) {
    2535 // STO == 0 and SFO == 0 handled above.
    2536 if (isPowerOf2_64(STO->getZExtValue()) &&
    2537 isPowerOf2_64(SFO->getZExtValue())) {
    2538 Value *TrueAnd = InsertNewInstBefore(
    2539 BinaryOperator::createAnd(Op0, SubOne(STO), SI->getName()+".t"),
    2540 I);
    2541 Value *FalseAnd = InsertNewInstBefore(
    2542 BinaryOperator::createAnd(Op0, SubOne(SFO), SI->getName()+".f"),
    2543 I);
    2544 return new SelectInst(SI->getOperand(0), TrueAnd, FalseAnd);
    2545 }
    2546 }
    2547 }
    2548 }
    25482549 }
    25492550
    25502551 return 0;
    2552 }
    2553
    2554 Instruction *InstCombiner::visitSRem(BinaryOperator &I) {
    2555 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1);
    2556
    2557 if (Instruction *common = commonIRemTransforms(I))
    2558 return common;
    2559
    2560 if (Value *RHSNeg = dyn_castNegVal(Op1))
    2561 if (!isa(RHSNeg) ||
    2562 cast(RHSNeg)->getSExtValue() > 0) {
    2563 // X % -Y -> X % Y
    2564 AddUsesToWorkList(I);
    2565 I.setOperand(1, RHSNeg);
    2566 return &I;
    2567 }
    2568
    2569 // If the top bits of both operands are zero (i.e. we can prove they are
    2570 // unsigned inputs), turn this into a urem.
    2571 uint64_t Mask = 1ULL << (I.getType()->getPrimitiveSizeInBits()-1);
    2572 if (MaskedValueIsZero(Op1, Mask) && MaskedValueIsZero(Op0, Mask)) {
    2573 // X srem Y -> X urem Y, iff X and Y don't have sign bit set
    2574 return BinaryOperator::createURem(Op0, Op1, I.getName());
    2575 }
    2576
    2577 return 0;
    2578 }
    2579
    2580 Instruction *InstCombiner::visitFRem(BinaryOperator &I) {
    2581 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1);
    2582
    2583 return commonRemTransforms(I);
    25512584 }
    25522585
    25532586 // isMaxValueMinusOne - return true if this is Max-1
    45674600 // the second operand is a constant, simplify a bit.
    45684601 if (BinaryOperator *BO = dyn_cast(Op0)) {
    45694602 switch (BO->getOpcode()) {
    4570 #if 0
    45714603 case Instruction::SRem:
    45724604 // If we have a signed (X % (2^c)) == 0, turn it into an unsigned one.
    45734605 if (CI->isNullValue() && isa(BO->getOperand(1)) &&
    45744606 BO->hasOneUse()) {
    45754607 int64_t V = cast(BO->getOperand(1))->getSExtValue();
    45764608 if (V > 1 && isPowerOf2_64(V)) {
    4577 Value *NewRem = InsertNewInstBefore(
    4578 BinaryOperator::createURem(BO->getOperand(0),
    4579 BO->getOperand(1),
    4580 BO->getName()), I);
    4581 return BinaryOperator::create(
    4582 I.getOpcode(), NewRem,
    4583 Constant::getNullValue(NewRem->getType()));
    4584 }
    4585 }
    4586 break;
    4587 #endif
    4588
    4589 case Instruction::Rem:
    4590 // If we have a signed (X % (2^c)) == 0, turn it into an unsigned one.
    4591 if (CI->isNullValue() && isa(BO->getOperand(1)) &&
    4592 BO->hasOneUse() && BO->getOperand(1)->getType()->isSigned()) {
    4593 int64_t V = cast(BO->getOperand(1))->getSExtValue();
    4594 if (V > 1 && isPowerOf2_64(V)) {
    4595 unsigned L2 = Log2_64(V);
    4596 const Type *UTy = BO->getType()->getUnsignedVersion();
    4597 Value *NewX = InsertNewInstBefore(new CastInst(BO->getOperand(0),
    4598 UTy, "tmp"), I);
    4599 Constant *RHSCst = ConstantInt::get(UTy, 1ULL << L2);
    4600 Value *NewRem =InsertNewInstBefore(BinaryOperator::createRem(NewX,
    4601 RHSCst, BO->getName()), I);
    4609 Value *NewRem = InsertNewInstBefore(BinaryOperator::createURem(
    4610 BO->getOperand(0), BO->getOperand(1), BO->getName()), I);
    46024611 return BinaryOperator::create(I.getOpcode(), NewRem,
    4603 Constant::getNullValue(UTy));
    4612 Constant::getNullValue(BO->getType()));
    46044613 }
    46054614 }
    46064615 break;
    57655774 break;
    57665775 case Instruction::SDiv:
    57675776 case Instruction::UDiv:
    5777 case Instruction::SRem:
    5778 case Instruction::URem:
    57685779 // If we are just changing the sign, rewrite.
    57695780 if (DestBitSize == SrcBitSize) {
    57705781 // Don't insert two casts if they cannot be eliminated. We allow two
    787787 Instruction::BinaryOps ops = BO.getOpcode();
    788788
    789789 switch (ops) {
    790 case Instruction::URem:
    791 case Instruction::SRem:
    790792 case Instruction::UDiv:
    791793 case Instruction::SDiv:
    792794 case Instruction::FDiv:
    793 case Instruction::Rem: {
    795 case Instruction::FRem: {
    794796 Value *Divisor = BO.getOperand(1);
    795797 KP.addNotEqual(Constant::getNullValue(Divisor->getType()), Divisor);
    796798 break;
    115115 I->getOpcode() == Instruction::UDiv ||
    116116 I->getOpcode() == Instruction::SDiv ||
    117117 I->getOpcode() == Instruction::FDiv ||
    118 I->getOpcode() == Instruction::Rem)
    118 I->getOpcode() == Instruction::URem ||
    119 I->getOpcode() == Instruction::SRem ||
    120 I->getOpcode() == Instruction::FRem)
    119121 return true;
    120122 return false;
    121123 }
    3939 virtual Constant *add(const Constant *V1, const Constant *V2) const = 0;
    4040 virtual Constant *sub(const Constant *V1, const Constant *V2) const = 0;
    4141 virtual Constant *mul(const Constant *V1, const Constant *V2) const = 0;
    42 virtual Constant *urem(const Constant *V1, const Constant *V2) const = 0;
    43 virtual Constant *srem(const Constant *V1, const Constant *V2) const = 0;
    44 virtual Constant *frem(const Constant *V1, const Constant *V2) const = 0;
    4245 virtual Constant *udiv(const Constant *V1, const Constant *V2) const = 0;
    4346 virtual Constant *sdiv(const Constant *V1, const Constant *V2) const = 0;
    4447 virtual Constant *fdiv(const Constant *V1, const Constant *V2) const = 0;
    45 virtual Constant *rem(const Constant *V1, const Constant *V2) const = 0;
    4648 virtual Constant *op_and(const Constant *V1, const Constant *V2) const = 0;
    4749 virtual Constant *op_or (const Constant *V1, const Constant *V2) const = 0;
    4850 virtual Constant *op_xor(const Constant *V1, const Constant *V2) const = 0;
    116118 virtual Constant *fdiv(const Constant *V1, const Constant *V2) const {
    117119 return SubClassName::FDiv((const ArgType *)V1, (const ArgType *)V2);
    118120 }
    119 virtual Constant *rem(const Constant *V1, const Constant *V2) const {
    120 return SubClassName::Rem((const ArgType *)V1, (const ArgType *)V2);
    121 virtual Constant *urem(const Constant *V1, const Constant *V2) const {
    122 return SubClassName::URem((const ArgType *)V1, (const ArgType *)V2);
    123 }
    124 virtual Constant *srem(const Constant *V1, const Constant *V2) const {
    125 return SubClassName::SRem((const ArgType *)V1, (const ArgType *)V2);
    126 }
    127 virtual Constant *frem(const Constant *V1, const Constant *V2) const {
    128 return SubClassName::FRem((const ArgType *)V1, (const ArgType *)V2);
    121129 }
    122130 virtual Constant *op_and(const Constant *V1, const Constant *V2) const {
    123131 return SubClassName::And((const ArgType *)V1, (const ArgType *)V2);
    191199 static Constant *SDiv(const ArgType *V1, const ArgType *V2) { return 0; }
    192200 static Constant *UDiv(const ArgType *V1, const ArgType *V2) { return 0; }
    193201 static Constant *FDiv(const ArgType *V1, const ArgType *V2) { return 0; }
    194 static Constant *Rem (const ArgType *V1, const ArgType *V2) { return 0; }
    202 static Constant *URem(const ArgType *V1, const ArgType *V2) { return 0; }
    203 static Constant *SRem(const ArgType *V1, const ArgType *V2) { return 0; }
    204 static Constant *FRem(const ArgType *V1, const ArgType *V2) { return 0; }
    195205 static Constant *And (const ArgType *V1, const ArgType *V2) { return 0; }
    196206 static Constant *Or (const ArgType *V1, const ArgType *V2) { return 0; }
    197207 static Constant *Xor (const ArgType *V1, const ArgType *V2) { return 0; }
    391401 static Constant *FDiv(const ConstantPacked *V1, const ConstantPacked *V2) {
    392402 return EvalVectorOp(V1, V2, ConstantExpr::getFDiv);
    393403 }
    394 static Constant *Rem(const ConstantPacked *V1, const ConstantPacked *V2) {
    395 return EvalVectorOp(V1, V2, ConstantExpr::getRem);
    404 static Constant *URem(const ConstantPacked *V1, const ConstantPacked *V2) {
    405 return EvalVectorOp(V1, V2, ConstantExpr::getURem);
    406 }
    407 static Constant *SRem(const ConstantPacked *V1, const ConstantPacked *V2) {
    408 return EvalVectorOp(V1, V2, ConstantExpr::getSRem);
    409 }
    410 static Constant *FRem(const ConstantPacked *V1, const ConstantPacked *V2) {
    411 return EvalVectorOp(V1, V2, ConstantExpr::getFRem);
    396412 }
    397413 static Constant *And(const ConstantPacked *V1, const ConstantPacked *V2) {
    398414 return EvalVectorOp(V1, V2, ConstantExpr::getAnd);
    509525 #undef DEF_CAST
    510526
    511527 static Constant *UDiv(const ConstantInt *V1, const ConstantInt *V2) {
    512 if (V2->isNullValue())
    528 if (V2->isNullValue()) // X / 0
    513529 return 0;
    514530 BuiltinType R = (BuiltinType)(V1->getZExtValue() / V2->getZExtValue());
    515531 return ConstantInt::get(*Ty, R);
    516532 }
    517533
    518534 static Constant *SDiv(const ConstantInt *V1, const ConstantInt *V2) {
    519 if (V2->isNullValue())
    535 if (V2->isNullValue()) // X / 0
    520536 return 0;
    521537 if (V2->isAllOnesValue() && // MIN_INT / -1
    522538 (BuiltinType)V1->getSExtValue() == -(BuiltinType)V1->getSExtValue())
    523539 return 0;
    524 BuiltinType R =
    525 (BuiltinType)(V1->getSExtValue() / V2->getSExtValue());
    540 BuiltinType R = (BuiltinType)(V1->getSExtValue() / V2->getSExtValue());
    526541 return ConstantInt::get(*Ty, R);
    527542 }
    528543
    529 static Constant *Rem(const ConstantInt *V1, const ConstantInt *V2) {
    544 static Constant *URem(const ConstantInt *V1,
    545 const ConstantInt *V2) {
    530546 if (V2->isNullValue()) return 0; // X / 0
    531 if (V2->isAllOnesValue() && // MIN_INT / -1
    532 (BuiltinType)V1->getZExtValue() == -(BuiltinType)V1->getZExtValue())
    547 BuiltinType R = (BuiltinType)(V1->getZExtValue() % V2->getZExtValue());
    548 return ConstantInt::get(*Ty, R);
    549 }
    550
    551 static Constant *SRem(const ConstantInt *V1,
    552 const ConstantInt *V2) {
    553 if (V2->isNullValue()) return 0; // X % 0
    554 if (V2->isAllOnesValue() && // MIN_INT % -1
    555 (BuiltinType)V1->getSExtValue() == -(BuiltinType)V1->getSExtValue())
    533556 return 0;
    534 BuiltinType R =
    535 (BuiltinType)V1->getZExtValue() % (BuiltinType)V2->getZExtValue();
    557 BuiltinType R = (BuiltinType)(V1->getSExtValue() % V2->getSExtValue());
    536558 return ConstantInt::get(*Ty, R);
    537559 }
    538560
    631653 DEF_CAST(Double, ConstantFP , double)
    632654 #undef DEF_CAST
    633655
    634 static Constant *Rem(const ConstantFP *V1, const ConstantFP *V2) {
    656 static Constant *FRem(const ConstantFP *V1, const ConstantFP *V2) {
    635657 if (V2->isNullValue()) return 0;
    636658 BuiltinType Result = std::fmod((BuiltinType)V1->getValue(),
    637659 (BuiltinType)V2->getValue());
    12491271 case Instruction::UDiv: C = ConstRules::get(V1, V2).udiv(V1, V2); break;
    12501272 case Instruction::SDiv: C = ConstRules::get(V1, V2).sdiv(V1, V2); break;
    12511273 case Instruction::FDiv: C = ConstRules::get(V1, V2).fdiv(V1, V2); break;
    1252 case Instruction::Rem: C = ConstRules::get(V1, V2).rem(V1, V2); break;
    1274 case Instruction::URem: C = ConstRules::get(V1, V2).urem(V1, V2); break;
    1275 case Instruction::SRem: C = ConstRules::get(V1, V2).srem(V1, V2); break;
    1276 case Instruction::FRem: C = ConstRules::get(V1, V2).frem(V1, V2); break;
    12531277 case Instruction::And: C = ConstRules::get(V1, V2).op_and(V1, V2); break;
    12541278 case Instruction::Or: C = ConstRules::get(V1, V2).op_or (V1, V2); break;
    12551279 case Instruction::Xor: C = ConstRules::get(V1, V2).op_xor(V1, V2); break;
    13341358 case Instruction::UDiv:
    13351359 case Instruction::SDiv:
    13361360 case Instruction::FDiv:
    1337 case Instruction::Rem:
    1338 if (!isa(V2)) // undef/X -> 0
    1361 case Instruction::URem:
    1362 case Instruction::SRem:
    1363 case Instruction::FRem:
    1364 if (!isa(V2)) // undef / X -> 0
    13391365 return Constant::getNullValue(V1->getType());
    1340 return const_cast(V2); // X/undef -> undef
    1341 case Instruction::Or: // X|undef -> -1
    1366 return const_cast(V2); // X / undef -> undef
    1367 case Instruction::Or: // X | undef -> -1
    13421368 return ConstantInt::getAllOnesValue(V1->getType());
    13431369 case Instruction::Shr:
    1344 if (!isa(V2)) {
    1370 if (!isa(V2)) {
    13451371 if (V1->getType()->isSigned())
    1346 return const_cast(V1); // undef >>s X -> undef
    1372 return const_cast(V1); // undef >>s X -> undef
    13471373 // undef >>u X -> 0
    13481374 } else if (isa(V1)) {
    1349 return const_cast(V1); // undef >> undef -> undef
    1375 return const_cast(V1); // undef >> undef -> undef
    13501376 } else {
    13511377 if (V1->getType()->isSigned())
    1352 return const_cast(V1); // X >>s undef -> X
    1353 // X >>u undef -> 0
    1378 return const_cast(V1); // X >>s undef -> X
    13541379 }
    1355 return Constant::getNullValue(V1->getType());
    1380 return Constant::getNullValue(V1->getType());// X >>u undef -> 0
    13561381
    13571382 case Instruction::Shl:
    13581383 // undef << X -> 0 X << undef -> 0
    13651390 // There are many possible foldings we could do here. We should probably
    13661391 // at least fold add of a pointer with an integer into the appropriate
    13671392 // getelementptr. This will improve alias analysis a bit.
    1368
    1369
    1370
    1371
    13721393 } else {
    13731394 // Just implement a couple of simple identities.
    13741395 switch (Opcode) {
    13901411 if (CI->getZExtValue() == 1)
    13911412 return const_cast(V1); // X / 1 == X
    13921413 break;
    1393 case Instruction::Rem:
    1414 case Instruction::URem:
    1415 case Instruction::SRem:
    13941416 if (const ConstantInt *CI = dyn_cast(V2))
    13951417 if (CI->getZExtValue() == 1)
    1396 return Constant::getNullValue(CI->getType()); // X % 1 == 0
    1418 return Constant::getNullValue(CI->getType()); // X % 1 == 0
    13971419 break;
    13981420 case Instruction::And:
    13991421 if (cast(V2)->isAllOnesValue())
    14491471 case Instruction::SDiv:
    14501472 case Instruction::UDiv:
    14511473 case Instruction::FDiv:
    1452 case Instruction::Rem:
    1474 case Instruction::URem:
    1475 case Instruction::SRem:
    1476 case Instruction::FRem:
    14531477 default: // These instructions cannot be flopped around.
    14541478 break;
    14551479 }
    7777 case Instruction::UDiv:
    7878 case Instruction::SDiv:
    7979 case Instruction::FDiv:
    80 case Instruction::Rem:
    80 case Instruction::URem:
    81 case Instruction::SRem:
    82 case Instruction::FRem:
    8183 // Div and rem can trap if the RHS is not known to be non-zero.
    8284 if (!isa(getOperand(1)) || getOperand(1)->isNullValue())
    8385 return true;
    456458 Constant *ConstantExpr::getFDiv(Constant *C1, Constant *C2) {
    457459 return get(Instruction::FDiv, C1, C2);
    458460 }
    459 Constant *ConstantExpr::getRem(Constant *C1, Constant *C2) {
    460 return get(Instruction::Rem, C1, C2);
    461 Constant *ConstantExpr::getURem(Constant *C1, Constant *C2) {
    462 return get(Instruction::URem, C1, C2);
    463 }
    464 Constant *ConstantExpr::getSRem(Constant *C1, Constant *C2) {
    465 return get(Instruction::SRem, C1, C2);
    466 }
    467 Constant *ConstantExpr::getFRem(Constant *C1, Constant *C2) {
    468 return get(Instruction::FRem, C1, C2);
    461469 }
    462470 Constant *ConstantExpr::getAnd(Constant *C1, Constant *C2) {
    463471 return get(Instruction::And, C1, C2);
    13611369 break;
    13621370 default:
    13631371 assert(OldC->getOpcode() >= Instruction::BinaryOpsBegin &&
    1364 OldC->getOpcode() < Instruction::BinaryOpsEnd);
    1372 OldC->getOpcode() < Instruction::BinaryOpsEnd);
    13651373 New = ConstantExpr::getTy(NewTy, OldC->getOpcode(), OldC->getOperand(0),
    13661374 OldC->getOperand(1));
    13671375 break;
    14471455 if (Opcode == Instruction::Shl || Opcode == Instruction::Shr)
    14481456 return getShiftTy(ReqTy, Opcode, C1, C2);
    14491457 // Check the operands for consistency first
    1450 assert((Opcode >= Instruction::BinaryOpsBegin &&
    1451 Opcode < Instruction::BinaryOpsEnd) &&
    1458 assert(Opcode >= Instruction::BinaryOpsBegin &&
    1459 Opcode < Instruction::BinaryOpsEnd &&
    14521460 "Invalid opcode in binary constant expression");
    14531461 assert(C1->getType() == C2->getType() &&
    14541462 "Operand types in binary constant expression should match");
    14661474 Constant *ConstantExpr::get(unsigned Opcode, Constant *C1, Constant *C2) {
    14671475 #ifndef NDEBUG
    14681476 switch (Opcode) {
    1469 case Instruction::Add: case Instruction::Sub:
    1477 case Instruction::Add:
    1478 case Instruction::Sub:
    14701479 case Instruction::Mul:
    1471 case Instruction::Rem:
    14721480 assert(C1->getType() == C2->getType() && "Op types should be identical!");
    14731481 assert((C1->getType()->isInteger() || C1->getType()->isFloatingPoint() ||
    14741482 isa(C1->getType())) &&
    14751483 "Tried to create an arithmetic operation on a non-arithmetic type!");
    14761484 break;
    1477
    14781485 case Instruction::UDiv:
    14791486 case Instruction::SDiv:
    14801487 assert(C1->getType() == C2->getType() && "Op types should be identical!");
    14831490 "Tried to create an arithmetic operation on a non-arithmetic type!");
    14841491 break;
    14851492 case Instruction::FDiv:
    1493 assert(C1->getType() == C2->getType() && "Op types should be identical!");
    1494 assert((C1->getType()->isFloatingPoint() || (isa(C1->getType())
    1495 && cast(C1->getType())->getElementType()->isFloatingPoint()))
    1496 && "Tried to create an arithmetic operation on a non-arithmetic type!");
    1497 break;
    1498 case Instruction::URem:
    1499 case Instruction::SRem:
    1500 assert(C1->getType() == C2->getType() && "Op types should be identical!");
    1501 assert((C1->getType()->isInteger() || (isa(C1->getType()) &&
    1502 cast(C1->getType())->getElementType()->isInteger())) &&
    1503 "Tried to create an arithmetic operation on a non-arithmetic type!");
    1504 break;
    1505 case Instruction::FRem:
    14861506 assert(C1->getType() == C2->getType() && "Op types should be identical!");
    14871507 assert((C1->getType()->isFloatingPoint() || (isa(C1->getType())
    14881508 && cast(C1->getType())->getElementType()->isFloatingPoint()))
    9696 case UDiv: return "udiv";
    9797 case SDiv: return "sdiv";
    9898 case FDiv: return "fdiv";
    99 case Rem: return "rem";
    99 case URem: return "urem";
    100 case SRem: return "srem";
    101 case FRem: return "frem";
    100102
    101103 // Logical operators...
    102104 case And: return "and";
    226228 case UDiv:
    227229 case SDiv:
    228230 case FDiv:
    229 case Rem:
    231 case URem:
    232 case SRem:
    233 case FRem:
    230234 case Load:
    231235 case Store:
    232236 case Call:
    10221022 switch (iType) {
    10231023 case Add: case Sub:
    10241024 case Mul:
    1025 case Rem:
    10261025 assert(getType() == LHS->getType() &&
    10271026 "Arithmetic operation should return same type as operands!");
    10281027 assert((getType()->isInteger() || getType()->isFloatingPoint() ||
    10441043 cast(getType())->getElementType()->isFloatingPoint()))
    10451044 && "Incorrect operand type (not floating point) for FDIV");
    10461045 break;
    1047
    1046 case URem:
    1047 case SRem:
    1048 assert(getType() == LHS->getType() &&
    1049 "Arithmetic operation should return same type as operands!");
    1050 assert((getType()->isInteger() || (isa(getType()) &&
    1051 cast(getType())->getElementType()->isInteger())) &&
    1052 "Incorrect operand type (not integer) for S/UREM");
    1053 break;
    1054 case FRem:
    1055 assert(getType() == LHS->getType() &&
    1056 "Arithmetic operation should return same type as operands!");
    1057 assert((getType()->isFloatingPoint() || (isa(getType()) &&
    1058 cast(getType())->getElementType()->isFloatingPoint()))
    1059 && "Incorrect operand type (not floating point) for FREM");
    1060 break;
    10481061 case And: case Or:
    10491062 case Xor:
    10501063 assert(getType() == LHS->getType() &&
    10511051 LoadInst* op1 = cast(pop_integer(bb));
    10521052 LoadInst* op2 = cast(pop_integer(bb));
    10531053 BinaryOperator* divop =
    1054 BinaryOperator::create( Instruction::Rem, op1, op2);
    1054 BinaryOperator::create( Instruction::SRem, op1, op2);
    10551055 bb->getInstList().push_back( divop );
    10561056 push_value( bb, divop );
    10571057 break;
    775775 case Instruction::UDiv: Out << "getUDiv"; break;
    776776 case Instruction::SDiv: Out << "getSDiv"; break;
    777777 case Instruction::FDiv: Out << "getFDiv"; break;
    778 case Instruction::Rem: Out << "getRem"; break;
    778 case Instruction::URem: Out << "getURem"; break;
    779 case Instruction::SRem: Out << "getSRem"; break;
    780 case Instruction::FRem: Out << "getFRem"; break;
    779781 case Instruction::And: Out << "getAnd"; break;
    780782 case Instruction::Or: Out << "getOr"; break;
    781783 case Instruction::Xor: Out << "getXor"; break;
    10251027 case Instruction::UDiv:
    10261028 case Instruction::SDiv:
    10271029 case Instruction::FDiv:
    1028 case Instruction::Rem:
    1030 case Instruction::URem:
    1031 case Instruction::SRem:
    1032 case Instruction::FRem:
    10291033 case Instruction::And:
    10301034 case Instruction::Or:
    10311035 case Instruction::Xor:
    10391043 case Instruction::UDiv:Out << "Instruction::UDiv"; break;
    10401044 case Instruction::SDiv:Out << "Instruction::SDiv"; break;
    10411045 case Instruction::FDiv:Out << "Instruction::FDiv"; break;
    1042 case Instruction::Rem: Out << "Instruction::Rem"; break;
    1046 case Instruction::URem:Out << "Instruction::URem"; break;
    1047 case Instruction::SRem:Out << "Instruction::SRem"; break;
    1048 case Instruction::FRem:Out << "Instruction::FRem"; break;
    10431049 case Instruction::And: Out << "Instruction::And"; break;
    10441050 case Instruction::Or: Out << "Instruction::Or"; break;
    10451051 case Instruction::Xor: Out << "Instruction::Xor"; break;