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Merging r309561: ------------------------------------------------------------------------ r309561 | sdardis | 2017-07-31 07:06:58 -0700 (Mon, 31 Jul 2017) | 14 lines [SelectionDAG][mips] Fix PR33883 PR33883 shows that calls to intrinsic functions should not have their vector arguments or returns subject to ABI changes required by the target. This resolves PR33883. Thanks to Alex Crichton for reporting the issue! Reviewers: zoran.jovanovic, atanasyan Differential Revision: https://reviews.llvm.org/D35765 ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_50@309767 91177308-0d34-0410-b5e6-96231b3b80d8 Hans Wennborg 3 years ago
2 changed file(s) with 36 addition(s) and 15 deletion(s). Raw diff Collapse all Expand all
9898 // store [4096 x i8] %data, [4096 x i8]* %buffer
9999 static const unsigned MaxParallelChains = 64;
100100
101 // True if the Value passed requires ABI mangling as it is a parameter to a
102 // function or a return value from a function which is not an intrinsic.
103 static bool isABIRegCopy(const Value * V) {
104 const bool IsRetInst = V && isa(V);
105 const bool IsCallInst = V && isa(V);
106 const bool IsInLineAsm =
107 IsCallInst && static_cast(V)->isInlineAsm();
108 const bool IsIndirectFunctionCall =
109 IsCallInst && !IsInLineAsm &&
110 !static_cast(V)->getCalledFunction();
111 // It is possible that the call instruction is an inline asm statement or an
112 // indirect function call in which case the return value of
113 // getCalledFunction() would be nullptr.
114 const bool IsInstrinsicCall =
115 IsCallInst && !IsInLineAsm && !IsIndirectFunctionCall &&
116 static_cast(V)->getCalledFunction()->getIntrinsicID() !=
117 Intrinsic::not_intrinsic;
118
119 return IsRetInst || (IsCallInst && (!IsInLineAsm && !IsInstrinsicCall));
120 }
121
101122 static SDValue getCopyFromPartsVector(SelectionDAG &DAG, const SDLoc &DL,
102123 const SDValue *Parts, unsigned NumParts,
103124 MVT PartVT, EVT ValueVT, const Value *V,
10251046
10261047 if (It != FuncInfo.ValueMap.end()) {
10271048 unsigned InReg = It->second;
1028 bool IsABIRegCopy =
1029 V && ((isa(V) &&
1030 !(static_cast(V))->isInlineAsm()) ||
1031 isa(V));
10321049
10331050 RegsForValue RFV(*DAG.getContext(), DAG.getTargetLoweringInfo(),
1034 DAG.getDataLayout(), InReg, Ty, IsABIRegCopy);
1051 DAG.getDataLayout(), InReg, Ty, isABIRegCopy(V));
10351052 SDValue Chain = DAG.getEntryNode();
10361053 Result = RFV.getCopyFromRegs(DAG, FuncInfo, getCurSDLoc(), Chain, nullptr,
10371054 V);
12201237 // If this is an instruction which fast-isel has deferred, select it now.
12211238 if (const Instruction *Inst = dyn_cast(V)) {
12221239 unsigned InReg = FuncInfo.InitializeRegForValue(Inst);
1223 bool IsABIRegCopy =
1224 V && ((isa(V) &&
1225 !(static_cast(V))->isInlineAsm()) ||
1226 isa(V));
12271240
12281241 RegsForValue RFV(*DAG.getContext(), TLI, DAG.getDataLayout(), InReg,
1229 Inst->getType(), IsABIRegCopy);
1242 Inst->getType(), isABIRegCopy(V));
12301243 SDValue Chain = DAG.getEntryNode();
12311244 return RFV.getCopyFromRegs(DAG, FuncInfo, getCurSDLoc(), Chain, nullptr, V);
12321245 }
82808293 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
82818294 // If this is an InlineAsm we have to match the registers required, not the
82828295 // notional registers required by the type.
8283 bool IsABIRegCopy =
8284 V && ((isa(V) &&
8285 !(static_cast(V))->isInlineAsm()) ||
8286 isa(V));
82878296
82888297 RegsForValue RFV(V->getContext(), TLI, DAG.getDataLayout(), Reg,
8289 V->getType(), IsABIRegCopy);
8298 V->getType(), isABIRegCopy(V));
82908299 SDValue Chain = DAG.getEntryNode();
82918300
82928301 ISD::NodeType ExtendType = (FuncInfo.PreferredExtendType.find(V) ==
0 ; RUN: llc -march=mips -mcpu=mips32 < %s -o /dev/null
1
2 ; Test that calls to vector intrinsics do not crash SelectionDAGBuilder.
3
4 define <4 x float> @_ZN4simd3foo17hebb969c5fb39a194E(<4 x float>) {
5 start:
6 %1 = call <4 x float> @llvm.sqrt.v4f32(<4 x float> %0)
7
8 ret <4 x float> %1
9 }
10
11 declare <4 x float> @llvm.sqrt.v4f32(<4 x float>)