llvm.org GIT mirror llvm / 0976e3c
R600: Fix encoding for R600 family GPUs Reviewed-by: Vincent Lejeune <vljn@ovi.com> https://bugs.freedesktop.org/show_bug.cgi?id=64193 https://bugs.freedesktop.org/show_bug.cgi?id=64257 https://bugs.freedesktop.org/show_bug.cgi?id=64320 NOTE: This is a candidate for the 3.3 branch. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182113 91177308-0d34-0410-b5e6-96231b3b80d8 Tom Stellard 6 years ago
2 changed file(s) with 31 addition(s) and 0 deletion(s). Raw diff Collapse all Expand all
178178 Emit((u_int32_t) 0, OS);
179179 } else {
180180 uint64_t Inst = getBinaryCodeForInstr(MI, Fixups);
181 if ((STI.getFeatureBits() & AMDGPU::FeatureR600ALUInst) &&
182 ((Desc.TSFlags & R600_InstFlag::OP1) ||
183 Desc.TSFlags & R600_InstFlag::OP2)) {
184 uint64_t ISAOpCode = Inst & (0x3FFULL << 39);
185 Inst &= ~(0x3FFULL << 39);
186 Inst |= ISAOpCode << 1;
187 }
181188 Emit(Inst, OS);
182189 }
183190 }
0 ; RUN: llc < %s -march=r600 -show-mc-encoding -mcpu=redwood | FileCheck --check-prefix=EG-CHECK %s
1 ; RUN: llc < %s -march=r600 -show-mc-encoding -mcpu=rs880 | FileCheck --check-prefix=R600-CHECK %s
2
3 ; The earliest R600 GPUs have a slightly different encoding than the rest of
4 ; the VLIW4/5 GPUs.
5
6 ; EG-CHECK: @test
7 ; EG-CHECK: MUL_IEEE {{[ *TXYZW.,0-9]+}} ; encoding: [{{0x[0-9a-f]+,0x[0-9a-f]+,0x[0-9a-f]+,0x[0-9a-f]+,0x10,0x01,0x[0-9a-f]+,0x[0-9a-f]+}}]
8
9 ; R600-CHECK: @test
10 ; R600-CHECK: MUL_IEEE {{[ *TXYZW.,0-9]+}} ; encoding: [{{0x[0-9a-f]+,0x[0-9a-f]+,0x[0-9a-f]+,0x[0-9a-f]+,0x10,0x02,0x[0-9a-f]+,0x[0-9a-f]+}}]
11
12 define void @test() {
13 entry:
14 %0 = call float @llvm.R600.load.input(i32 0)
15 %1 = call float @llvm.R600.load.input(i32 1)
16 %2 = fmul float %0, %1
17 call void @llvm.AMDGPU.store.output(float %2, i32 0)
18 ret void
19 }
20
21 declare float @llvm.R600.load.input(i32) readnone
22
23 declare void @llvm.AMDGPU.store.output(float, i32)