llvm.org GIT mirror llvm / 08e9cb4
[NVPTX] Add more precise PTX/SM target attributes Each SM and PTX version is modeled as a subtarget feature/CPU. Additionally, PTX 3.1 is added as the default PTX version to be out-of-the-box compatible with CUDA 5.0. Available CPUs for this target: sm_10 - Select the sm_10 processor. sm_11 - Select the sm_11 processor. sm_12 - Select the sm_12 processor. sm_13 - Select the sm_13 processor. sm_20 - Select the sm_20 processor. sm_21 - Select the sm_21 processor. sm_30 - Select the sm_30 processor. sm_35 - Select the sm_35 processor. Available features for this target: ptx30 - Use PTX version 3.0. ptx31 - Use PTX version 3.1. sm_10 - Target SM 1.0. sm_11 - Target SM 1.1. sm_12 - Target SM 1.2. sm_13 - Target SM 1.3. sm_20 - Target SM 2.0. sm_21 - Target SM 2.1. sm_30 - Target SM 3.0. sm_35 - Target SM 3.5. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167699 91177308-0d34-0410-b5e6-96231b3b80d8 Justin Holewinski 7 years ago
14 changed file(s) with 117 addition(s) and 11 deletion(s). Raw diff Collapse all Expand all
2323 // - Need at least one feature to avoid generating zero sized array by
2424 // TableGen in NVPTXGenSubtarget.inc.
2525 //===----------------------------------------------------------------------===//
26 def FeatureDummy : SubtargetFeature<"dummy", "dummy", "true", "">;
26
27 // SM Versions
28 def SM10 : SubtargetFeature<"sm_10", "SmVersion", "10",
29 "Target SM 1.0">;
30 def SM11 : SubtargetFeature<"sm_11", "SmVersion", "11",
31 "Target SM 1.1">;
32 def SM12 : SubtargetFeature<"sm_12", "SmVersion", "12",
33 "Target SM 1.2">;
34 def SM13 : SubtargetFeature<"sm_13", "SmVersion", "13",
35 "Target SM 1.3">;
36 def SM20 : SubtargetFeature<"sm_20", "SmVersion", "20",
37 "Target SM 2.0">;
38 def SM21 : SubtargetFeature<"sm_21", "SmVersion", "21",
39 "Target SM 2.1">;
40 def SM30 : SubtargetFeature<"sm_30", "SmVersion", "30",
41 "Target SM 3.0">;
42 def SM35 : SubtargetFeature<"sm_35", "SmVersion", "35",
43 "Target SM 3.5">;
44
45 // PTX Versions
46 def PTX30 : SubtargetFeature<"ptx30", "PTXVersion", "30",
47 "Use PTX version 3.0">;
48 def PTX31 : SubtargetFeature<"ptx31", "PTXVersion", "31",
49 "Use PTX version 3.1">;
2750
2851 //===----------------------------------------------------------------------===//
2952 // NVPTX supported processors.
3255 class Proc Features>
3356 : Processor;
3457
35 def : Proc<"sm_10", [FeatureDummy]>;
58 def : Proc<"sm_10", [SM10]>;
59 def : Proc<"sm_11", [SM11]>;
60 def : Proc<"sm_12", [SM12]>;
61 def : Proc<"sm_13", [SM13]>;
62 def : Proc<"sm_20", [SM20]>;
63 def : Proc<"sm_21", [SM21]>;
64 def : Proc<"sm_30", [SM30]>;
65 def : Proc<"sm_35", [SM35]>;
3666
3767
3868 def NVPTXInstrInfo : InstrInfo {
909909 O << "//\n";
910910 O << "\n";
911911
912 O << ".version 3.0\n";
912 unsigned PTXVersion = nvptxSubtarget.getPTXVersion();
913 O << ".version " << (PTXVersion / 10) << "." << (PTXVersion % 10) << "\n";
913914
914915 O << ".target ";
915916 O << nvptxSubtarget.getTargetName();
3333
3434 NVPTXSubtarget::NVPTXSubtarget(const std::string &TT, const std::string &CPU,
3535 const std::string &FS, bool is64Bit)
36 :NVPTXGenSubtargetInfo(TT, "", FS), // Don't pass CPU to subtarget,
37 // because we don't register all
38 // nvptx targets.
39 Is64Bit(is64Bit) {
36 : NVPTXGenSubtargetInfo(TT, CPU, FS),
37 Is64Bit(is64Bit),
38 PTXVersion(0),
39 SmVersion(10) {
4040
4141 drvInterface = DriverInterface;
4242
4343 // Provide the default CPU if none
4444 std::string defCPU = "sm_10";
45
46 ParseSubtargetFeatures((CPU.empty() ? defCPU : CPU), FS);
4547
4648 // Get the TargetName from the FS if available
4749 if (FS.empty() && CPU.empty())
5153 else
5254 llvm_unreachable("we are not using FeatureStr");
5355
54 // Set up the SmVersion
55 SmVersion = atoi(TargetName.c_str()+3);
56 // We default to PTX 3.1, but we cannot just default to it in the initializer
57 // since the attribute parser checks if the given option is >= the default.
58 // So if we set ptx31 as the default, the ptx30 attribute would never match.
59 // Instead, we use 0 as the default and manually set 31 if the default is
60 // used.
61 if (PTXVersion == 0) {
62 PTXVersion = 31;
63 }
5664 }
2424 namespace llvm {
2525
2626 class NVPTXSubtarget : public NVPTXGenSubtargetInfo {
27
28 unsigned int SmVersion;
27
2928 std::string TargetName;
3029 NVPTX::DrvInterface drvInterface;
3130 bool dummy; // For the 'dummy' feature, see NVPTX.td
3231 bool Is64Bit;
32
33 // PTX version x.y is represented as 10*x+y, e.g. 3.1 == 31
34 unsigned PTXVersion;
35
36 // SM version x.y is represented as 10*x+y, e.g. 3.1 == 31
37 unsigned int SmVersion;
3338
3439 public:
3540 /// This constructor initializes the data members to match that
6873 NVPTX::DrvInterface getDrvInterface() const { return drvInterface; }
6974 std::string getTargetName() const { return TargetName; }
7075
76 unsigned getPTXVersion() const { return PTXVersion; }
77
7178 void ParseSubtargetFeatures(StringRef CPU, StringRef FS);
7279
7380 std::string getDataLayout() const {
0 ; RUN: llc < %s -march=nvptx -mcpu=sm_20 -mattr=ptx30 | FileCheck %s
1 ; RUN: llc < %s -march=nvptx64 -mcpu=sm_20 -mattr=ptx30 | FileCheck %s
2
3
4 ; CHECK: .version 3.0
5
0 ; RUN: llc < %s -march=nvptx -mcpu=sm_20 -mattr=ptx31 | FileCheck %s
1 ; RUN: llc < %s -march=nvptx64 -mcpu=sm_20 -mattr=ptx31 | FileCheck %s
2
3
4 ; CHECK: .version 3.1
5
0 ; RUN: llc < %s -march=nvptx -mcpu=sm_10 | FileCheck %s
1 ; RUN: llc < %s -march=nvptx64 -mcpu=sm_10 | FileCheck %s
2
3
4 ; CHECK: .target sm_10
5
0 ; RUN: llc < %s -march=nvptx -mcpu=sm_11 | FileCheck %s
1 ; RUN: llc < %s -march=nvptx64 -mcpu=sm_11 | FileCheck %s
2
3
4 ; CHECK: .target sm_11
5
0 ; RUN: llc < %s -march=nvptx -mcpu=sm_12 | FileCheck %s
1 ; RUN: llc < %s -march=nvptx64 -mcpu=sm_12 | FileCheck %s
2
3
4 ; CHECK: .target sm_12
5
0 ; RUN: llc < %s -march=nvptx -mcpu=sm_13 | FileCheck %s
1 ; RUN: llc < %s -march=nvptx64 -mcpu=sm_13 | FileCheck %s
2
3
4 ; CHECK: .target sm_13
5
0 ; RUN: llc < %s -march=nvptx -mcpu=sm_20 | FileCheck %s
1 ; RUN: llc < %s -march=nvptx64 -mcpu=sm_20 | FileCheck %s
2
3
4 ; CHECK: .target sm_20
5
0 ; RUN: llc < %s -march=nvptx -mcpu=sm_21 | FileCheck %s
1 ; RUN: llc < %s -march=nvptx64 -mcpu=sm_21 | FileCheck %s
2
3
4 ; CHECK: .target sm_21
5
0 ; RUN: llc < %s -march=nvptx -mcpu=sm_30 | FileCheck %s
1 ; RUN: llc < %s -march=nvptx64 -mcpu=sm_30 | FileCheck %s
2
3
4 ; CHECK: .target sm_30
5
0 ; RUN: llc < %s -march=nvptx -mcpu=sm_35 | FileCheck %s
1 ; RUN: llc < %s -march=nvptx64 -mcpu=sm_35 | FileCheck %s
2
3
4 ; CHECK: .target sm_35
5