llvm.org GIT mirror llvm / 08d4d2b
Revert "[AVR] Insert unconditional branch when inserting MBBs between blocks with fallthrough" This reverts commit r351718. Carl pointed out that the unit test could be improved. This patch will be recommitted once the test is made more resilient. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351719 91177308-0d34-0410-b5e6-96231b3b80d8 Dylan McKay 1 year, 10 months ago
2 changed file(s) with 0 addition(s) and 74 deletion(s). Raw diff Collapse all Expand all
16331633
16341634 MachineFunction *MF = MBB->getParent();
16351635 const BasicBlock *LLVM_BB = MBB->getBasicBlock();
1636 MachineBasicBlock *FallThrough = MBB->getFallThrough();
1637
1638 // If the current basic block falls through to another basic block,
1639 // we must insert an unconditional branch to the fallthrough destination
1640 // if we are to insert basic blocks at the prior fallthrough point.
1641 if (FallThrough != nullptr) {
1642 BuildMI(MBB, dl, TII.get(AVR::RJMPk)).addMBB(FallThrough);
1643 }
1644
16451636 MachineBasicBlock *trueMBB = MF->CreateMachineBasicBlock(LLVM_BB);
16461637 MachineBasicBlock *falseMBB = MF->CreateMachineBasicBlock(LLVM_BB);
16471638
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test/CodeGen/AVR/avr-rust-issue-123.ll less more
None ; RUN: llc -O1 < %s -march=avr | FileCheck %s
1
2 ; This test ensures that the Select8/Select16 expansion
3 ; pass inserts an unconditional branch to the previous adjacent
4 ; basic block when inserting new basic blocks when the
5 ; prior block has a fallthrough.
6 ;
7 ; Before this bug was fixed, Select8/Select16 expansion
8 ; would leave a dangling fallthrough to an undefined block.
9 ;
10 ; The BranchFolding pass would later rearrange the basic
11 ; blocks based on predecessor/successor list assumptions
12 ; which were made incorrect due to the invalid Select
13 ; expansion.
14
15 ; More information in
16 ; https://github.com/avr-rust/rust/issues/123.
17
18 %UInt8 = type <{ i8 }>
19 %UInt32 = type <{ i32 }>
20 %Sb = type <{ i1 }>
21
22 @delayFactor = hidden global %UInt8 zeroinitializer, align 1
23 @delay = hidden global %UInt32 zeroinitializer, align 4
24 @flag = hidden global %Sb zeroinitializer, align 1
25
26 declare void @eeprom_write(i16, i8)
27
28 define hidden void @update_register(i8 %arg, i8 %arg1) {
29 entry:
30 switch i8 %arg, label %bb7 [
31 i8 6, label %bb
32 i8 7, label %bb6
33 ]
34
35 bb: ; preds = %entry
36 %tmp = icmp ugt i8 %arg1, 90
37 %tmp2 = icmp ult i8 %arg1, 5
38 %. = select i1 %tmp2, i8 5, i8 %arg1
39 %tmp3 = select i1 %tmp, i8 90, i8 %.
40 store i8 %tmp3, i8* getelementptr inbounds (%UInt8, %UInt8* @delayFactor, i64 0, i32 0), align 1
41 %tmp4 = zext i8 %tmp3 to i32
42 %tmp5 = mul nuw nsw i32 %tmp4, 100
43 store i32 %tmp5, i32* getelementptr inbounds (%UInt32, %UInt32* @delay, i64 0, i32 0), align 4
44 tail call void @eeprom_write(i16 34, i8 %tmp3)
45 br label %bb7
46
47 bb6: ; preds = %entry
48 %not. = icmp ne i8 %arg1, 0
49 %.2 = zext i1 %not. to i8
50 store i1 %not., i1* getelementptr inbounds (%Sb, %Sb* @flag, i64 0, i32 0), align 1
51
52 ; CHECK: LBB0_{{[0-9]+}}:
53 ; CHECK: call eeprom_write
54 ; CHECK-NEXT: LBB0_{{[0-9]+}}
55 ; CHECK-NEXT: pop r{{[0-9]+}}
56 ; CHECK-NEXT: ret
57
58 tail call void @eeprom_write(i16 35, i8 %.2)
59 br label %bb7
60
61 bb7: ; preds = %bb6, %bb, %entry
62 ret void
63 }
64