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[AMDGPU][MC] Incorrect parsing of flat/global atomic modifiers See bug 35730: https://bugs.llvm.org/show_bug.cgi?id=35730 Differential Revision: https://reviews.llvm.org/D41598 Reviewers: vpykhtin, artem.tamazov, arsenm git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321552 91177308-0d34-0410-b5e6-96231b3b80d8 Dmitry Preobrazhensky 2 years ago
3 changed file(s) with 99 addition(s) and 1 deletion(s). Raw diff Collapse all Expand all
814814 class AMDGPUAsmParser : public MCTargetAsmParser {
815815 MCAsmParser &Parser;
816816
817 // Number of extra operands parsed after the first optional operand.
818 // This may be necessary to skip hardcoded mandatory operands.
819 static const unsigned MAX_OPR_LOOKAHEAD = 1;
820
817821 unsigned ForcedEncodingSize = 0;
818822 bool ForcedDPP = false;
819823 bool ForcedSDWA = false;
10361040
10371041 public:
10381042 OperandMatchResultTy parseOptionalOperand(OperandVector &Operands);
1043 OperandMatchResultTy parseOptionalOpr(OperandVector &Operands);
10391044
10401045 OperandMatchResultTy parseExpTgt(OperandVector &Operands);
10411046 OperandMatchResultTy parseSendMsgOp(OperandVector &Operands);
38583863 } else {
38593864 // Swizzle "offset" operand is optional.
38603865 // If it is omitted, try parsing other optional operands.
3861 return parseOptionalOperand(Operands);
3866 return parseOptionalOpr(Operands);
38623867 }
38633868 }
38643869
41784183 };
41794184
41804185 OperandMatchResultTy AMDGPUAsmParser::parseOptionalOperand(OperandVector &Operands) {
4186 unsigned size = Operands.size();
4187 assert(size > 0);
4188
4189 OperandMatchResultTy res = parseOptionalOpr(Operands);
4190
4191 // This is a hack to enable hardcoded mandatory operands which follow
4192 // optional operands.
4193 //
4194 // Current design assumes that all operands after the first optional operand
4195 // are also optional. However implementation of some instructions violates
4196 // this rule (see e.g. flat/global atomic which have hardcoded 'glc' operands).
4197 //
4198 // To alleviate this problem, we have to (implicitly) parse extra operands
4199 // to make sure autogenerated parser of custom operands never hit hardcoded
4200 // mandatory operands.
4201
4202 if (size == 1 || ((AMDGPUOperand &)*Operands[size - 1]).isRegKind()) {
4203
4204 // We have parsed the first optional operand.
4205 // Parse as many operands as necessary to skip all mandatory operands.
4206
4207 for (unsigned i = 0; i < MAX_OPR_LOOKAHEAD; ++i) {
4208 if (res != MatchOperand_Success ||
4209 getLexer().is(AsmToken::EndOfStatement)) break;
4210 if (getLexer().is(AsmToken::Comma)) Parser.Lex();
4211 res = parseOptionalOpr(Operands);
4212 }
4213 }
4214
4215 return res;
4216 }
4217
4218 OperandMatchResultTy AMDGPUAsmParser::parseOptionalOpr(OperandVector &Operands) {
41814219 OperandMatchResultTy res;
41824220 for (const OptionalOperand &Op : AMDGPUOptionalOperandTable) {
41834221 // try to parse any optional operand here
3333 flat_atomic_add v[3:4], v5 inst_offset:8 slc
3434 // GFX9: flat_atomic_add v[3:4], v5 offset:8 slc ; encoding: [0x08,0x00,0x0a,0xdd,0x03,0x05,0x00,0x00]
3535 // VIERR: :1: error: invalid operand for instruction
36
37 flat_atomic_cmpswap v[1:2], v[3:4] offset:4095
38 // GFX9: flat_atomic_cmpswap v[1:2], v[3:4] offset:4095 ; encoding: [0xff,0x0f,0x04,0xdd,0x01,0x03,0x00,0x00]
39 // VIERR: :1: error: invalid operand for instruction
40
41 flat_atomic_cmpswap v[1:2], v[3:4] offset:4095 slc
42 // GFX9: flat_atomic_cmpswap v[1:2], v[3:4] offset:4095 slc ; encoding: [0xff,0x0f,0x06,0xdd,0x01,0x03,0x00,0x00]
43 // VIERR: :1: error: invalid operand for instruction
44
45 flat_atomic_cmpswap v[1:2], v[3:4]
46 // GFX9: flat_atomic_cmpswap v[1:2], v[3:4] ; encoding: [0x00,0x00,0x04,0xdd,0x01,0x03,0x00,0x00]
47 // VI: flat_atomic_cmpswap v[1:2], v[3:4] ; encoding: [0x00,0x00,0x04,0xdd,0x01,0x03,0x00,0x00]
48
49 flat_atomic_cmpswap v[1:2], v[3:4] slc
50 // GFX9: flat_atomic_cmpswap v[1:2], v[3:4] slc ; encoding: [0x00,0x00,0x06,0xdd,0x01,0x03,0x00,0x00]
51 // VI: flat_atomic_cmpswap v[1:2], v[3:4] slc ; encoding: [0x00,0x00,0x06,0xdd,0x01,0x03,0x00,0x00]
52
53 flat_atomic_cmpswap v[1:2], v[3:4] offset:4095 glc
54 // GCNERR: error: invalid operand for instruction
55
56 flat_atomic_cmpswap v[1:2], v[3:4] glc
57 // GCNERR: error: invalid operand for instruction
58
59 flat_atomic_cmpswap v0, v[1:2], v[3:4] offset:4095 glc
60 // GFX9: flat_atomic_cmpswap v0, v[1:2], v[3:4] offset:4095 glc ; encoding: [0xff,0x0f,0x05,0xdd,0x01,0x03,0x00,0x00]
61 // VIERR: :1: error: invalid operand for instruction
62
63 flat_atomic_cmpswap v0, v[1:2], v[3:4] offset:4095 glc slc
64 // GFX9: flat_atomic_cmpswap v0, v[1:2], v[3:4] offset:4095 glc slc ; encoding: [0xff,0x0f,0x07,0xdd,0x01,0x03,0x00,0x00]
65 // VIERR: :1: error: invalid operand for instruction
66
67 flat_atomic_cmpswap v0, v[1:2], v[3:4] glc
68 // GFX9: flat_atomic_cmpswap v0, v[1:2], v[3:4] glc ; encoding: [0x00,0x00,0x05,0xdd,0x01,0x03,0x00,0x00]
69 // VI: flat_atomic_cmpswap v0, v[1:2], v[3:4] glc ; encoding: [0x00,0x00,0x05,0xdd,0x01,0x03,0x00,0x00]
70
71 flat_atomic_cmpswap v0, v[1:2], v[3:4] glc slc
72 // GFX9: flat_atomic_cmpswap v0, v[1:2], v[3:4] glc slc ; encoding: [0x00,0x00,0x07,0xdd,0x01,0x03,0x00,0x00]
73 // VI: flat_atomic_cmpswap v0, v[1:2], v[3:4] glc slc ; encoding: [0x00,0x00,0x07,0xdd,0x01,0x03,0x00,0x00]
74
75 flat_atomic_cmpswap v0, v[1:2], v[3:4]
76 // GFX9: flat_atomic_cmpswap v0, v[1:2], v[3:4] glc ; encoding: [0x00,0x00,0x05,0xdd,0x01,0x03,0x00,0x00]
77 // VI: flat_atomic_cmpswap v0, v[1:2], v[3:4] glc ; encoding: [0x00,0x00,0x05,0xdd,0x01,0x03,0x00,0x00]
78
79 flat_atomic_cmpswap v0, v[1:2], v[3:4] offset:4095
80 // GCNERR: error: too few operands for instruction
81
82 flat_atomic_cmpswap v0, v[1:2], v[3:4] slc
83 // GCNERR: error: invalid operand for instruction
3684
3785 flat_atomic_swap v[3:4], v5 offset:16
3886 // GFX9: flat_atomic_swap v[3:4], v5 offset:16 ; encoding: [0x10,0x00,0x00,0xdd,0x03,0x05,0x00,0x00]
77
88 # CHECK: flat_atomic_add v0, v[0:1], v0 offset:4095 glc ; encoding: [0xff,0x0f,0x09,0xdd,0x00,0x00,0x00,0x00]
99 0xff,0x0f,0x09,0xdd,0x00,0x00,0x00,0x00
10
11 # CHECK: flat_atomic_add v0, v[0:1], v0 offset:4095 glc slc ; encoding: [0xff,0x0f,0x0b,0xdd,0x00,0x00,0x00,0x00]
12 0xff,0x0f,0x0b,0xdd,0x00,0x00,0x00,0x00
13
14 # CHECK: flat_atomic_add v0, v[0:1], v0 glc ; encoding: [0x00,0x00,0x09,0xdd,0x00,0x00,0x00,0x00]
15 0x00,0x00,0x09,0xdd,0x00,0x00,0x00,0x00
16
17 # CHECK: flat_atomic_add v0, v[0:1], v0 glc slc ; encoding: [0x00,0x00,0x0b,0xdd,0x00,0x00,0x00,0x00]
18 0x00,0x00,0x0b,0xdd,0x00,0x00,0x00,0x00
19
20 # CHECK: flat_atomic_add v[0:1], v0 slc ; encoding: [0x00,0x00,0x0a,0xdd,0x00,0x00,0x00,0x00]
21 0x00,0x00,0x0a,0xdd,0x00,0x00,0x00,0x00
1022
1123 # CHECK: flat_atomic_add v[0:1], v0 offset:4095 slc ; encoding: [0xff,0x0f,0x0a,0xdd,0x00,0x00,0x00,0x00]
1224 0xff,0x0f,0x0a,0xdd,0x00,0x00,0x00,0x00