llvm.org GIT mirror llvm / 087ab61
Correct word hyphenations This patch tries to avoid unrelated changes other than fixing a few hyphen-related ambiguities and contractions in nearby lines. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196471 91177308-0d34-0410-b5e6-96231b3b80d8 Alp Toker 5 years ago
68 changed file(s) with 92 addition(s) and 92 deletion(s). Raw diff Collapse all Expand all
843843
844844 .. code-block:: c++
845845
846 assert(Ty->isPointerType() && "Can't allocate a non pointer type!");
846 assert(Ty->isPointerType() && "Can't allocate a non-pointer type!");
847847
848848 assert((Opcode == Shl || Opcode == Shr) && "ShiftInst Opcode invalid!");
849849
12751275 ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
12761276
12771277 The ``cl::getRegisteredOptions`` function is designed to give a programmer
1278 access to declared non positional command line options so that how they appear
1278 access to declared non-positional command line options so that how they appear
12791279 in ``-help`` can be modified prior to calling `cl::ParseCommandLineOptions`_.
12801280 Note this method should not be called during any static initialisation because
12811281 it cannot be guaranteed that all options will have been initialised. Hence it
611611 The linkage must be one of ``private``, ``linker_private``,
612612 ``linker_private_weak``, ``internal``, ``linkonce``, ``weak``,
613613 ``linkonce_odr``, ``weak_odr``, ``external``. Note that some system linkers
614 might not correctly handle dropping a weak symbol that is aliased by a non weak
614 might not correctly handle dropping a weak symbol that is aliased by a non-weak
615615 alias.
616616
617617 .. _namedmetadatastructure:
23052305 Mach-O Changes
23062306 """"""""""""""
23072307
2308 The sections names for the apple hash tables are for non mach-o files. For
2308 The sections names for the apple hash tables are for non-mach-o files. For
23092309 mach-o files, the sections should be contained in the ``__DWARF`` segment with
23102310 names as follows:
23112311
381381 AtEnd = true;
382382 return;
383383 }
384 // Set up for next non zero word in bitmap.
384 // Set up for next non-zero word in bitmap.
385385 BitNumber = Iter->index() * ElementSize;
386386 NextSetBitNumber = Iter->find_first();
387387 BitNumber += NextSetBitNumber;
3333 // IntervalPartition - This class builds and holds an "interval partition" for
3434 // a function. This partition divides the control flow graph into a set of
3535 // maximal intervals, as defined with the properties above. Intuitively, an
36 // interval is a (possibly nonexistent) loop with a "tail" of non looping
36 // interval is a (possibly nonexistent) loop with a "tail" of non-looping
3737 // nodes following it.
3838 //
3939 class IntervalPartition : public FunctionPass {
311311 /// The toplevel region represents the whole function.
312312 bool isTopLevelRegion() const { return exit == NULL; }
313313
314 /// @brief Return a new (non canonical) region, that is obtained by joining
314 /// @brief Return a new (non-canonical) region, that is obtained by joining
315315 /// this region with its predecessors.
316316 ///
317317 /// @return A region also starting at getEntry(), but reaching to the next
318 /// basic block that forms with getEntry() a (non canonical) region.
318 /// basic block that forms with getEntry() a (non-canonical) region.
319319 /// NULL if such a basic block does not exist.
320320 Region *getExpandedRegion() const;
321321
4242 };
4343
4444 /// Record a physical register access.
45 /// For non data-dependent uses, OpIdx == -1.
45 /// For non-data-dependent uses, OpIdx == -1.
4646 struct PhysRegSUOper {
4747 SUnit *SU;
4848 int OpIdx;
8181
8282 /// LinkerRequiresNonEmptyDwarfLines - True if the linker has a bug and
8383 /// requires that the debug_line section be of a minimum size. In practice
84 /// such a linker requires a non empty line sequence if a file is present.
84 /// such a linker requires a non-empty line sequence if a file is present.
8585 bool LinkerRequiresNonEmptyDwarfLines; // Default to false.
8686
8787 /// MaxInstLength - This is the maximum possible length of an instruction,
140140 }
141141
142142 // AliasedSymbol() - If this is an alias (a = b), return the symbol
143 // we ultimately point to. For a non alias, this just returns the symbol
143 // we ultimately point to. For a non-alias, this just returns the symbol
144144 // itself.
145145 const MCSymbol &AliasedSymbol() const;
146146
3333 USE_iterator It;
3434
3535 inline void advancePastNonTerminators() {
36 // Loop to ignore non terminator uses (for example BlockAddresses).
36 // Loop to ignore non-terminator uses (for example BlockAddresses).
3737 while (!It.atEnd() && !isa(*It))
3838 ++It;
3939 }
879879 }
880880
881881 /// Indicate whether this target prefers to use _setjmp to implement
882 /// llvm.setjmp or the non _ version. Defaults to false.
882 /// llvm.setjmp or the version without _. Defaults to false.
883883 void setUseUnderscoreSetJmp(bool Val) {
884884 UseUnderscoreSetJmp = Val;
885885 }
886886
887887 /// Indicate whether this target prefers to use _longjmp to implement
888 /// llvm.longjmp or the non _ version. Defaults to false.
888 /// llvm.longjmp or the version without _. Defaults to false.
889889 void setUseUnderscoreLongJmp(bool Val) {
890890 UseUnderscoreLongJmp = Val;
891891 }
7171 // If it isn't in the InstInputs list it is a subexpr incorporated into the
7272 // address. Sanity check that it is phi translatable.
7373 if (!CanPHITrans(I)) {
74 errs() << "Non phi translatable instruction found in PHITransAddr:\n";
74 errs() << "Instruction in PHITransAddr is not phi-translatable:\n";
7575 errs() << *I << '\n';
7676 llvm_unreachable("Either something is missing from InstInputs or "
7777 "CanPHITrans is wrong.");
15271527 //
15281528 // This is independent of PostIncLoops. The mapped value simply materializes
15291529 // the expression at this insertion point. If the mapped value happened to be
1530 // a postinc expansion, it could be reused by a non postinc user, but only if
1530 // a postinc expansion, it could be reused by a non-postinc user, but only if
15311531 // its insertion point was already at the head of the loop.
15321532 InsertedExpressions[std::make_pair(S, InsertPt)] = V;
15331533 return V;
689689 }
690690 }
691691
692 /// If RegPressure is non null, compute register pressure as a side effect. The
692 /// If RegPressure is non-null, compute register pressure as a side effect. The
693693 /// DAG builder is an efficient place to do it because it already visits
694694 /// operands.
695695 void ScheduleDAGInstrs::buildSchedGraph(AliasAnalysis *AA,
81198119
81208120 // The width of the type must be a power of 2 and greater than 8-bits.
81218121 // Otherwise the load cannot be represented in LLVM IR.
8122 // Moreover, if we shifted with a non 8-bits multiple, the slice
8122 // Moreover, if we shifted with a non-8-bits multiple, the slice
81238123 // will be accross several bytes. We do not support that.
81248124 unsigned Width = User->getValueSizeInBits(0);
81258125 if (Width < 8 || !isPowerOf2_32(Width) || (Shift & 0x7))
87618761 } else if (ConstantFPSDNode *C = dyn_cast(StoredVal)) {
87628762 NonZero |= !C->getConstantFPValue()->isNullValue();
87638763 } else {
8764 // Non constant.
8764 // Non-constant.
87658765 break;
87668766 }
87678767
669669 LoadSDNode *LD, ISD::LoadExtType ExtType);
670670
671671 /// Helper genWidenVectorStores - Helper function to generate a set of
672 /// stores to store a widen vector into non widen memory
672 /// stores to store a widen vector into non-widen memory
673673 /// StChain: list of chains for the stores we have generated
674674 /// ST: store of a widen value
675675 void GenWidenVectorStores(SmallVectorImpl &StChain, StoreSDNode *ST);
676676
677677 /// Helper genWidenVectorTruncStores - Helper function to generate a set of
678 /// stores to store a truncate widen vector into non widen memory
678 /// stores to store a truncate widen vector into non-widen memory
679679 /// StChain: list of chains for the stores we have generated
680680 /// ST: store of a widen value
681681 void GenWidenVectorTruncStores(SmallVectorImpl &StChain,
22502250
22512251 SDValue InOp1 = N->getOperand(0);
22522252 EVT InVT = InOp1.getValueType();
2253 assert(InVT.isVector() && "can not widen non vector type");
2253 assert(InVT.isVector() && "can not widen non-vector type");
22542254 EVT WidenInVT = EVT::getVectorVT(*DAG.getContext(),
22552255 InVT.getVectorElementType(), WidenNumElts);
22562256 InOp1 = GetWidenedVector(InOp1);
451451 // We have a single consecutive region.
452452 Intervals[i]->addSegment(LiveInterval::Segment(S, F, ValNum));
453453 } else {
454 // We have two non consecutive regions. This happens when
454 // We have two non-consecutive regions. This happens when
455455 // LIFETIME_START appears after the LIFETIME_END marker.
456456 SlotIndex NewStart = Indexes->getMBBStartIdx(MBB);
457457 SlotIndex NewFin = Indexes->getMBBEndIdx(MBB);
22052205 case 3:
22062206 // No-op cast in second op implies firstOp as long as the DestTy
22072207 // is integer and we are not converting between a vector and a
2208 // non vector type.
2208 // non-vector type.
22092209 if (!SrcTy->isVectorTy() && DstTy->isIntegerTy())
22102210 return firstOp;
22112211 return 0;
28222822 if (SrcTy->isPtrOrPtrVectorTy() != DstTy->isPtrOrPtrVectorTy())
28232823 return false;
28242824
2825 // For non pointer cases, the cast is okay if the source and destination bit
2825 // For non-pointer cases, the cast is okay if the source and destination bit
28262826 // widths are identical.
28272827 if (!SrcTy->isPtrOrPtrVectorTy())
28282828 return SrcTy->getPrimitiveSizeInBits() == DstTy->getPrimitiveSizeInBits();
474474 }
475475
476476 // createTheTimeInfo - This method either initializes the TheTimeInfo pointer
477 // to a non null value (if the -time-passes option is enabled) or it leaves it
477 // to a non-null value (if the -time-passes option is enabled) or it leaves it
478478 // null. It may be called multiple times.
479479 static void createTheTimeInfo();
480480
17541754 cl::desc("Time each pass, printing elapsed time for each on exit"));
17551755
17561756 // createTheTimeInfo - This method either initializes the TheTimeInfo pointer to
1757 // a non null value (if the -time-passes option is enabled) or it leaves it
1757 // a non-null value (if the -time-passes option is enabled) or it leaves it
17581758 // null. It may be called multiple times.
17591759 void TimingInfo::createTheTimeInfo() {
17601760 if (!TimePassesIsEnabled || TheTimeInfo) return;
137137
138138 StringMapEntry *NameEntry = &UsedNames.GetOrCreateValue(Name);
139139 if (NameEntry->getValue()) {
140 assert(isTemporary && "Cannot rename non temporary symbols");
140 assert(isTemporary && "Cannot rename non-temporary symbols");
141141 SmallString<128> NewName = Name;
142142 do {
143143 NewName.resize(Name.size());
6767 ENTRY(0 /*FIXME*/, S_ATTR_LOC_RELOC)
6868 #undef ENTRY
6969 { 0, "none", 0 }, // used if section has no attributes but has a stub size
70 #define AttrFlagEnd 0xffffffff // non legal value, multiple attribute bits set
70 #define AttrFlagEnd 0xffffffff // non-legal value, multiple attribute bits set
7171 { AttrFlagEnd, 0, 0 }
7272 };
7373
445445 }
446446 }
447447
448 // Bind non lazy symbol pointers first.
448 // Bind non-lazy symbol pointers first.
449449 unsigned IndirectIndex = 0;
450450 for (MCAssembler::indirect_symbol_iterator it = Asm.indirect_symbol_begin(),
451451 ie = Asm.indirect_symbol_end(); it != ie; ++it, ++IndirectIndex) {
916916 for (MCAssembler::const_indirect_symbol_iterator
917917 it = Asm.indirect_symbol_begin(),
918918 ie = Asm.indirect_symbol_end(); it != ie; ++it) {
919 // Indirect symbols in the non lazy symbol pointer section have some
919 // Indirect symbols in the non-lazy symbol pointer section have some
920920 // special handling.
921921 const MCSectionMachO &Section =
922922 static_cast(it->SectionData->getSection());
350350 /// and creates the associated COFF section staging object.
351351 void WinCOFFObjectWriter::DefineSection(MCSectionData const &SectionData) {
352352 assert(SectionData.getSection().getVariant() == MCSection::SV_COFF
353 && "Got non COFF section in the COFF backend!");
353 && "Got non-COFF section in the COFF backend!");
354354 // FIXME: Not sure how to verify this (at least in a debug build).
355355 MCSectionCOFF const &Sec =
356356 static_cast(SectionData.getSection());
189189 assert(Symbol && "Symbol must be non-null!");
190190 assert((Symbol->isInSection()
191191 ? Symbol->getSection().getVariant() == MCSection::SV_COFF
192 : true) && "Got non COFF section in the COFF backend!");
192 : true) && "Got non-COFF section in the COFF backend!");
193193 switch (Attribute) {
194194 case MCSA_WeakReference:
195195 case MCSA_Weak: {
217217 void WinCOFFStreamer::BeginCOFFSymbolDef(MCSymbol const *Symbol) {
218218 assert((Symbol->isInSection()
219219 ? Symbol->getSection().getVariant() == MCSection::SV_COFF
220 : true) && "Got non COFF section in the COFF backend!");
220 : true) && "Got non-COFF section in the COFF backend!");
221221 assert(CurSymbol == NULL && "EndCOFFSymbolDef must be called between calls "
222222 "to BeginCOFFSymbolDef!");
223223 CurSymbol = Symbol;
267267 unsigned ByteAlignment) {
268268 assert((Symbol->isInSection()
269269 ? Symbol->getSection().getVariant() == MCSection::SV_COFF
270 : true) && "Got non COFF section in the COFF backend!");
270 : true) && "Got non-COFF section in the COFF backend!");
271271 AddCommonSymbol(Symbol, Size, ByteAlignment, true);
272272 }
273273
275275 unsigned ByteAlignment) {
276276 assert((Symbol->isInSection()
277277 ? Symbol->getSection().getVariant() == MCSection::SV_COFF
278 : true) && "Got non COFF section in the COFF backend!");
278 : true) && "Got non-COFF section in the COFF backend!");
279279 AddCommonSymbol(Symbol, Size, ByteAlignment, false);
280280 }
281281
38153815 // Decrement the significand.
38163816 //
38173817 // We always do this since:
3818 // 1. If we are dealing with a non binade decrement, by definition we
3818 // 1. If we are dealing with a non-binade decrement, by definition we
38193819 // just decrement the significand.
38203820 // 2. If we are dealing with a normal -> normal binade decrement, since
38213821 // we have an explicit integral bit the fact that all bits but the
644644
645645 char *mapped_file_region::data() const {
646646 assert(Mapping && "Mapping failed but used anyway!");
647 assert(Mode != readonly && "Cannot get non const data for readonly mapping!");
647 assert(Mode != readonly && "Cannot get non-const data for readonly mapping!");
648648 return reinterpret_cast(Mapping);
649649 }
650650
858858 }
859859
860860 char *mapped_file_region::data() const {
861 assert(Mode != readonly && "Cannot get non const data for readonly mapping!");
861 assert(Mode != readonly && "Cannot get non-const data for readonly mapping!");
862862 assert(Mapping && "Mapping failed but used anyway!");
863863 return reinterpret_cast(Mapping);
864864 }
164164 if (!MI) return ARM::ssub_0;
165165 MachineOperand *MO = MI->findRegisterDefOperand(SReg);
166166
167 assert(MO->isReg() && "Non register operand found!");
167 assert(MO->isReg() && "Non-register operand found!");
168168 if (!MO) return ARM::ssub_0;
169169
170170 if (MI->isCopy() && usesRegClass(MI->getOperand(1),
28012801 bool ForceMutable) const {
28022802
28032803 // Currently, two use-cases possible:
2804 // Case #1. Non var-args function, and we meet first byval parameter.
2804 // Case #1. Non-var-args function, and we meet first byval parameter.
28052805 // Setup first unallocated register as first byval register;
28062806 // eat all remained registers
28072807 // (these two actions are performed by HandleByVal method).
22162216 SchedVar]>;
22172217
22182218 //===----------------------------------------------------------------------===//
2219 // Resources for other (non LDM/VLDM) Variants.
2219 // Resources for other (non-LDM/VLDM) Variants.
22202220
22212221 // These mov immediate writers are unconditionally expanded with
22222222 // additive latency.
144144 SDValue Src, SDValue Size,
145145 unsigned Align, bool isVolatile,
146146 MachinePointerInfo DstPtrInfo) const {
147 // Use default for non AAPCS (or Darwin) subtargets
147 // Use default for non-AAPCS (or Darwin) subtargets
148148 if (!Subtarget->isAAPCS_ABI() || Subtarget->isTargetDarwin())
149149 return SDValue();
150150
15791579 void addRegShiftedRegOperands(MCInst &Inst, unsigned N) const {
15801580 assert(N == 3 && "Invalid number of operands!");
15811581 assert(isRegShiftedReg() &&
1582 "addRegShiftedRegOperands() on non RegShiftedReg!");
1582 "addRegShiftedRegOperands() on non-RegShiftedReg!");
15831583 Inst.addOperand(MCOperand::CreateReg(RegShiftedReg.SrcReg));
15841584 Inst.addOperand(MCOperand::CreateReg(RegShiftedReg.ShiftReg));
15851585 Inst.addOperand(MCOperand::CreateImm(
15891589 void addRegShiftedImmOperands(MCInst &Inst, unsigned N) const {
15901590 assert(N == 2 && "Invalid number of operands!");
15911591 assert(isRegShiftedImm() &&
1592 "addRegShiftedImmOperands() on non RegShiftedImm!");
1592 "addRegShiftedImmOperands() on non-RegShiftedImm!");
15931593 Inst.addOperand(MCOperand::CreateReg(RegShiftedImm.SrcReg));
15941594 // Shift of #32 is encoded as 0 where permitted
15951595 unsigned Imm = (RegShiftedImm.ShiftImm == 32 ? 0 : RegShiftedImm.ShiftImm);
16381638 }
16391639
16401640 //===--------------------------------------------------------------------===//
1641 // Return true if the non GP-relative global address can be folded.
1641 // Return true if the non-GP-relative global address can be folded.
16421642 //===--------------------------------------------------------------------===//
16431643 inline bool HexagonDAGToDAGISel::foldGlobalAddress(SDValue &N, SDValue &R) {
16441644 return foldGlobalAddressImpl(N, R, false);
15381538 assert(0 && "Couldn't change predicate new instruction to its old form.");
15391539 }
15401540
1541 if (isNewValueStore(NewOp)) { // Convert into non new-value format
1541 if (isNewValueStore(NewOp)) { // Convert into non-new-value format
15421542 NewOp = Hexagon::getNonNVStore(NewOp);
15431543 if (NewOp < 0)
15441544 assert(0 && "Couldn't change new-value store to its old form.");
10151015 bits<5> src1;
10161016 bits<5> src2;
10171017 bits<3> Ns; // New-Value Operand
1018 bits<5> RegOp; // Non New-Value Operand
1018 bits<5> RegOp; // Non-New-Value Operand
10191019 bits<11> offset;
10201020
10211021 let isBrTaken = !if(isTaken, "true", "false");
680680 }
681681 }
682682
683 // Make sure that for non POST_INC stores:
683 // Make sure that for non-POST_INC stores:
684684 // 1. The only use of reg is DepReg and no other registers.
685685 // This handles V4 base+index registers.
686686 // The following store can not be dot new.
4040 }
4141
4242
43 // Only assign registers for named (non varargs) arguments
43 // Only assign registers for named (non-varargs) arguments
4444 if ( !ForceMem && ((NonVarArgsParams == -1) || (CurrentParam <=
4545 NonVarArgsParams))) {
4646
297297
298298 //
299299 // This are pseudo formats for multiply
300 // This first one can be changed to non pseudo now.
300 // This first one can be changed to non-pseudo now.
301301 //
302302 // MULT
303303 //
1616 //
1717 // The constants can be not just numbers but addresses of functions and labels.
1818 // This can be particularly helpful in static relocation mode for embedded
19 // non linux targets.
19 // non-linux targets.
2020 //
2121 //
2222
15791579 continue;
15801580 }
15811581 // Non-kernel function, just print .param .b for ABI
1582 // and .reg .b for non ABY
1582 // and .reg .b for non-ABI
15831583 unsigned sz = 0;
15841584 if (isa(Ty)) {
15851585 sz = cast(Ty)->getBitWidth();
29672967 if (Flags.isByVal()) return false;
29682968 }
29692969
2970 // Non PIC/GOT tail calls are supported.
2970 // Non-PIC/GOT tail calls are supported.
29712971 if (getTargetMachine().getRelocationModel() != Reloc::PIC_)
29722972 return true;
29732973
12381238 }
12391239 Result = DAG.getNode(ISD::BUILD_VECTOR, DL, NewVT, Slots, NumElements);
12401240 } else {
1241 // non constant ptr cant be folded, keeps it as a v4f32 load
1241 // non-constant ptr can't be folded, keeps it as a v4f32 load
12421242 Result = DAG.getNode(AMDGPUISD::CONST_ADDRESS, DL, MVT::v4i32,
12431243 DAG.getNode(ISD::SRL, DL, MVT::i32, Ptr, DAG.getConstant(4, MVT::i32)),
12441244 DAG.getConstant(LoadNode->getAddressSpace() -
204204 void SIAnnotateControlFlow::handleLoopCondition(Value *Cond) {
205205 if (PHINode *Phi = dyn_cast(Cond)) {
206206
207 // Handle all non constant incoming values first
207 // Handle all non-constant incoming values first
208208 for (unsigned i = 0, e = Phi->getNumIncomingValues(); i != e; ++i) {
209209 Value *Incoming = Phi->getIncomingValue(i);
210210 if (isa(Incoming))
313313 {0x66, 0x2e, 0x0f, 0x1f, 0x84, 0x00, 0x00, 0x00, 0x00, 0x00},
314314 };
315315
316 // This CPU doesnt support long nops. If needed add more.
316 // This CPU doesn't support long nops. If needed add more.
317317 // FIXME: Can we get this from the subtarget somehow?
318318 // FIXME: We could generated something better than plain 0x90.
319319 if (!HasNopl) {
343343 // addl %gs:0, %eax
344344 // if the block also has an access to a second TLS address this will save
345345 // a load.
346 // FIXME: This is probably also true for non TLS addresses.
346 // FIXME: This is probably also true for non-TLS addresses.
347347 if (Op1.getOpcode() == X86ISD::Wrapper) {
348348 SDValue Val = Op1.getOperand(0);
349349 if (Val.getOpcode() == ISD::TargetGlobalTLSAddress)
554554
555555 unsigned X86TTI::getMemoryOpCost(unsigned Opcode, Type *Src, unsigned Alignment,
556556 unsigned AddressSpace) const {
557 // Handle non power of two vectors such as <3 x float>
557 // Handle non-power-of-two vectors such as <3 x float>
558558 if (VectorType *VTy = dyn_cast(Src)) {
559559 unsigned NumElem = VTy->getVectorNumElements();
560560
569569 // Cost = 128 bit store + unpack + 64 bit store.
570570 return 3;
571571
572 // Assume that all other non power-of-two numbers are scalarized.
572 // Assume that all other non-power-of-two numbers are scalarized.
573573 if (!isPowerOf2_32(NumElem)) {
574574 unsigned Cost = TargetTransformInfo::getMemoryOpCost(Opcode,
575575 VTy->getScalarType(),
17361736 // and this function is main (which we know is not recursive), we replace
17371737 // the global with a local alloca in this function.
17381738 //
1739 // NOTE: It doesn't make sense to promote non single-value types since we
1739 // NOTE: It doesn't make sense to promote non-single-value types since we
17401740 // are just replacing static memory to stack memory.
17411741 //
17421742 // If the global is in different address space, don't bring it to stack.
25702570 // We don't insert an entry into Values, as it doesn't have a
25712571 // meaningful return value.
25722572 if (!II->use_empty()) {
2573 DEBUG(dbgs() << "Found unused invariant_start. Cant evaluate.\n");
2573 DEBUG(dbgs() << "Found unused invariant_start. Can't evaluate.\n");
25742574 return false;
25752575 }
25762576 ConstantInt *Size = cast(II->getArgOperand(0));
209209 // Different or no known return value? Don't propagate this return
210210 // value.
211211 RetVals[i] = 0;
212 // All values non constant? Stop looking.
212 // All values non-constant? Stop looking.
213213 if (++NumNonConstant == RetVals.size())
214214 return false;
215215 }
146146 if (OnlyUsedBy(C->getOperand(i), C))
147147 Operands.insert(cast(C->getOperand(i)));
148148 if (GlobalVariable *GV = dyn_cast(C)) {
149 if (!GV->hasLocalLinkage()) return; // Don't delete non static globals.
149 if (!GV->hasLocalLinkage()) return; // Don't delete non-static globals.
150150 GV->eraseFromParent();
151151 }
152152 else if (!isa(C))
10041004 // llvm-arc-annotation-processor tool to cross reference where the source
10051005 // pointer is in the LLVM IR since the LLVM IR parser does not submit such
10061006 // information via debug info for backends to use (since why would anyone
1007 // need such a thing from LLVM IR besides in non standard cases
1007 // need such a thing from LLVM IR besides in non-standard cases
10081008 // [i.e. this]).
10091009 MDString *SourcePtrMDNode =
10101010 AppendMDNodeToSourcePtr(PtrMDId, Ptr);
17881788 ReplInst->setMetadata(Kind, MDNode::getMostGenericRange(IMD, ReplMD));
17891789 break;
17901790 case LLVMContext::MD_prof:
1791 llvm_unreachable("MD_prof in a non terminator instruction");
1791 llvm_unreachable("MD_prof in a non-terminator instruction");
17921792 break;
17931793 case LLVMContext::MD_fpmath:
17941794 ReplInst->setMetadata(Kind, MDNode::getMostGenericFPMath(IMD, ReplMD));
300300 CodeMetrics Metrics;
301301 Metrics.analyzeBasicBlock(OrigHeader, *TTI);
302302 if (Metrics.notDuplicatable) {
303 DEBUG(dbgs() << "LoopRotation: NOT rotating - contains non duplicatable"
303 DEBUG(dbgs() << "LoopRotation: NOT rotating - contains non-duplicatable"
304304 << " instructions: "; L->dump());
305305 return false;
306306 }
212212 notDuplicatable, TTI);
213213 DEBUG(dbgs() << " Loop Size = " << LoopSize << "\n");
214214 if (notDuplicatable) {
215 DEBUG(dbgs() << " Not unrolling loop which contains non duplicatable"
215 DEBUG(dbgs() << " Not unrolling loop which contains non-duplicatable"
216216 << " instructions.\n");
217217 return false;
218218 }
17301730 // Compute the offset due to this GEP and check if the alloca has a
17311731 // component element at that offset.
17321732 SmallVector Indices(GEPI->op_begin() + 1, GEPI->op_end());
1733 // If this GEP is non constant then the last operand must have been a
1733 // If this GEP is non-constant then the last operand must have been a
17341734 // dynamic index into a vector. Pop this now as it has no impact on the
17351735 // constant part of the offset.
17361736 if (NonConstant)
678678
679679 // Iterating over NewPhiNodes is deterministic, so it is safe to try to
680680 // simplify and RAUW them as we go. If it was not, we could add uses to
681 // the values we replace with in a non deterministic order, thus creating
682 // non deterministic def->use chains.
681 // the values we replace with in a non-deterministic order, thus creating
682 // non-deterministic def->use chains.
683683 for (DenseMap, PHINode *>::iterator
684684 I = NewPhiNodes.begin(),
685685 E = NewPhiNodes.end();
563563 /// pointer itself is an induction variable.
564564 /// This check allows us to vectorize A[idx] into a wide load/store.
565565 /// Returns:
566 /// 0 - Stride is unknown or non consecutive.
566 /// 0 - Stride is unknown or non-consecutive.
567567 /// 1 - Address is consecutive.
568568 /// -1 - Address is consecutive, and decreasing.
569569 int isConsecutivePtr(Value *Ptr);
10921092 }
10931093
10941094 int LoopVectorizationLegality::isConsecutivePtr(Value *Ptr) {
1095 assert(Ptr->getType()->isPointerTy() && "Unexpected non ptr");
1095 assert(Ptr->getType()->isPointerTy() && "Unexpected non-ptr");
10961096 // Make sure that the pointer does not point to structs.
10971097 if (Ptr->getType()->getPointerElementType()->isAggregateType())
10981098 return 0;
12151215 if (ScalarAllocatedSize != VectorElementSize)
12161216 return scalarizeInstruction(Instr);
12171217
1218 // If the pointer is loop invariant or if it is non consecutive,
1218 // If the pointer is loop invariant or if it is non-consecutive,
12191219 // scalarize the load.
12201220 int ConsecutiveStride = Legal->isConsecutivePtr(Ptr);
12211221 bool Reverse = ConsecutiveStride < 0;
24292429 setDebugLocFromInst(Builder, P);
24302430 // Check for PHI nodes that are lowered to vector selects.
24312431 if (P->getParent() != OrigLoop->getHeader()) {
2432 // We know that all PHIs in non header blocks are converted into
2432 // We know that all PHIs in non-header blocks are converted into
24332433 // selects, so we don't have to worry about the insertion order and we
24342434 // can just use the builder.
24352435 // At this point we generate the predication tree. There may be
28452845 DEBUG(dbgs() << "LV: Found a loop: " <<
28462846 TheLoop->getHeader()->getName() << '\n');
28472847
2848 // Check if we can if-convert non single-bb loops.
2848 // Check if we can if-convert non-single-bb loops.
28492849 unsigned NumBlocks = TheLoop->getNumBlocks();
28502850 if (NumBlocks != 1 && !canVectorizeWithIfConvert()) {
28512851 DEBUG(dbgs() << "LV: Can't if-convert the loop.\n");
34983498 // We can access this many bytes in parallel safely.
34993499 unsigned MaxSafeDepDistBytes;
35003500
3501 /// \brief If we see a non constant dependence distance we can still try to
3501 /// \brief If we see a non-constant dependence distance we can still try to
35023502 /// vectorize this loop with runtime checks.
35033503 bool ShouldRetryWithRuntimeCheck;
35043504
35343534 static int isStridedPtr(ScalarEvolution *SE, DataLayout *DL, Value *Ptr,
35353535 const Loop *Lp) {
35363536 const Type *Ty = Ptr->getType();
3537 assert(Ty->isPointerTy() && "Unexpected non ptr");
3537 assert(Ty->isPointerTy() && "Unexpected non-ptr");
35383538
35393539 // Make sure that the pointer does not point to aggregate types.
35403540 const PointerType *PtrTy = cast(Ty);
36983698
36993699 const SCEVConstant *C = dyn_cast(Dist);
37003700 if (!C) {
3701 DEBUG(dbgs() << "LV: Dependence because of non constant distance\n");
3701 DEBUG(dbgs() << "LV: Dependence because of non-constant distance\n");
37023702 ShouldRetryWithRuntimeCheck = true;
37033703 return true;
37043704 }
41394139 // Check whether we found a reduction operator.
41404140 FoundReduxOp |= !IsAPhi;
41414141
4142 // Process users of current instruction. Push non PHI nodes after PHI nodes
4142 // Process users of current instruction. Push non-PHI nodes after PHI nodes
41434143 // onto the stack. This way we are going to have seen all inputs to PHI
41444144 // nodes once we get to them.
41454145 SmallVector NonPHIs;
931931 for (unsigned i = 0, e = VL.size() - 1; i < e; ++i)
932932 if (!isConsecutiveAccess(VL[i], VL[i + 1])) {
933933 newTreeEntry(VL, false);
934 DEBUG(dbgs() << "SLP: Non consecutive store.\n");
934 DEBUG(dbgs() << "SLP: Non-consecutive store.\n");
935935 return;
936936 }
937937
0 ; RUN: llc -mcpu=pwr6 -mattr=+altivec < %s | FileCheck %s
11
2 ; Check vector comparisons using altivec. For non native types, just basic
2 ; Check vector comparisons using altivec. For non-native types, just basic
33 ; comparison instruction check is done. For altivec supported type (16i8,
44 ; 8i16, 4i32, and 4f32) all the comparisons operators (==, !=, >, >=, <, <=)
55 ; are checked.
9999 ret <8 x i16> %K
100100 }
101101
102 ; non splat test
102 ; non-splat test
103103
104104
105105 define <8 x i16> @sll8_nosplat(<8 x i16> %A) nounwind {
44 .weak foo
55 .long foo
66
7 // And that bar is after all local symbols and has non zero value.
7 // And that bar is after all local symbols and has non-zero value.
88 .weak bar
99 bar:
1010
2727 RUN: llvm-nm %p/Inputs/archive-test.a-gnu-minimal
2828
2929
30 And don't crash when asked to print a non existing symtab.
30 And don't crash when asked to print a non-existing symtab.
3131 RUN: llvm-nm -s %p/Inputs/archive-test.a-gnu-minimal
3232
3333 Don't reject an empty archive.
0 ; No arguments means internalize everything
11 ; RUN: opt < %s -internalize -S | FileCheck --check-prefix=ALL %s
22
3 ; Non existent files should be treated as if they were empty (so internalize
3 ; Non-existent files should be treated as if they were empty (so internalize
44 ; everything)
55 ; RUN: opt < %s -internalize -internalize-public-api-file /nonexistent/file 2> /dev/null -S | FileCheck --check-prefix=ALL %s
66
3333 ret void
3434 }
3535
36 ; Can't vectorize this loop because the access to A[X] is non linear.
36 ; Can't vectorize this loop because the access to A[X] is non-linear.
3737 ;
3838 ; for (i = 0; i < n; ++i) {
3939 ; A[B[i]]++;
1010 // llvm-config wants to report to the user, but which can only be determined at
1111 // build time.
1212 //
13 // The non .in variant of this file has been autogenerated by the LLVM build. Do
14 // not edit!
13 // The variant of this file not ending with .in has been autogenerated by the
14 // LLVM build. Do not edit!
1515 //
1616 //===----------------------------------------------------------------------===//
1717
288288 struct LoadModifier: public Modifier {
289289 LoadModifier(BasicBlock *BB, PieceTable *PT, Random *R):Modifier(BB, PT, R) {}
290290 virtual void Act() {
291 // Try to use predefined pointers. If non exist, use undef pointer value;
291 // Try to use predefined pointers. If non-exist, use undef pointer value;
292292 Value *Ptr = getRandomPointerValue();
293293 Value *V = new LoadInst(Ptr, "L", BB->getTerminator());
294294 PT->push_back(V);
298298 struct StoreModifier: public Modifier {
299299 StoreModifier(BasicBlock *BB, PieceTable *PT, Random *R):Modifier(BB, PT, R) {}
300300 virtual void Act() {
301 // Try to use predefined pointers. If non exist, use undef pointer value;
301 // Try to use predefined pointers. If non-exist, use undef pointer value;
302302 Value *Ptr = getRandomPointerValue();
303303 Type *Tp = Ptr->getType();
304304 Value *Val = getRandomValue(Tp->getContainedType(0));
115115 ColFields = MapRec->getValueAsListInit("ColFields");
116116
117117 // Values for the fields/attributes listed in 'ColFields'.
118 // Ex: KeyCol = 'noPred' -- key instruction is non predicated
118 // Ex: KeyCol = 'noPred' -- key instruction is non-predicated
119119 KeyCol = MapRec->getValueAsListInit("KeyCol");
120120
121121 // List of values for the fields/attributes listed in 'ColFields', one for