llvm.org GIT mirror llvm / 061b8c3
Move all of the hexagon subtarget dependent variables from the target machine to the subtarget. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211824 91177308-0d34-0410-b5e6-96231b3b80d8 Eric Christopher 6 years ago
4 changed file(s) with 46 addition(s) and 29 deletion(s). Raw diff Collapse all Expand all
4747 cl::Hidden, cl::ZeroOrMore, cl::init(false),
4848 cl::desc("Generate non-chopped conversion from fp to int."));
4949
50 HexagonSubtarget::HexagonSubtarget(StringRef TT, StringRef CPU, StringRef FS):
51 HexagonGenSubtargetInfo(TT, CPU, FS),
52 CPUString(CPU.str()) {
53
50 HexagonSubtarget &
51 HexagonSubtarget::initializeSubtargetDependencies(StringRef CPU, StringRef FS) {
5452 // If the programmer has not specified a Hexagon version, default to -mv4.
5553 if (CPUString.empty())
5654 CPUString = "hexagonv4";
6967 }
7068
7169 ParseSubtargetFeatures(CPUString, FS);
70 return *this;
71 }
72
73 HexagonSubtarget::HexagonSubtarget(StringRef TT, StringRef CPU, StringRef FS,
74 const TargetMachine &TM)
75 : HexagonGenSubtargetInfo(TT, CPU, FS), CPUString(CPU.str()),
76 DL("e-m:e-p:32:32-i1:32-i64:64-a:0-n32"),
77 InstrInfo(initializeSubtargetDependencies(CPU, FS)), TLInfo(TM),
78 TSInfo(DL), FrameLowering() {
7279
7380 // Initialize scheduling itinerary for the specified CPU.
7481 InstrItins = getInstrItineraryForCPU(CPUString);
1313 #ifndef Hexagon_SUBTARGET_H
1414 #define Hexagon_SUBTARGET_H
1515
16 #include "HexagonFrameLowering.h"
17 #include "HexagonInstrInfo.h"
18 #include "HexagonISelLowering.h"
19 #include "HexagonSelectionDAGInfo.h"
20 #include "llvm/IR/DataLayout.h"
1621 #include "llvm/Target/TargetMachine.h"
1722 #include "llvm/Target/TargetSubtargetInfo.h"
1823 #include
2732
2833 class HexagonSubtarget : public HexagonGenSubtargetInfo {
2934 virtual void anchor();
35
3036 bool UseMemOps;
3137 bool ModeIEEERndNear;
3238
3642 };
3743
3844 HexagonArchEnum HexagonArchVersion;
45 private:
3946 std::string CPUString;
47 const DataLayout DL; // Calculates type size & alignment.
48 HexagonInstrInfo InstrInfo;
49 HexagonTargetLowering TLInfo;
50 HexagonSelectionDAGInfo TSInfo;
51 HexagonFrameLowering FrameLowering;
4052 InstrItineraryData InstrItins;
4153
4254 public:
43 HexagonSubtarget(StringRef TT, StringRef CPU, StringRef FS);
55 HexagonSubtarget(StringRef TT, StringRef CPU, StringRef FS,
56 const TargetMachine &TM);
4457
4558 /// getInstrItins - Return the instruction itineraies based on subtarget
4659 /// selection.
4760 const InstrItineraryData &getInstrItineraryData() const { return InstrItins; }
61 const HexagonInstrInfo *getInstrInfo() const { return &InstrInfo; }
62 const HexagonRegisterInfo *getRegisterInfo() const {
63 return &InstrInfo.getRegisterInfo();
64 }
65 const HexagonTargetLowering *getTargetLowering() const { return &TLInfo; }
66 const HexagonFrameLowering *getFrameLowering() const {
67 return &FrameLowering;
68 }
69 const HexagonSelectionDAGInfo *getSelectionDAGInfo() const { return &TSInfo; }
70 const DataLayout *getDataLayout() const { return &DL; }
4871
72 HexagonSubtarget &initializeSubtargetDependencies(StringRef CPU,
73 StringRef FS);
4974
5075 /// ParseSubtargetFeatures - Parses features string setting specified
5176 /// subtarget options. Definition of function is auto generated by tblgen.
6969 Reloc::Model RM, CodeModel::Model CM,
7070 CodeGenOpt::Level OL)
7171 : LLVMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL),
72 DL("e-m:e-p:32:32-i1:32-i64:64-a:0-n32"), Subtarget(TT, CPU, FS),
73 InstrInfo(Subtarget), TLInfo(*this), TSInfo(DL),
74 FrameLowering() {
72 Subtarget(TT, CPU, FS, *this) {
7573 initAsmInfo();
7674 }
7775
1313 #ifndef HexagonTARGETMACHINE_H
1414 #define HexagonTARGETMACHINE_H
1515
16 #include "HexagonFrameLowering.h"
17 #include "HexagonISelLowering.h"
1816 #include "HexagonInstrInfo.h"
19 #include "HexagonSelectionDAGInfo.h"
2017 #include "HexagonSubtarget.h"
21 #include "llvm/IR/DataLayout.h"
2218 #include "llvm/Target/TargetMachine.h"
2319
2420 namespace llvm {
2622 class Module;
2723
2824 class HexagonTargetMachine : public LLVMTargetMachine {
29 const DataLayout DL; // Calculates type size & alignment.
3025 HexagonSubtarget Subtarget;
31 HexagonInstrInfo InstrInfo;
32 HexagonTargetLowering TLInfo;
33 HexagonSelectionDAGInfo TSInfo;
34 HexagonFrameLowering FrameLowering;
3526
3627 public:
3728 HexagonTargetMachine(const Target &T, StringRef TT,StringRef CPU,
4031 CodeGenOpt::Level OL);
4132
4233 const HexagonInstrInfo *getInstrInfo() const override {
43 return &InstrInfo;
34 return getSubtargetImpl()->getInstrInfo();
4435 }
4536 const HexagonSubtarget *getSubtargetImpl() const override {
4637 return &Subtarget;
4738 }
4839 const HexagonRegisterInfo *getRegisterInfo() const override {
49 return &InstrInfo.getRegisterInfo();
40 return getSubtargetImpl()->getRegisterInfo();
5041 }
51
5242 const InstrItineraryData* getInstrItineraryData() const override {
5343 return &getSubtargetImpl()->getInstrItineraryData();
5444 }
55
56
5745 const HexagonTargetLowering* getTargetLowering() const override {
58 return &TLInfo;
46 return getSubtargetImpl()->getTargetLowering();
5947 }
60
6148 const HexagonFrameLowering* getFrameLowering() const override {
62 return &FrameLowering;
49 return getSubtargetImpl()->getFrameLowering();
6350 }
64
6551 const HexagonSelectionDAGInfo* getSelectionDAGInfo() const override {
66 return &TSInfo;
52 return getSubtargetImpl()->getSelectionDAGInfo();
6753 }
68
69 const DataLayout *getDataLayout() const override { return &DL; }
54 const DataLayout *getDataLayout() const override {
55 return getSubtargetImpl()->getDataLayout();
56 }
7057 static unsigned getModuleMatchQuality(const Module &M);
7158
7259 TargetPassConfig *createPassConfig(PassManagerBase &PM) override;