llvm.org GIT mirror llvm / 0416bc1
Merge in r168765 (BBVectorize bug fix) git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_32@168839 91177308-0d34-0410-b5e6-96231b3b80d8 Hal Finkel 6 years ago
2 changed file(s) with 25 addition(s) and 0 deletion(s). Raw diff Collapse all Expand all
29022902 K->mutateType(getVecTypeForPair(L->getType(), H->getType()));
29032903
29042904 combineMetadata(K, H);
2905 K->intersectOptionalDataWith(H);
29052906
29062907 for (unsigned o = 0; o < NumOperands; ++o)
29072908 K->setOperand(o, ReplacedOperands[o]);
172172 ; CHECK: ret double %R
173173 }
174174
175 ; Basic depth-3 chain (subclass data)
176 define i64 @test8(i64 %A1, i64 %A2, i64 %B1, i64 %B2) {
177 ; CHECK: @test8
178 ; CHECK: %X1.v.i1.1 = insertelement <2 x i64> undef, i64 %B1, i32 0
179 ; CHECK: %X1.v.i1.2 = insertelement <2 x i64> %X1.v.i1.1, i64 %B2, i32 1
180 ; CHECK: %X1.v.i0.1 = insertelement <2 x i64> undef, i64 %A1, i32 0
181 ; CHECK: %X1.v.i0.2 = insertelement <2 x i64> %X1.v.i0.1, i64 %A2, i32 1
182 %X1 = sub nsw i64 %A1, %B1
183 %X2 = sub i64 %A2, %B2
184 ; CHECK: %X1 = sub <2 x i64> %X1.v.i0.2, %X1.v.i1.2
185 %Y1 = mul i64 %X1, %A1
186 %Y2 = mul i64 %X2, %A2
187 ; CHECK: %Y1 = mul <2 x i64> %X1, %X1.v.i0.2
188 %Z1 = add i64 %Y1, %B1
189 %Z2 = add i64 %Y2, %B2
190 ; CHECK: %Z1 = add <2 x i64> %Y1, %X1.v.i1.2
191 %R = mul i64 %Z1, %Z2
192 ; CHECK: %Z1.v.r1 = extractelement <2 x i64> %Z1, i32 0
193 ; CHECK: %Z1.v.r2 = extractelement <2 x i64> %Z1, i32 1
194 ; CHECK: %R = mul i64 %Z1.v.r1, %Z1.v.r2
195 ret i64 %R
196 ; CHECK: ret i64 %R
197 }
198