llvm.org GIT mirror llvm / 04011e8
Fix the fde encoding used by mips to match gas. This finally fixes the encoding. The patch also * Removes eh-frame.ll. It was an unnecessary .ll to .o test that was checking the wrong value. * Merge fde-reloc.s and eh-frame.s into a single test, since the only difference was the run lines. * Don't blindly test the content of the entire .eh_frame section. It makes it hard to anyone actually fixing a bug and hitting a difference in a binary blob. Instead, use a CHECK for each field and document what is being checked. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178615 91177308-0d34-0410-b5e6-96231b3b80d8 Rafael Espindola 7 years ago
4 changed file(s) with 164 addition(s) and 113 deletion(s). Raw diff Collapse all Expand all
222222 }
223223
224224 void MCObjectFileInfo::InitELFMCObjectFileInfo(Triple T) {
225 if (T.getArch() != Triple::mips &&
226 T.getArch() != Triple::mipsel &&
227 T.getArch() != Triple::mips64 &&
228 T.getArch() != Triple::mips64el )
225 if (T.getArch() == Triple::mips ||
226 T.getArch() == Triple::mipsel)
227 FDECFIEncoding = dwarf::DW_EH_PE_sdata4;
228 else if (T.getArch() == Triple::mips64 ||
229 T.getArch() == Triple::mips64el)
230 FDECFIEncoding = dwarf::DW_EH_PE_sdata8;
231 else
229232 FDECFIEncoding = dwarf::DW_EH_PE_pcrel | dwarf::DW_EH_PE_sdata4;
230233
231234 if (T.getArch() == Triple::x86) {
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test/MC/Mips/eh-frame.ll less more
None ; This tests .eh_frame CIE descriptor for the.
1 ; Data alignment factor
2
3 ; RUN: llc -filetype=obj -mcpu=mips64r2 -mattr=n64 -march=mips64el %s -o - \
4 ; RUN: | llvm-objdump -s - | FileCheck %s
5
6 ; N64
7 ; CHECK: Contents of section .eh_frame:
8 ; CHECK-NEXT: 0000 1c000000 00000000 017a504c 52000178 .........zPLR..x
9 ; CHECK-NEXT: 0010 1f0b0000 00000000 00000000 000c1d00 ................
10 ; CHECK-NEXT: 0020 2c000000 24000000 00000000 00000000 ,...$...........
11 ; CHECK-NEXT: 0030 7c000000 00000000 08000000 00000000 |...............
12 ; CHECK-NEXT: 0040 00440e10 489f019c 02000000 00000000 .D..H...........
13
14 ; ModuleID = 'simple_throw.cpp'
15
16 @_ZTIi = external constant i8*
17 @str = private unnamed_addr constant [7 x i8] c"All ok\00"
18
19 define i32 @main() {
20 entry:
21 %exception.i = tail call i8* @__cxa_allocate_exception(i64 4) nounwind
22 %0 = bitcast i8* %exception.i to i32*
23 store i32 5, i32* %0, align 4
24 invoke void @__cxa_throw(i8* %exception.i, i8* bitcast (i8** @_ZTIi to i8*), i8* null) noreturn
25 to label %.noexc unwind label %return
26
27 .noexc: ; preds = %entry
28 unreachable
29
30 return: ; preds = %entry
31 %1 = landingpad { i8*, i32 } personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*)
32 catch i8* null
33 %2 = extractvalue { i8*, i32 } %1, 0
34 %3 = tail call i8* @__cxa_begin_catch(i8* %2) nounwind
35 %puts = tail call i32 @puts(i8* getelementptr inbounds ([7 x i8]* @str, i64 0, i64 0))
36 tail call void @__cxa_end_catch()
37 ret i32 0
38 }
39
40 declare i32 @__gxx_personality_v0(...)
41
42 declare i8* @__cxa_begin_catch(i8*)
43
44 declare void @__cxa_end_catch()
45
46 declare i8* @__cxa_allocate_exception(i64)
47
48 declare void @__cxa_throw(i8*, i8*, i8*)
49
50 declare i32 @puts(i8* nocapture) nounwind
51
None // Assembler generated object test.
1 // This tests .eh_frame descriptors minimally.
0 // Test the bits of .eh_frame on mips that are already implemented correctly.
21
3 // What we really need is a prettyprinter output check not unlike what
4 // gnu's readobj generates instead of checking the bits for .eh_frame.
2 // FIXME: This test would be a lot cleaner if llvm-objdump had the
3 // --dwarf=frames option.
54
6 // RUN: llvm-mc -filetype=obj -mcpu=mips32r2 -triple mipsel-unknown-linux -arch=mipsel %s -o - \
7 // RUN: | llvm-objdump -s - | FileCheck -check-prefix=CHECK-LEO32 %s
5 // RUN: llvm-mc -filetype=obj %s -o %t.o -arch=mips
6 // RUN: llvm-objdump -r -s %t.o | FileCheck --check-prefix=MIPS32 %s
87
9 // RUN: llvm-mc -filetype=obj -mcpu=mips32r2 -triple mips-unknown-linux -arch=mips %s -o - \
10 // RUN: | llvm-objdump -s - | FileCheck -check-prefix=CHECK-BEO32 %s
8 // RUN: llvm-mc -filetype=obj %s -o %t.o -arch=mipsel
9 // RUN: llvm-objdump -r -s %t.o | FileCheck --check-prefix=MIPS32EL %s
1110
12 // RUN: llvm-mc -filetype=obj -mcpu=mips64r2 -mattr=n64 -arch=mips64el %s -o - \
13 // RUN: | llvm-objdump -s - | FileCheck -check-prefix=CHECK-LE64 %s
11 // RUN: llvm-mc -filetype=obj %s -o %t.o -arch=mips64
12 // RUN: llvm-objdump -r -s %t.o | FileCheck --check-prefix=MIPS64 %s
1413
15 // RUN: llvm-mc -filetype=obj -mcpu=mips64r2 -mattr=n64 -arch=mips64 %s -o - \
16 // RUN: | llvm-objdump -s - | FileCheck -check-prefix=CHECK-BE64 %s
17
18 // O32 little endian
19 // CHECK-LEO32: Contents of section .eh_frame:
20 // CHECK-LEO32-NEXT: 0000 10000000 00000000 017a5200 017c1f01 .........zR..|..
21 // CHECK-LEO32-NEXT: 0010 000c1d00 10000000 18000000 00000000 ................
22 // CHECK-LEO32-NEXT: 0020 00000000 00000000 ........
23
24 // O32 big endian
25 // CHECK-BEO32: Contents of section .eh_frame:
26 // CHECK-BEO32-NEXT 0000 00000010 00000000 017a5200 017c1f01 .........zR..|..
27 // CHECK-BEO32-NEXT 0010 000c1d00 00000010 00000018 00000000 ................
28 // CHECK-BEO32-NEXT 0020 00000000 00000000 ........
29
30 // N64 little endian
31 // CHECK-LE64: Contents of section .eh_frame:
32 // CHECK-LE64-NEXT: 0000 10000000 00000000 017a5200 01781f01 .........zR..x..
33 // CHECK-LE64-NEXT: 0010 000c1d00 18000000 18000000 00000000 ................
34 // CHECK-LE64-NEXT: 0020 00000000 00000000 00000000 00000000 ................
35
36 // N64 big endian
37 // CHECK-BE64: Contents of section .eh_frame:
38 // CHECK-BE64-NEXT: 0000 00000010 00000000 017a5200 01781f01 .........zR..x..
39 // CHECK-BE64-NEXT: 0010 000c1d00 00000018 00000018 00000000 ................
40 // CHECK-BE64-NEXT: 0020 00000000 00000000 00000000 00000000 ................
14 // RUN: llvm-mc -filetype=obj %s -o %t.o -arch=mips64el
15 // RUN: llvm-objdump -r -s %t.o | FileCheck --check-prefix=MIPS64EL %s
4116
4217 func:
4318 .cfi_startproc
4419 .cfi_endproc
4520
21 // MIPS32: RELOCATION RECORDS FOR [.eh_frame]:
22 // MIPS32-NEXT: R_MIPS_32
23 // MIPS32: Contents of section .eh_frame:
24 // MIPS32-NEXT: 0000
25
26 // Length
27 // MIPS32: 00000010
28
29 // CIE ID
30 // MIPS32: 00000000
31
32 // Version
33 // MIPS32: 01
34
35 // Augmentation String
36 // MIPS32: 7a5200
37
38 // Code Alignment Factor
39 // MIPS32: 01
40
41 // Data Alignment Factor (-4)
42 // MIPS32: 7c
43
44 // Return Address Register
45 // MIPS32: 1f
46
47 // Augmentation Size
48 // MIPS32: 01
49
50 // MIPS32: .........zR..|..
51 // MIPS32-NEXT: 0010
52
53 // Augmentation (fde pointer encoding: DW_EH_PE_sdata4)
54 // MIPS32: 0b
55 // FIXME: The instructions are different from the ones produces by gas.
56
57 // MIPS32EL: RELOCATION RECORDS FOR [.eh_frame]:
58 // MIPS32EL-NEXT: R_MIPS_32
59 // MIPS32EL: Contents of section .eh_frame:
60 // MIPS32EL-NEXT: 0000
61
62 // Length
63 // MIPS32EL: 10000000
64
65 // CIE ID
66 // MIPS32EL: 00000000
67
68 // Version
69 // MIPS32EL: 01
70
71 // Augmentation String
72 // MIPS32EL: 7a5200
73
74 // Code Alignment Factor
75 // MIPS32EL: 01
76
77 // Data Alignment Factor (-4)
78 // MIPS32EL: 7c
79
80 // Return Address Register
81 // MIPS32EL: 1f
82
83 // Augmentation Size
84 // MIPS32EL: 01
85
86 // MIPS32EL: .........zR..|..
87 // MIPS32EL-NEXT: 0010
88
89 // Augmentation (fde pointer encoding: DW_EH_PE_sdata4)
90 // MIPS32EL: 0b
91 // FIXME: The instructions are different from the ones produces by gas.
92
93 // MIPS64: RELOCATION RECORDS FOR [.eh_frame]:
94 // MIPS64-NEXT: R_MIPS_64
95 // MIPS64: Contents of section .eh_frame:
96 // MIPS64-NEXT: 0000
97
98 // Length
99 // MIPS64: 00000010
100
101 // CIE ID
102 // MIPS64: 00000000
103
104 // Version
105 // MIPS64: 01
106
107 // Augmentation String
108 // MIPS64: 7a5200
109
110 // Code Alignment Factor
111 // MIPS64: 01
112
113 // Data Alignment Factor (-8). GAS uses -4. Should be ok as long as all
114 // offsets we need are a multiple of 8.
115 // MIPS64: 78
116
117 // Return Address Register
118 // MIPS64: 1f
119
120 // Augmentation Size
121 // MIPS64: 01
122
123 // MIPS64: .........zR..x..
124 // MIPS64-NEXT: 0010
125
126 // Augmentation (fde pointer encoding: DW_EH_PE_sdata8)
127 // MIPS64: 0c
128 // FIXME: The instructions are different from the ones produces by gas.
129
130
131 // MIPS64EL: RELOCATION RECORDS FOR [.eh_frame]:
132 // FIXME: llvm-objdump currently misprints the relocations for mips64el
133 // MIPS64EL: Contents of section .eh_frame:
134 // MIPS64EL-NEXT: 0000
135
136 // Length
137 // MIPS64EL: 10000000
138
139 // CIE ID
140 // MIPS64EL: 00000000
141
142 // Version
143 // MIPS64EL: 01
144
145 // Augmentation String
146 // MIPS64EL: 7a5200
147
148 // Code Alignment Factor
149 // MIPS64EL: 01
150
151 // Data Alignment Factor (-8). GAS uses -4. Should be ok as long as all
152 // offsets we need are a multiple of 8.
153 // MIPS64EL: 78
154
155 // Return Address Register
156 // MIPS64EL: 1f
157
158 // Augmentation Size
159 // MIPS64EL: 01
160
161 // MIPS64EL: .........zR..x..
162 // MIPS64EL-NEXT: 0010
163
164 // Augmentation (fde pointer encoding: DW_EH_PE_sdata8)
165 // MIPS64EL: 0c
166 // FIXME: The instructions are different from the ones produces by gas.
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test/MC/Mips/fde-reloc.s less more
None // This just tests that a relocation of the specified type shows up as the first
1 // relocation in the relocation section for .eh_frame when produced by the
2 // assembler.
3
4 // RUN: llvm-mc -filetype=obj %s -o - -triple mips-unknown-unknown | \
5 // RUN: llvm-objdump -r - | FileCheck --check-prefix=MIPS32 %s
6
7 // RUN: llvm-mc -filetype=obj %s -o - -triple mips64-unknown-unknown | \
8 // RUN: llvm-objdump -r - | FileCheck --check-prefix=MIPS64 %s
9
10 // PR15448
11
12 func:
13 .cfi_startproc
14 .cfi_endproc
15
16 // MIPS32: RELOCATION RECORDS FOR [.eh_frame]:
17 // MIPS32-NEXT: R_MIPS_32
18
19 // MIPS64: RELOCATION RECORDS FOR [.eh_frame]:
20 // MIPS64-NEXT: R_MIPS_64