llvm.org GIT mirror llvm / 03ac7db
Refactor ARM subarchitecture parsing Re-commit of a patch to rework the triple parsing on ARM to a more sane model. Patch by Gabor Ballabas. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213367 91177308-0d34-0410-b5e6-96231b3b80d8 Renato Golin 5 years ago
3 changed file(s) with 120 addition(s) and 82 deletion(s). Raw diff Collapse all Expand all
7878 spir64, // SPIR: standard portable IR for OpenCL 64-bit version
7979 kalimba // Kalimba: generic kalimba
8080 };
81 enum SubArchType {
82 NoSubArch,
83
84 ARMSubArch_v8,
85 ARMSubArch_v7,
86 ARMSubArch_v7em,
87 ARMSubArch_v7m,
88 ARMSubArch_v7s,
89 ARMSubArch_v6,
90 ARMSubArch_v6m,
91 ARMSubArch_v6t2,
92 ARMSubArch_v5,
93 ARMSubArch_v5te,
94 ARMSubArch_v4t
95 };
8196 enum VendorType {
8297 UnknownVendor,
8398
150165 /// The parsed arch type.
151166 ArchType Arch;
152167
168 /// The parsed subarchitecture type.
169 SubArchType SubArch;
170
153171 /// The parsed vendor type.
154172 VendorType Vendor;
155173
191209
192210 /// getArch - Get the parsed architecture type of this triple.
193211 ArchType getArch() const { return Arch; }
212
213 /// getSubArch - get the parsed subarchitecture type for this triple.
214 SubArchType getSubArch() const { return SubArch; }
194215
195216 /// getVendor - Get the parsed vendor type of this triple.
196217 VendorType getVendor() const { return Vendor; }
356356 .Default(Triple::UnknownObjectFormat);
357357 }
358358
359 static Triple::SubArchType parseSubArch(StringRef SubArchName) {
360 return StringSwitch(SubArchName)
361 .EndsWith("v8", Triple::ARMSubArch_v8)
362 .EndsWith("v8a", Triple::ARMSubArch_v8)
363 .EndsWith("v7", Triple::ARMSubArch_v7)
364 .EndsWith("v7a", Triple::ARMSubArch_v7)
365 .EndsWith("v7em", Triple::ARMSubArch_v7em)
366 .EndsWith("v7l", Triple::ARMSubArch_v7)
367 .EndsWith("v7m", Triple::ARMSubArch_v7m)
368 .EndsWith("v7r", Triple::ARMSubArch_v7)
369 .EndsWith("v7s", Triple::ARMSubArch_v7s)
370 .EndsWith("v6", Triple::ARMSubArch_v6)
371 .EndsWith("v6m", Triple::ARMSubArch_v6m)
372 .EndsWith("v6t2", Triple::ARMSubArch_v6t2)
373 .EndsWith("v5", Triple::ARMSubArch_v5)
374 .EndsWith("v5e", Triple::ARMSubArch_v5)
375 .EndsWith("v5t", Triple::ARMSubArch_v5)
376 .EndsWith("v5te", Triple::ARMSubArch_v5te)
377 .EndsWith("v4t", Triple::ARMSubArch_v4t)
378 .Default(Triple::NoSubArch);
379 }
380
359381 static const char *getObjectFormatTypeName(Triple::ObjectFormatType Kind) {
360382 switch (Kind) {
361383 case Triple::UnknownObjectFormat: return "";
381403 Triple::Triple(const Twine &Str)
382404 : Data(Str.str()),
383405 Arch(parseArch(getArchName())),
406 SubArch(parseSubArch(getArchName())),
384407 Vendor(parseVendor(getVendorName())),
385408 OS(parseOS(getOSName())),
386409 Environment(parseEnvironment(getEnvironmentName())),
398421 Triple::Triple(const Twine &ArchStr, const Twine &VendorStr, const Twine &OSStr)
399422 : Data((ArchStr + Twine('-') + VendorStr + Twine('-') + OSStr).str()),
400423 Arch(parseArch(ArchStr.str())),
424 SubArch(parseSubArch(ArchStr.str())),
401425 Vendor(parseVendor(VendorStr.str())),
402426 OS(parseOS(OSStr.str())),
403427 Environment(), ObjectFormat(Triple::UnknownObjectFormat) {
414438 : Data((ArchStr + Twine('-') + VendorStr + Twine('-') + OSStr + Twine('-') +
415439 EnvironmentStr).str()),
416440 Arch(parseArch(ArchStr.str())),
441 SubArch(parseSubArch(ArchStr.str())),
417442 Vendor(parseVendor(VendorStr.str())),
418443 OS(parseOS(OSStr.str())),
419444 Environment(parseEnvironment(EnvironmentStr.str())),
8383 std::string ARM_MC::ParseARMTriple(StringRef TT, StringRef CPU) {
8484 Triple triple(TT);
8585
86 // Set the boolean corresponding to the current target triple, or the default
87 // if one cannot be determined, to true.
88 unsigned Len = TT.size();
89 unsigned Idx = 0;
90
91 // FIXME: Enhance Triple helper class to extract ARM version.
9286 bool isThumb = triple.getArch() == Triple::thumb ||
9387 triple.getArch() == Triple::thumbeb;
94 if (Len >= 5 && TT.substr(0, 4) == "armv")
95 Idx = 4;
96 else if (Len >= 7 && TT.substr(0, 6) == "armebv")
97 Idx = 6;
98 else if (Len >= 7 && TT.substr(0, 6) == "thumbv")
99 Idx = 6;
100 else if (Len >= 9 && TT.substr(0, 8) == "thumbebv")
101 Idx = 8;
10288
10389 bool NoCPU = CPU == "generic" || CPU.empty();
10490 std::string ARMArchFeature;
105 if (Idx) {
106 unsigned SubVer = TT[Idx];
107 if (SubVer == '8') {
108 if (NoCPU)
109 // v8a: FeatureDB, FeatureFPARMv8, FeatureNEON, FeatureDSPThumb2,
110 // FeatureMP, FeatureHWDiv, FeatureHWDivARM, FeatureTrustZone,
111 // FeatureT2XtPk, FeatureCrypto, FeatureCRC
112 ARMArchFeature = "+v8,+db,+fp-armv8,+neon,+t2dsp,+mp,+hwdiv,+hwdiv-arm,"
113 "+trustzone,+t2xtpk,+crypto,+crc";
114 else
115 // Use CPU to figure out the exact features
116 ARMArchFeature = "+v8";
117 } else if (SubVer == '7') {
118 if (Len >= Idx+2 && TT[Idx+1] == 'm') {
119 isThumb = true;
120 if (NoCPU)
121 // v7m: FeatureNoARM, FeatureDB, FeatureHWDiv, FeatureMClass
122 ARMArchFeature = "+v7,+noarm,+db,+hwdiv,+mclass";
123 else
124 // Use CPU to figure out the exact features.
125 ARMArchFeature = "+v7";
126 } else if (Len >= Idx+3 && TT[Idx+1] == 'e'&& TT[Idx+2] == 'm') {
127 if (NoCPU)
128 // v7em: FeatureNoARM, FeatureDB, FeatureHWDiv, FeatureDSPThumb2,
129 // FeatureT2XtPk, FeatureMClass
130 ARMArchFeature = "+v7,+noarm,+db,+hwdiv,+t2dsp,t2xtpk,+mclass";
131 else
132 // Use CPU to figure out the exact features.
133 ARMArchFeature = "+v7";
134 } else if (Len >= Idx+2 && TT[Idx+1] == 's') {
135 if (NoCPU)
136 // v7s: FeatureNEON, FeatureDB, FeatureDSPThumb2, FeatureHasRAS
137 // Swift
138 ARMArchFeature = "+v7,+swift,+neon,+db,+t2dsp,+ras";
139 else
140 // Use CPU to figure out the exact features.
141 ARMArchFeature = "+v7";
142 } else {
143 // v7 CPUs have lots of different feature sets. If no CPU is specified,
144 // then assume v7a (e.g. cortex-a8) feature set. Otherwise, return
145 // the "minimum" feature set and use CPU string to figure out the exact
146 // features.
147 if (NoCPU)
148 // v7a: FeatureNEON, FeatureDB, FeatureDSPThumb2, FeatureT2XtPk
149 ARMArchFeature = "+v7,+neon,+db,+t2dsp,+t2xtpk";
150 else
151 // Use CPU to figure out the exact features.
152 ARMArchFeature = "+v7";
153 }
154 } else if (SubVer == '6') {
155 if (Len >= Idx+3 && TT[Idx+1] == 't' && TT[Idx+2] == '2')
156 ARMArchFeature = "+v6t2";
157 else if (Len >= Idx+2 && TT[Idx+1] == 'm') {
158 isThumb = true;
159 if (NoCPU)
160 // v6m: FeatureNoARM, FeatureMClass
161 ARMArchFeature = "+v6m,+noarm,+mclass";
162 else
163 ARMArchFeature = "+v6";
164 } else
165 ARMArchFeature = "+v6";
166 } else if (SubVer == '5') {
167 if (Len >= Idx+3 && TT[Idx+1] == 't' && TT[Idx+2] == 'e')
168 ARMArchFeature = "+v5te";
169 else
170 ARMArchFeature = "+v5t";
171 } else if (SubVer == '4' && Len >= Idx+2 && TT[Idx+1] == 't')
172 ARMArchFeature = "+v4t";
91 switch (triple.getSubArch()) {
92 case Triple::ARMSubArch_v8:
93 if (NoCPU)
94 // v8a: FeatureDB, FeatureFPARMv8, FeatureNEON, FeatureDSPThumb2,
95 // FeatureMP, FeatureHWDiv, FeatureHWDivARM, FeatureTrustZone,
96 // FeatureT2XtPk, FeatureCrypto, FeatureCRC
97 ARMArchFeature = "+v8,+db,+fp-armv8,+neon,+t2dsp,+mp,+hwdiv,+hwdiv-arm,"
98 "+trustzone,+t2xtpk,+crypto,+crc";
99 else
100 // Use CPU to figure out the exact features
101 ARMArchFeature = "+v8";
102 break;
103 case Triple::ARMSubArch_v7m:
104 isThumb = true;
105 if (NoCPU)
106 // v7m: FeatureNoARM, FeatureDB, FeatureHWDiv, FeatureMClass
107 ARMArchFeature = "+v7,+noarm,+db,+hwdiv,+mclass";
108 else
109 // Use CPU to figure out the exact features.
110 ARMArchFeature = "+v7";
111 break;
112 case Triple::ARMSubArch_v7em:
113 if (NoCPU)
114 // v7em: FeatureNoARM, FeatureDB, FeatureHWDiv, FeatureDSPThumb2,
115 // FeatureT2XtPk, FeatureMClass
116 ARMArchFeature = "+v7,+noarm,+db,+hwdiv,+t2dsp,t2xtpk,+mclass";
117 else
118 // Use CPU to figure out the exact features.
119 ARMArchFeature = "+v7";
120 break;
121 case Triple::ARMSubArch_v7s:
122 if (NoCPU)
123 // v7s: FeatureNEON, FeatureDB, FeatureDSPThumb2, FeatureHasRAS
124 // Swift
125 ARMArchFeature = "+v7,+swift,+neon,+db,+t2dsp,+ras";
126 else
127 // Use CPU to figure out the exact features.
128 ARMArchFeature = "+v7";
129 break;
130 case Triple::ARMSubArch_v7:
131 // v7 CPUs have lots of different feature sets. If no CPU is specified,
132 // then assume v7a (e.g. cortex-a8) feature set. Otherwise, return
133 // the "minimum" feature set and use CPU string to figure out the exact
134 // features.
135 if (NoCPU)
136 // v7a: FeatureNEON, FeatureDB, FeatureDSPThumb2, FeatureT2XtPk
137 ARMArchFeature = "+v7,+neon,+db,+t2dsp,+t2xtpk";
138 else
139 // Use CPU to figure out the exact features.
140 ARMArchFeature = "+v7";
141 break;
142 case Triple::ARMSubArch_v6t2:
143 ARMArchFeature = "+v6t2";
144 break;
145 case Triple::ARMSubArch_v6m:
146 isThumb = true;
147 if (NoCPU)
148 // v6m: FeatureNoARM, FeatureMClass
149 ARMArchFeature = "+v6m,+noarm,+mclass";
150 else
151 ARMArchFeature = "+v6";
152 break;
153 case Triple::ARMSubArch_v6:
154 ARMArchFeature = "+v6";
155 break;
156 case Triple::ARMSubArch_v5te:
157 ARMArchFeature = "+v5te";
158 break;
159 case Triple::ARMSubArch_v5:
160 ARMArchFeature = "+v5t";
161 break;
162 case Triple::ARMSubArch_v4t:
163 ARMArchFeature = "+v4t";
164 break;
173165 }
174166
175167 if (isThumb) {