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[X86] movdiri and movdir64b instructions Reviewers: spatel, craig.topper, RKSimon Reviewed By: craig.topper, RKSimon Differential Revision: https://reviews.llvm.org/D45983 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@331248 91177308-0d34-0410-b5e6-96231b3b80d8 Gabor Buella 2 years ago
16 changed file(s) with 211 addition(s) and 2 deletion(s). Raw diff Collapse all Expand all
64126412 def int_x86_tpause : GCCBuiltin<"__builtin_ia32_tpause">,
64136413 Intrinsic<[llvm_i8_ty], [llvm_i32_ty, llvm_i32_ty, llvm_i32_ty], []>;
64146414 }
6415
6416 //===----------------------------------------------------------------------===//
6417 // Direct Move Instructions
6418
6419 let TargetPrefix = "x86" in {
6420 def int_x86_directstore32 : GCCBuiltin<"__builtin_ia32_directstore_u32">,
6421 Intrinsic<[], [llvm_ptr_ty, llvm_i32_ty], []>;
6422 def int_x86_directstore64 : GCCBuiltin<"__builtin_ia32_directstore_u64">,
6423 Intrinsic<[], [llvm_ptr_ty, llvm_i64_ty], []>;
6424 def int_x86_movdir64b : GCCBuiltin<"__builtin_ia32_movdir64b">,
6425 Intrinsic<[], [llvm_ptr_ty, llvm_ptr_ty], []>;
6426 }
12601260 Features["avx512vpopcntdq"] = HasLeaf7 && ((ECX >> 14) & 1) && HasAVX512Save;
12611261 Features["rdpid"] = HasLeaf7 && ((ECX >> 22) & 1);
12621262 Features["cldemote"] = HasLeaf7 && ((ECX >> 25) & 1);
1263 Features["movdiri"] = HasLeaf7 && ((ECX >> 27) & 1);
1264 Features["movdir64b"] = HasLeaf7 && ((ECX >> 28) & 1);
12631265
12641266 Features["ibt"] = HasLeaf7 && ((EDX >> 20) & 1);
12651267
10561056 }
10571057
10581058 /*
1059 * Absolute moves and umonitor need special handling.
1059 * Absolute moves, umonitor, and movdir64b need special handling.
10601060 * -For 16-bit mode because the meaning of the AdSize and OpSize prefixes are
10611061 * inverted w.r.t.
10621062 * -For 32-bit mode we need to ensure the ADSIZE prefix is observed in
10631063 * any position.
10641064 */
10651065 if ((insn->opcodeType == ONEBYTE && ((insn->opcode & 0xFC) == 0xA0)) ||
1066 (insn->opcodeType == TWOBYTE && (insn->opcode == 0xAE))) {
1066 (insn->opcodeType == TWOBYTE && (insn->opcode == 0xAE)) ||
1067 (insn->opcodeType == THREEBYTE_38 && insn->opcode == 0xF8)) {
10671068 /* Make sure we observed the prefixes in any position. */
10681069 if (insn->hasAdSize)
10691070 attrMask |= ATTR_ADSIZE;
10731074 /* In 16-bit, invert the attributes. */
10741075 if (insn->mode == MODE_16BIT) {
10751076 attrMask ^= ATTR_ADSIZE;
1077
10761078 /* The OpSize attribute is only valid with the absolute moves. */
10771079 if (insn->opcodeType == ONEBYTE && ((insn->opcode & 0xFC) == 0xA0))
10781080 attrMask ^= ATTR_OPSIZE;
378378 "Enable retpoline, but with an externally provided thunk.",
379379 [FeatureRetpoline]>;
380380
381 // Direct Move instructions.
382 def FeatureMOVDIRI : SubtargetFeature<"movdiri", "HasMOVDIRI", "true",
383 "Support movdiri instruction">;
384 def FeatureMOVDIR64B : SubtargetFeature<"movdir64b", "HasMOVDIR64B", "true",
385 "Support movdir64b instruction">;
386
381387 //===----------------------------------------------------------------------===//
382388 // Register File Description
383389 //===----------------------------------------------------------------------===//
628634 ProcIntelTRM,
629635 FeatureCLDEMOTE,
630636 FeatureGFNI,
637 FeatureMOVDIRI,
638 FeatureMOVDIR64B,
631639 FeatureRDPID,
632640 FeatureSGX,
633641 FeatureWAITPKG
890890 def HasMWAITX : Predicate<"Subtarget->hasMWAITX()">;
891891 def HasCLZERO : Predicate<"Subtarget->hasCLZERO()">;
892892 def HasCLDEMOTE : Predicate<"Subtarget->hasCLDEMOTE()">;
893 def HasMOVDIRI : Predicate<"Subtarget->hasMOVDIRI()">;
894 def HasMOVDIR64B : Predicate<"Subtarget->hasMOVDIR64B()">;
893895 def FPStackf32 : Predicate<"!Subtarget->hasSSE1()">;
894896 def FPStackf64 : Predicate<"!Subtarget->hasSSE2()">;
895897 def HasMPX : Predicate<"Subtarget->hasMPX()">;
26732675 } // SchedRW
26742676
26752677 //===----------------------------------------------------------------------===//
2678 // MOVDIRI - Move doubleword/quadword as direct store
2679 //
2680 let SchedRW = [WriteStore] in {
2681 def MOVDIRI32 : I<0xF9, MRMDestMem, (outs), (ins i32mem:$dst, GR32:$src),
2682 "movdiri\t{$src, $dst|$dst, $src}",
2683 [(int_x86_directstore32 addr:$dst, GR32:$src)]>,
2684 T8, Requires<[HasMOVDIRI]>;
2685 def MOVDIRI64 : RI<0xF9, MRMDestMem, (outs), (ins i64mem:$dst, GR64:$src),
2686 "movdiri\t{$src, $dst|$dst, $src}",
2687 [(int_x86_directstore64 addr:$dst, GR64:$src)]>,
2688 T8, Requires<[In64BitMode, HasMOVDIRI]>;
2689 } // SchedRW
2690
2691 //===----------------------------------------------------------------------===//
2692 // MOVDIR64B - Move 64 bytes as direct store
2693 //
2694 let SchedRW = [WriteStore] in {
2695 def MOVDIR64B16 : I<0xF8, MRMSrcMem, (outs), (ins GR16:$dst, i512mem:$src),
2696 "movdir64b\t{$src, $dst|$dst, $src}", []>,
2697 T8PD, AdSize16, Requires<[HasMOVDIR64B, Not64BitMode]>;
2698 def MOVDIR64B32 : I<0xF8, MRMSrcMem, (outs), (ins GR32:$dst, i512mem:$src),
2699 "movdir64b\t{$src, $dst|$dst, $src}",
2700 [(int_x86_movdir64b GR32:$dst, addr:$src)]>,
2701 T8PD, AdSize32, Requires<[HasMOVDIR64B]>;
2702 def MOVDIR64B64 : I<0xF8, MRMSrcMem, (outs), (ins GR64:$dst, i512mem:$src),
2703 "movdir64b\t{$src, $dst|$dst, $src}",
2704 [(int_x86_movdir64b GR64:$dst, addr:$src)]>,
2705 T8PD, AdSize64, Requires<[HasMOVDIR64B, In64BitMode]>;
2706 } // SchedRW
2707
2708 //===----------------------------------------------------------------------===//
26762709 // CLZERO Instruction
26772710 //
26782711 let SchedRW = [WriteSystem] in {
316316 HasMWAITX = false;
317317 HasCLZERO = false;
318318 HasCLDEMOTE = false;
319 HasMOVDIRI = false;
320 HasMOVDIR64B = false;
319321 HasMPX = false;
320322 HasSHSTK = false;
321323 HasIBT = false;
207207
208208 /// Processor has Cache Line Demote instruction
209209 bool HasCLDEMOTE;
210
211 /// Processor has MOVDIRI instruction (direct store integer).
212 bool HasMOVDIRI;
213
214 /// Processor has MOVDIR64B instruction (direct store 64 bytes).
215 bool HasMOVDIR64B;
210216
211217 /// Processor has Prefetch with intent to Write instruction
212218 bool HasPREFETCHWT1;
581587 bool hasMWAITX() const { return HasMWAITX; }
582588 bool hasCLZERO() const { return HasCLZERO; }
583589 bool hasCLDEMOTE() const { return HasCLDEMOTE; }
590 bool hasMOVDIRI() const { return HasMOVDIRI; }
591 bool hasMOVDIR64B() const { return HasMOVDIR64B; }
584592 bool isSHLDSlow() const { return IsSHLDSlow; }
585593 bool isPMULLDSlow() const { return IsPMULLDSlow; }
586594 bool isUnalignedMem16Slow() const { return IsUAMem16Slow; }
0 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
1 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+movdiri -mattr=+movdir64b | FileCheck %s --check-prefix=X64
2 ; RUN: llc < %s -mtriple=i386-unknown-unknown -mattr=+movdiri -mattr=+movdir64b | FileCheck %s --check-prefix=X32
3
4 define void @test_movdiri(i8* %p, i32 %v) {
5 ; X64-LABEL: test_movdiri:
6 ; X64: # %bb.0: # %entry
7 ; X64-NEXT: movdiri %esi, (%rdi)
8 ; X64-NEXT: retq
9 ;
10 ; X32-LABEL: test_movdiri:
11 ; X32: # %bb.0: # %entry
12 ; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
13 ; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
14 ; X32-NEXT: movdiri %eax, (%ecx)
15 ; X32-NEXT: retl
16 entry:
17 call void @llvm.x86.directstore32(i8* %p, i32 %v)
18 ret void
19 }
20
21 declare void @llvm.x86.directstore32(i8*, i32)
22
23 define void @test_movdir64b(i8* %dst, i8* %src) {
24 ; X64-LABEL: test_movdir64b:
25 ; X64: # %bb.0: # %entry
26 ; X64-NEXT: movdir64b (%rsi), %rdi
27 ; X64-NEXT: retq
28 ;
29 ; X32-LABEL: test_movdir64b:
30 ; X32: # %bb.0: # %entry
31 ; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
32 ; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
33 ; X32-NEXT: movdir64b (%eax), %ecx
34 ; X32-NEXT: retl
35 entry:
36 call void @llvm.x86.movdir64b(i8* %dst, i8* %src)
37 ret void
38 }
39
40 declare void @llvm.x86.movdir64b(i8*, i8*)
0 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
1 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+movdiri | FileCheck %s
2
3 define void @test_movdiri(i8* %p, i64 %v) {
4 ; CHECK-LABEL: test_movdiri:
5 ; CHECK: # %bb.0: # %entry
6 ; CHECK-NEXT: movdiri %rsi, (%rdi)
7 ; CHECK-NEXT: retq
8 entry:
9 call void @llvm.x86.directstore64(i8* %p, i64 %v)
10 ret void
11 }
12
13 declare void @llvm.x86.directstore64(i8*, i64)
799799
800800 # CHECK: umonitor %eax
801801 0x67 0xf3 0x0f 0xae 0xf0
802
803 #CHECK: movdir64b (%esi), %eax
804 0x67 0x66 0x0f 0x38 0xf8 0x06
805
806 #CHECK: movdir64b (%si), %ax
807 0x66 0x0f 0x38 0xf8 0x04
858858
859859 # CHECK: tpause %eax
860860 0x66 0x0f 0xae 0xf0
861
862 #CHECK: movdiri %eax, 64(%edx,%edi)
863 0x0f 0x38 0xf9 0x44 0x3a 0x40
864
865 #CHECK: movdir64b 485498096, %ecx
866 0x66 0x0f 0x38 0xf8 0x0d 0xf0 0x1c 0xf0 0x1c
867
868 #CHECK: movdir64b (%esi), %eax
869 0x66 0x0f 0x38 0xf8 0x06
870
871 #CHECK: movdir64b (%si), %ax
872 0x67 0x66 0x0f 0x38 0xf8 0x04
554554
555555 # CHECK: bswapq %rbx
556556 0x48 0x0f 0xcb
557
558 #CHECK: movdiri %r13d, 64(%rdx,%rax,4)
559 0x44 0x0f 0x38 0xf9 0x6c 0x82 0x40
560
561 #CHECK: movdir64b 485498096, %rax
562 0x66 0x0f 0x38 0xf8 0x04 0x25 0xf0 0x1c 0xf0 0x1c
563
564 #CHECK: movdir64b 485498096, %eax
565 0x67 0x66 0x0f 0x38 0xf8 0x04 0x25 0xf0 0x1c 0xf0 0x1c
980980 // CHECK: umonitor %eax
981981 // CHECK: encoding: [0x67,0xf3,0x0f,0xae,0xf0]
982982 umonitor %eax
983
984 // CHECK: movdir64b (%esi), %eax
985 // CHECK: encoding: [0x67,0x66,0x0f,0x38,0xf8,0x06]
986 movdir64b (%esi), %eax
987
988 // CHECK: movdir64b (%si), %ax
989 // CHECK: encoding: [0x66,0x0f,0x38,0xf8,0x04]
990 movdir64b (%si), %ax
1076710767 // CHECK: tpause %eax
1076810768 // CHECK: encoding: [0x66,0x0f,0xae,0xf0]
1076910769 tpause %eax
10770
10771 // CHECK: movdiri %eax, 64(%edx,%edi)
10772 // CHECK: # encoding: [0x0f,0x38,0xf9,0x44,0x3a,0x40]
10773 movdiri %eax, 64(%edx,%edi)
10774
10775 // CHECK: movdir64b 485498096, %ecx
10776 // CHECK: # encoding: [0x66,0x0f,0x38,0xf8,0x0d,0xf0,0x1c,0xf0,0x1c]
10777 movdir64b 485498096, %ecx
10778
10779 // CHECK: movdir64b 485498096, %cx
10780 // CHECK: # encoding: [0x67,0x66,0x0f,0x38,0xf8,0x0d,0xf0,0x1c,0xf0,0x1c]
10781 movdir64b 485498096, %cx
10782
10783 // CHECK: movdir64b (%edx), %eax
10784 // CHECK: # encoding: [0x66,0x0f,0x38,0xf8,0x02]
10785 movdir64b (%edx), %eax
10786
10787 // CHECK: movdir64b (%esi), %eax
10788 // CHECK: # encoding: [0x66,0x0f,0x38,0xf8,0x06]
10789 movdir64b (%esi), %eax
10790
10791 // CHECK: movdir64b (%si), %ax
10792 // CHECK: # encoding: [0x67,0x66,0x0f,0x38,0xf8,0x04]
10793 movdir64b (%si), %ax
15941594 // CHECK: encoding: [0x66,0x0f,0xae,0xf3]
15951595 tpause %ebx
15961596
1597 // CHECK: movdiri %r15, 485498096
1598 // CHECK: # encoding: [0x4c,0x0f,0x38,0xf9,0x3c,0x25,0xf0,0x1c,0xf0,0x1c]
1599 movdiri %r15, 485498096
1600
1601 // CHECK: movdiri %r15, (%rdx)
1602 // CHECK: # encoding: [0x4c,0x0f,0x38,0xf9,0x3a]
1603 movdiri %r15, (%rdx)
1604
1605 // CHECK: movdiri %r15, 64(%rdx)
1606 // CHECK: # encoding: [0x4c,0x0f,0x38,0xf9,0x7a,0x40]
1607 movdiri %r15, 64(%rdx)
1608
1609 // CHECK: movdir64b 485498096, %rax
1610 // CHECK: # encoding: [0x66,0x0f,0x38,0xf8,0x04,0x25,0xf0,0x1c,0xf0,0x1c]
1611 movdir64b 485498096, %rax
1612
1613 // CHECK: movdir64b 485498096, %eax
1614 // CHECK: # encoding: [0x67,0x66,0x0f,0x38,0xf8,0x04,0x25,0xf0,0x1c,0xf0,0x1c]
1615 movdir64b 485498096, %eax
1616
1617 // CHECK: movdir64b (%rdx), %r15
1618 // CHECK: # encoding: [0x66,0x44,0x0f,0x38,0xf8,0x3a]
1619 movdir64b (%rdx), %r15
1620
15971621 // __asm __volatile(
15981622 // "pushf \n\t"
15991623 // "popf \n\t"
300300 insnContext = IC_64BIT_XD_OPSIZE;
301301 else if (OpSize == X86Local::OpSize16 && OpPrefix == X86Local::XS)
302302 insnContext = IC_64BIT_XS_OPSIZE;
303 else if (AdSize == X86Local::AdSize32 && OpPrefix == X86Local::PD)
304 insnContext = IC_64BIT_OPSIZE_ADSIZE;
303305 else if (OpSize == X86Local::OpSize16 && AdSize == X86Local::AdSize32)
304306 insnContext = IC_64BIT_OPSIZE_ADSIZE;
305307 else if (OpSize == X86Local::OpSize16 || OpPrefix == X86Local::PD)
327329 insnContext = IC_XD_ADSIZE;
328330 else if (AdSize == X86Local::AdSize16 && OpPrefix == X86Local::XS)
329331 insnContext = IC_XS_ADSIZE;
332 else if (AdSize == X86Local::AdSize16 && OpPrefix == X86Local::PD)
333 insnContext = IC_OPSIZE_ADSIZE;
330334 else if (OpSize == X86Local::OpSize16 && AdSize == X86Local::AdSize16)
331335 insnContext = IC_OPSIZE_ADSIZE;
332336 else if (OpSize == X86Local::OpSize16 || OpPrefix == X86Local::PD)