llvm.org GIT mirror llvm / 034f60e
Generalize ExpandIntToFP to handle the case where the operand is legal and it's the result that requires expansion. This code is a little confusing because the TargetLoweringInfo tables for [US]INT_TO_FP use the operand type (the integer type) rather than the result type. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48206 91177308-0d34-0410-b5e6-96231b3b80d8 Dan Gohman 12 years ago
5 changed file(s) with 54 addition(s) and 28 deletion(s). Raw diff Collapse all Expand all
53655365 SDOperand SelectionDAGLegalize::
53665366 ExpandIntToFP(bool isSigned, MVT::ValueType DestTy, SDOperand Source) {
53675367 MVT::ValueType SourceVT = Source.getValueType();
5368 assert(getTypeAction(SourceVT) == Expand &&
5369 "This is not an expansion!");
5368 bool ExpandSource = getTypeAction(SourceVT) == Expand;
53705369
53715370 if (!isSigned) {
53725371 // The integer value loaded will be incorrectly if the 'sign bit' of the
53735372 // incoming integer is set. To handle this, we dynamically test to see if
53745373 // it is set, and, if so, add a fudge factor.
5375 SDOperand Lo, Hi;
5376 ExpandOp(Source, Lo, Hi);
5374 SDOperand Hi;
5375 if (ExpandSource) {
5376 SDOperand Lo;
5377 ExpandOp(Source, Lo, Hi);
5378 Source = DAG.getNode(ISD::BUILD_PAIR, SourceVT, Lo, Hi);
5379 } else {
5380 // The comparison for the sign bit will use the entire operand.
5381 Hi = Source;
5382 }
53775383
53785384 // If this is unsigned, and not supported, first perform the conversion to
53795385 // signed, then adjust the result if the sign bit is set.
5380 SDOperand SignedConv = ExpandIntToFP(true, DestTy,
5381 DAG.getNode(ISD::BUILD_PAIR, SourceVT, Lo, Hi));
5386 SDOperand SignedConv = ExpandIntToFP(true, DestTy, Source);
53825387
53835388 SDOperand SignSet = DAG.getSetCC(TLI.getSetCCResultType(Hi), Hi,
53845389 DAG.getConstant(0, Hi.getValueType()),
54365441
54375442 // Expand the source, then glue it back together for the call. We must expand
54385443 // the source in case it is shared (this pass of legalize must traverse it).
5439 SDOperand SrcLo, SrcHi;
5440 ExpandOp(Source, SrcLo, SrcHi);
5441 Source = DAG.getNode(ISD::BUILD_PAIR, SourceVT, SrcLo, SrcHi);
5444 if (ExpandSource) {
5445 SDOperand SrcLo, SrcHi;
5446 ExpandOp(Source, SrcLo, SrcHi);
5447 Source = DAG.getNode(ISD::BUILD_PAIR, SourceVT, SrcLo, SrcHi);
5448 }
54425449
54435450 RTLIB::Libcall LC;
54445451 if (SourceVT == MVT::i64) {
54455452 if (DestTy == MVT::f32)
54465453 LC = RTLIB::SINTTOFP_I64_F32;
5454 else if (DestTy == MVT::f64)
5455 LC = RTLIB::SINTTOFP_I64_F64;
5456 else if (DestTy == MVT::f80)
5457 LC = RTLIB::SINTTOFP_I64_F80;
54475458 else {
5448 assert(DestTy == MVT::f64 && "Unknown fp value type!");
5449 LC = RTLIB::SINTTOFP_I64_F64;
5459 assert(DestTy == MVT::ppcf128 && "Unknown fp value type!");
5460 LC = RTLIB::SINTTOFP_I64_PPCF128;
54505461 }
54515462 } else if (SourceVT == MVT::i128) {
54525463 if (DestTy == MVT::f32)
23792379 }
23802380
23812381 SDOperand PPCTargetLowering::LowerSINT_TO_FP(SDOperand Op, SelectionDAG &DAG) {
2382 // Don't handle ppc_fp128 here; let it be lowered to a libcall.
2383 if (Op.getValueType() != MVT::f32 && Op.getValueType() != MVT::f64)
2384 return SDOperand();
2385
23822386 if (Op.getOperand(0).getValueType() == MVT::i64) {
23832387 SDOperand Bits = DAG.getNode(ISD::BIT_CONVERT, MVT::f64, Op.getOperand(0));
23842388 SDOperand FP = DAG.getNode(PPCISD::FCFID, MVT::f64, Bits);
0 ; RUN: llvm-as < %s | llc -march=ppc64 > %t
1 ; RUN: grep __floattitf %t
2 ; RUN: grep __fixunstfti %t
3
4 target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f128:64:128"
5 target triple = "powerpc64-apple-darwin9.2.0"
6
7 define ppc_fp128 @foo(i128 %a) nounwind {
8 entry:
9 %tmp2829 = uitofp i128 %a to ppc_fp128 ; [#uses=1]
10 ret ppc_fp128 %tmp2829
11 }
12 define i128 @boo(ppc_fp128 %a) nounwind {
13 entry:
14 %tmp2829 = fptoui ppc_fp128 %a to i128 ; [#uses=1]
15 ret i128 %tmp2829
16 }
0 ; RUN: llvm-as < %s | llc -march=ppc64 | grep __floatditf
1
2 define i64 @__fixunstfdi(ppc_fp128 %a) nounwind {
3 entry:
4 %tmp1213 = uitofp i64 0 to ppc_fp128 ; [#uses=1]
5 %tmp15 = sub ppc_fp128 %a, %tmp1213 ; [#uses=1]
6 %tmp2829 = fptoui ppc_fp128 %tmp15 to i32 ; [#uses=1]
7 %tmp282930 = zext i32 %tmp2829 to i64 ; [#uses=1]
8 %tmp32 = add i64 %tmp282930, 0 ; [#uses=1]
9 ret i64 %tmp32
10 }
+0
-17
test/CodeGen/PowerPC/int-fp-conv.ll less more
None ; RUN: llvm-as < %s | llc -march=ppc64 > %t
1 ; RUN: grep __floattitf %t
2 ; RUN: grep __fixunstfti %t
3
4 target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f128:64:128"
5 target triple = "powerpc64-apple-darwin9.2.0"
6
7 define ppc_fp128 @foo(i128 %a) nounwind {
8 entry:
9 %tmp2829 = uitofp i128 %a to ppc_fp128 ; [#uses=1]
10 ret ppc_fp128 %tmp2829
11 }
12 define i128 @boo(ppc_fp128 %a) nounwind {
13 entry:
14 %tmp2829 = fptoui ppc_fp128 %a to i128 ; [#uses=1]
15 ret i128 %tmp2829
16 }