llvm.org GIT mirror llvm / 02474a3
Move the complex address expression out of DIVariable and into an extra argument of the llvm.dbg.declare/llvm.dbg.value intrinsics. Previously, DIVariable was a variable-length field that has an optional reference to a Metadata array consisting of a variable number of complex address expressions. In the case of OpPiece expressions this is wasting a lot of storage in IR, because when an aggregate type is, e.g., SROA'd into all of its n individual members, the IR will contain n copies of the DIVariable, all alike, only differing in the complex address reference at the end. By making the complex address into an extra argument of the dbg.value/dbg.declare intrinsics, all of the pieces can reference the same variable and the complex address expressions can be uniqued across the CU, too. Down the road, this will allow us to move other flags, such as "indirection" out of the DIVariable, too. The new intrinsics look like this: declare void @llvm.dbg.declare(metadata %storage, metadata %var, metadata %expr) declare void @llvm.dbg.value(metadata %storage, i64 %offset, metadata %var, metadata %expr) This patch adds a new LLVM-local tag to DIExpressions, so we can detect and pretty-print DIExpression metadata nodes. What this patch doesn't do: This patch does not touch the "Indirect" field in DIVariable; but moving that into the expression would be a natural next step. http://reviews.llvm.org/D4919 rdar://problem/17994491 Thanks to dblaikie and dexonsmith for reviewing this patch! Note: I accidentally committed a bogus older version of this patch previously. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218787 91177308-0d34-0410-b5e6-96231b3b80d8 Adrian Prantl 5 years ago
257 changed file(s) with 1543 addition(s) and 1386 deletion(s). Raw diff Collapse all Expand all
570570 metadata, ;; Reference to the type descriptor
571571 i32, ;; flags
572572 metadata ;; (optional) Reference to inline location
573 metadata ;; (optional) Reference to a complex expression (see below)
573 metadata ;; (optional) Reference to a complex expression.
574574 }
575575
576576 These descriptors are used to define variables local to a sub program. The
589589 Name the source variable name. Context and line indicate where the variable
590590 was defined. Type descriptor defines the declared type of the variable.
591591
592 The ``OpPiece`` operator is used for (typically larger aggregate)
592 Complex Expressions
593 ^^^^^^^^^^^^^^^^^^^
594 .. code-block:: llvm
595
596 !8 = metadata !{
597 i32, ;; DW_TAG_expression
598 ...
599 }
600
601 Complex expressions describe variable storage locations in terms of
602 prefix-notated DWARF expressions. Currently the only supported
603 operators are ``DW_OP_plus``, ``DW_OP_deref``, and ``DW_OP_piece``.
604
605 The ``DW_OP_piece`` operator is used for (typically larger aggregate)
593606 variables that are fragmented across several locations. It takes two
594607 i32 arguments, an offset and a size in bytes to describe which piece
595608 of the variable is at this location.
243243 ///
244244 DebugLoc getDebugLoc() const { return debugLoc; }
245245
246 /// getDebugVariable() - Return the debug variable referenced by
246 /// \brief Return the debug variable referenced by
247247 /// this DBG_VALUE instruction.
248248 DIVariable getDebugVariable() const {
249249 assert(isDebugValue() && "not a DBG_VALUE");
250 const MDNode *Var = getOperand(getNumOperands() - 1).getMetadata();
251 return DIVariable(Var);
250 DIVariable Var(getOperand(2).getMetadata());
251 assert(Var.Verify() && "not a DIVariable");
252 return Var;
253 }
254
255 /// \brief Return the complex address expression referenced by
256 /// this DBG_VALUE instruction.
257 DIExpression getDebugExpression() const {
258 assert(isDebugValue() && "not a DBG_VALUE");
259 DIExpression Expr(getOperand(3).getMetadata());
260 assert(Expr.Verify() && "not a DIExpression");
261 return Expr;
252262 }
253263
254264 /// emitError - Emit an error referring to the source location of this
169169
170170 const MachineInstrBuilder &addMetadata(const MDNode *MD) const {
171171 MI->addOperand(*MF, MachineOperand::CreateMetadata(MD));
172 assert((MI->isDebugValue() ? MI->getDebugVariable().Verify() : true) &&
173 "first MDNode argument of a DBG_VALUE not a DIVariable");
172174 return *this;
173175 }
174176
344346 /// address. The convention is that a DBG_VALUE is indirect iff the
345347 /// second operand is an immediate.
346348 ///
347 inline MachineInstrBuilder BuildMI(MachineFunction &MF,
348 DebugLoc DL,
349 const MCInstrDesc &MCID,
350 bool IsIndirect,
351 unsigned Reg,
352 unsigned Offset,
353 const MDNode *MD) {
349 inline MachineInstrBuilder BuildMI(MachineFunction &MF, DebugLoc DL,
350 const MCInstrDesc &MCID, bool IsIndirect,
351 unsigned Reg, unsigned Offset,
352 const MDNode *Variable, const MDNode *Expr) {
353 assert(DIVariable(Variable).Verify() && "not a DIVariable");
354 assert(DIExpression(Expr).Verify() && "not a DIExpression");
354355 if (IsIndirect)
355356 return BuildMI(MF, DL, MCID)
356 .addReg(Reg, RegState::Debug)
357 .addImm(Offset)
358 .addMetadata(MD);
357 .addReg(Reg, RegState::Debug)
358 .addImm(Offset)
359 .addMetadata(Variable)
360 .addMetadata(Expr);
359361 else {
360362 assert(Offset == 0 && "A direct address cannot have an offset.");
361363 return BuildMI(MF, DL, MCID)
362 .addReg(Reg, RegState::Debug)
363 .addReg(0U, RegState::Debug)
364 .addMetadata(MD);
364 .addReg(Reg, RegState::Debug)
365 .addReg(0U, RegState::Debug)
366 .addMetadata(Variable)
367 .addMetadata(Expr);
365368 }
366369 }
367370
370373 /// address and inserts it at position I.
371374 ///
372375 inline MachineInstrBuilder BuildMI(MachineBasicBlock &BB,
373 MachineBasicBlock::iterator I,
374 DebugLoc DL,
375 const MCInstrDesc &MCID,
376 bool IsIndirect,
377 unsigned Reg,
378 unsigned Offset,
379 const MDNode *MD) {
376 MachineBasicBlock::iterator I, DebugLoc DL,
377 const MCInstrDesc &MCID, bool IsIndirect,
378 unsigned Reg, unsigned Offset,
379 const MDNode *Variable, const MDNode *Expr) {
380 assert(DIVariable(Variable).Verify() && "not a DIVariable");
381 assert(DIExpression(Expr).Verify() && "not a DIExpression");
380382 MachineFunction &MF = *BB.getParent();
381 MachineInstr *MI = BuildMI(MF, DL, MCID, IsIndirect, Reg, Offset, MD);
383 MachineInstr *MI =
384 BuildMI(MF, DL, MCID, IsIndirect, Reg, Offset, Variable, Expr);
382385 BB.insert(I, MI);
383386 return MachineInstrBuilder(MF, MI);
384387 }
165165
166166 struct VariableDbgInfo {
167167 TrackingVH Var;
168 TrackingVH Expr;
168169 unsigned Slot;
169170 DebugLoc Loc;
170171 };
389390
390391 /// setVariableDbgInfo - Collect information used to emit debugging
391392 /// information of a variable.
392 void setVariableDbgInfo(MDNode *N, unsigned Slot, DebugLoc Loc) {
393 VariableDbgInfo Info = { N, Slot, Loc };
393 void setVariableDbgInfo(MDNode *Var, MDNode *Expr, unsigned Slot,
394 DebugLoc Loc) {
395 VariableDbgInfo Info = {Var, Expr, Slot, Loc};
394396 VariableDbgInfos.push_back(std::move(Info));
395397 }
396398
983983
984984 /// getDbgValue - Creates a SDDbgValue node.
985985 ///
986 SDDbgValue *getDbgValue(MDNode *MDPtr, SDNode *N, unsigned R,
987 bool IsIndirect, uint64_t Off,
988 DebugLoc DL, unsigned O);
989 /// Constant.
990 SDDbgValue *getConstantDbgValue(MDNode *MDPtr, const Value *C, uint64_t Off,
991 DebugLoc DL, unsigned O);
992 /// Frame index.
993 SDDbgValue *getFrameIndexDbgValue(MDNode *MDPtr, unsigned FI, uint64_t Off,
994 DebugLoc DL, unsigned O);
986 /// SDNode
987 SDDbgValue *getDbgValue(MDNode *Var, MDNode *Expr, SDNode *N, unsigned R,
988 bool IsIndirect, uint64_t Off, DebugLoc DL,
989 unsigned O);
990
991 /// Constant
992 SDDbgValue *getConstantDbgValue(MDNode *Var, MDNode *Expr, const Value *C,
993 uint64_t Off, DebugLoc DL, unsigned O);
994
995 /// FrameIndex
996 SDDbgValue *getFrameIndexDbgValue(MDNode *Var, MDNode *Expr, unsigned FI,
997 uint64_t Off, DebugLoc DL, unsigned O);
995998
996999 /// RemoveDeadNode - Remove the specified node from the system. If any of its
9971000 /// operands then becomes dead, remove them as well. Inform UpdateListener
8484
8585 public:
8686 explicit DIBuilder(Module &M);
87 enum ComplexAddrKind { OpPlus=1, OpDeref, OpPiece };
8887 enum DebugEmissionKind { FullDebug=1, LineTablesOnly };
8988
9089 /// finalize - Construct any deferred debug info descriptors.
500499 unsigned Flags = 0,
501500 unsigned ArgNo = 0);
502501
503
504 /// createComplexVariable - Create a new descriptor for the specified
502 /// createExpression - Create a new descriptor for the specified
505503 /// variable which has a complex address expression for its address.
506 /// @param Tag Dwarf TAG. Usually DW_TAG_auto_variable or
507 /// DW_TAG_arg_variable.
508 /// @param Scope Variable scope.
509 /// @param Name Variable name.
510 /// @param F File where this variable is defined.
511 /// @param LineNo Line number.
512 /// @param Ty Variable Type
513504 /// @param Addr An array of complex address operations.
514 /// @param ArgNo If this variable is an argument then this argument's
515 /// number. 1 indicates 1st argument.
516 DIVariable createComplexVariable(unsigned Tag, DIDescriptor Scope,
517 StringRef Name, DIFile F, unsigned LineNo,
518 DITypeRef Ty, ArrayRef Addr,
519 unsigned ArgNo = 0);
520
521 /// createVariablePiece - Create a descriptor to describe one part
505 DIExpression createExpression(ArrayRef Addr = None);
506
507 /// createPieceExpression - Create a descriptor to describe one part
522508 /// of aggregate variable that is fragmented across multiple Values.
523509 ///
524 /// @param Variable Variable that is partially represented by this.
525510 /// @param OffsetInBytes Offset of the piece in bytes.
526511 /// @param SizeInBytes Size of the piece in bytes.
527 DIVariable createVariablePiece(DIVariable Variable,
528 unsigned OffsetInBytes,
529 unsigned SizeInBytes);
512 DIExpression createPieceExpression(unsigned OffsetInBytes,
513 unsigned SizeInBytes);
530514
531515 /// createFunction - Create a new descriptor for the specified subprogram.
532516 /// See comments in DISubprogram for descriptions of these fields.
674658 /// insertDeclare - Insert a new llvm.dbg.declare intrinsic call.
675659 /// @param Storage llvm::Value of the variable
676660 /// @param VarInfo Variable's debug info descriptor.
661 /// @param Expr A complex location expression.
677662 /// @param InsertAtEnd Location for the new intrinsic.
678663 Instruction *insertDeclare(llvm::Value *Storage, DIVariable VarInfo,
679 BasicBlock *InsertAtEnd);
664 DIExpression Expr, BasicBlock *InsertAtEnd);
680665
681666 /// insertDeclare - Insert a new llvm.dbg.declare intrinsic call.
682667 /// @param Storage llvm::Value of the variable
683668 /// @param VarInfo Variable's debug info descriptor.
669 /// @param Expr A complex location expression.
684670 /// @param InsertBefore Location for the new intrinsic.
685671 Instruction *insertDeclare(llvm::Value *Storage, DIVariable VarInfo,
686 Instruction *InsertBefore);
687
672 DIExpression Expr, Instruction *InsertBefore);
688673
689674 /// insertDbgValueIntrinsic - Insert a new llvm.dbg.value intrinsic call.
690675 /// @param Val llvm::Value of the variable
691676 /// @param Offset Offset
692677 /// @param VarInfo Variable's debug info descriptor.
678 /// @param Expr A complex location expression.
693679 /// @param InsertAtEnd Location for the new intrinsic.
694680 Instruction *insertDbgValueIntrinsic(llvm::Value *Val, uint64_t Offset,
695 DIVariable VarInfo,
681 DIVariable VarInfo, DIExpression Expr,
696682 BasicBlock *InsertAtEnd);
697683
698684 /// insertDbgValueIntrinsic - Insert a new llvm.dbg.value intrinsic call.
699685 /// @param Val llvm::Value of the variable
700686 /// @param Offset Offset
701687 /// @param VarInfo Variable's debug info descriptor.
688 /// @param Expr A complex location expression.
702689 /// @param InsertBefore Location for the new intrinsic.
703690 Instruction *insertDbgValueIntrinsic(llvm::Value *Val, uint64_t Offset,
704 DIVariable VarInfo,
691 DIVariable VarInfo, DIExpression Expr,
705692 Instruction *InsertBefore);
706693 };
707694 } // end namespace llvm
149149 bool isTemplateValueParameter() const;
150150 bool isObjCProperty() const;
151151 bool isImportedEntity() const;
152 bool isExpression() const;
152153
153154 /// print - print descriptor.
154155 void print(raw_ostream &OS) const;
719720 /// Verify - Verify that a variable descriptor is well formed.
720721 bool Verify() const;
721722
722 /// HasComplexAddr - Return true if the variable has a complex address.
723 bool hasComplexAddress() const { return getNumAddrElements() > 0; }
724
725 /// \brief Return the size of this variable's complex address or
726 /// zero if there is none.
727 unsigned getNumAddrElements() const {
728 if (DbgNode->getNumOperands() < 9)
729 return 0;
730 return getDescriptorField(8)->getNumOperands();
731 }
732
733 /// \brief return the Idx'th complex address element.
734 uint64_t getAddrElement(unsigned Idx) const;
735
736723 /// isBlockByrefVariable - Return true if the variable was declared as
737724 /// a "__block" variable (Apple Blocks).
738725 bool isBlockByrefVariable(const DITypeIdentifierMap &Map) const {
742729 /// isInlinedFnArgument - Return true if this variable provides debugging
743730 /// information for an inlined function arguments.
744731 bool isInlinedFnArgument(const Function *CurFn);
732
733 /// Return the size reported by the variable's type.
734 unsigned getSizeInBits(const DITypeIdentifierMap &Map);
735
736 void printExtendedName(raw_ostream &OS) const;
737 };
738
739 /// DIExpression - A complex location expression.
740 class DIExpression : public DIDescriptor {
741 friend class DIDescriptor;
742 void printInternal(raw_ostream &OS) const;
743
744 public:
745 explicit DIExpression(const MDNode *N = nullptr) : DIDescriptor(N) {}
746
747 /// Verify - Verify that a variable descriptor is well formed.
748 bool Verify() const;
749
750 /// \brief Return the number of elements in the complex expression.
751 unsigned getNumElements() const {
752 if (!DbgNode)
753 return 0;
754 unsigned N = DbgNode->getNumOperands();
755 assert(N > 0 && "missing tag");
756 return N - 1;
757 }
758
759 /// \brief return the Idx'th complex address element.
760 uint64_t getElement(unsigned Idx) const;
745761
746762 /// isVariablePiece - Return whether this is a piece of an aggregate
747763 /// variable.
750766 uint64_t getPieceOffset() const;
751767 /// getPieceSize - Return the size of this piece in bytes.
752768 uint64_t getPieceSize() const;
753
754 /// Return the size reported by the variable's type.
755 unsigned getSizeInBits(const DITypeIdentifierMap &Map);
756
757 void printExtendedName(raw_ostream &OS) const;
758769 };
759770
760771 /// DILocation - This object holds location information. This object
871882 /// cleanseInlinedVariable - Remove inlined scope from the variable.
872883 DIVariable cleanseInlinedVariable(MDNode *DV, LLVMContext &VMContext);
873884
874 /// getEntireVariable - Remove OpPiece exprs from the variable.
875 DIVariable getEntireVariable(DIVariable DV);
876
877885 /// Construct DITypeIdentifierMap by going through retained types of each CU.
878886 DITypeIdentifierMap generateDITypeIdentifierMap(const NamedMDNode *CU_Nodes);
879887
8181 public:
8282 Value *getAddress() const;
8383 MDNode *getVariable() const { return cast(getArgOperand(1)); }
84 MDNode *getExpression() const { return cast(getArgOperand(2)); }
8485
8586 // Methods for support type inquiry through isa, cast, and dyn_cast:
8687 static inline bool classof(const IntrinsicInst *I) {
102103 const_cast(getArgOperand(1)))->getZExtValue();
103104 }
104105 MDNode *getVariable() const { return cast(getArgOperand(2)); }
106 MDNode *getExpression() const { return cast(getArgOperand(3)); }
105107
106108 // Methods for support type inquiry through isa, cast, and dyn_cast:
107109 static inline bool classof(const IntrinsicInst *I) {
372372 // places.
373373 let Properties = [IntrNoMem] in {
374374 def int_dbg_declare : Intrinsic<[],
375 [llvm_metadata_ty, llvm_metadata_ty]>;
375 [llvm_metadata_ty,
376 llvm_metadata_ty,
377 llvm_metadata_ty]>;
376378 def int_dbg_value : Intrinsic<[],
377379 [llvm_metadata_ty, llvm_i64_ty,
380 llvm_metadata_ty,
378381 llvm_metadata_ty]>;
379382 }
380383
5252
5353 DW_TAG_auto_variable = 0x100, // Tag for local (auto) variables.
5454 DW_TAG_arg_variable = 0x101, // Tag for argument variables.
55 DW_TAG_expression = 0x102, // Tag for complex address expressions.
5556
5657 DW_TAG_user_base = 0x1000, // Recommended base for user tags.
5758
613613 /// of DBG_VALUE, returning true if it was able to do so. A false return
614614 /// means the target will need to handle MI in EmitInstruction.
615615 static bool emitDebugValueComment(const MachineInstr *MI, AsmPrinter &AP) {
616 // This code handles only the 3-operand target-independent form.
617 if (MI->getNumOperands() != 3)
616 // This code handles only the 4-operand target-independent form.
617 if (MI->getNumOperands() != 4)
618618 return false;
619619
620620 SmallString<128> Str;
628628 OS << Name << ":";
629629 }
630630 OS << V.getName();
631 if (V.isVariablePiece())
632 OS << " [piece offset=" << V.getPieceOffset()
633 << " size="<
631
632 DIExpression Expr = MI->getDebugExpression();
633 if (Expr.isVariablePiece())
634 OS << " [piece offset=" << Expr.getPieceOffset()
635 << " size=" << Expr.getPieceSize() << "]";
634636 OS << " <- ";
635637
636638 // The second operand is only an offset if it's an immediate.
2626 // In the other case, returns 0.
2727 static unsigned isDescribedByReg(const MachineInstr &MI) {
2828 assert(MI.isDebugValue());
29 assert(MI.getNumOperands() == 3);
29 assert(MI.getNumOperands() == 4);
3030 // If location of variable is described using a register (directly or
3131 // indirecltly), this register is always a first operand.
3232 return MI.getOperand(0).isReg() ? MI.getOperand(0).getReg() : 0;
3636 const MachineInstr &MI) {
3737 // Instruction range should start with a DBG_VALUE instruction for the
3838 // variable.
39 assert(MI.isDebugValue() && getEntireVariable(MI.getDebugVariable()) == Var);
39 assert(MI.isDebugValue() && "not a DBG_VALUE");
4040 auto &Ranges = VarInstrRanges[Var];
4141 if (!Ranges.empty() && Ranges.back().second == nullptr &&
4242 Ranges.back().first->isIdenticalTo(&MI)) {
192192 // Use the base variable (without any DW_OP_piece expressions)
193193 // as index into History. The full variables including the
194194 // piece expressions are attached to the MI.
195 DIVariable Var = getEntireVariable(MI.getDebugVariable());
195 DIVariable Var = MI.getDebugVariable();
196196
197197 if (unsigned PrevReg = Result.getRegisterForVar(Var))
198198 dropRegDescribedVar(RegVars, PrevReg, Var);
2525 public:
2626 /// A single location or constant.
2727 struct Value {
28 Value(const MDNode *Var, int64_t i)
29 : Variable(Var), EntryKind(E_Integer) {
28 Value(const MDNode *Var, const MDNode *Expr, int64_t i)
29 : Variable(Var), Expression(Expr), EntryKind(E_Integer) {
3030 Constant.Int = i;
3131 }
32 Value(const MDNode *Var, const ConstantFP *CFP)
33 : Variable(Var), EntryKind(E_ConstantFP) {
32 Value(const MDNode *Var, const MDNode *Expr, const ConstantFP *CFP)
33 : Variable(Var), Expression(Expr), EntryKind(E_ConstantFP) {
3434 Constant.CFP = CFP;
3535 }
36 Value(const MDNode *Var, const ConstantInt *CIP)
37 : Variable(Var), EntryKind(E_ConstantInt) {
36 Value(const MDNode *Var, const MDNode *Expr, const ConstantInt *CIP)
37 : Variable(Var), Expression(Expr), EntryKind(E_ConstantInt) {
3838 Constant.CIP = CIP;
3939 }
40 Value(const MDNode *Var, MachineLocation Loc)
41 : Variable(Var), EntryKind(E_Location), Loc(Loc) {
40 Value(const MDNode *Var, const MDNode *Expr, MachineLocation Loc)
41 : Variable(Var), Expression(Expr), EntryKind(E_Location), Loc(Loc) {
42 assert(DIVariable(Var).Verify());
43 assert(DIExpression(Expr).Verify());
4244 }
4345
4446 // The variable to which this location entry corresponds.
4547 const MDNode *Variable;
48
49 // Any complex address location expression for this Value.
50 const MDNode *Expression;
4651
4752 // Type of entry that this represents.
4853 enum EntryType { E_Location, E_Integer, E_ConstantFP, E_ConstantInt };
6873 MachineLocation getLoc() const { return Loc; }
6974 const MDNode *getVariableNode() const { return Variable; }
7075 DIVariable getVariable() const { return DIVariable(Variable); }
71 bool isVariablePiece() const { return getVariable().isVariablePiece(); }
76 bool isVariablePiece() const { return getExpression().isVariablePiece(); }
77 DIExpression getExpression() const { return DIExpression(Expression); }
7278 friend bool operator==(const Value &, const Value &);
7379 friend bool operator<(const Value &, const Value &);
7480 };
8995 // list of values.
9096 // Return true if the merge was successful.
9197 bool MergeValues(const DebugLocEntry &Next) {
92 if (Begin == Next.Begin && Values.size() > 0 && Next.Values.size() > 0) {
98 if (Begin == Next.Begin) {
99 DIExpression Expr(Values[0].Expression);
93100 DIVariable Var(Values[0].Variable);
101 DIExpression NextExpr(Next.Values[0].Expression);
94102 DIVariable NextVar(Next.Values[0].Variable);
95 if (Var.getName() == NextVar.getName() &&
96 Var.isVariablePiece() && NextVar.isVariablePiece()) {
103 if (Var == NextVar && Expr.isVariablePiece() &&
104 NextExpr.isVariablePiece()) {
97105 addValues(Next.Values);
98106 End = Next.End;
99107 return true;
132140 std::sort(Values.begin(), Values.end());
133141 Values.erase(std::unique(Values.begin(), Values.end(),
134142 [](const Value &A, const Value &B) {
135 return A.getVariable() == B.getVariable();
136 }), Values.end());
143 return A.getVariable() == B.getVariable() &&
144 A.getExpression() == B.getExpression();
145 }),
146 Values.end());
137147 }
138148 };
139149
143153 if (A.EntryKind != B.EntryKind)
144154 return false;
145155
146 if (A.getVariable() != B.getVariable())
156 if (A.Expression != B.Expression)
157 return false;
158
159 if (A.Variable != B.Variable)
147160 return false;
148161
149162 switch (A.EntryKind) {
162175 /// Compare two pieces based on their offset.
163176 inline bool operator<(const DebugLocEntry::Value &A,
164177 const DebugLocEntry::Value &B) {
165 return A.getVariable().getPieceOffset() < B.getVariable().getPieceOffset();
178 return A.getExpression().getPieceOffset() <
179 B.getExpression().getPieceOffset();
166180 }
167181
168182 }
900900 for (unsigned vi = 0, ve = Variables.getNumElements(); vi != ve; ++vi) {
901901 DIVariable DV(Variables.getElement(vi));
902902 assert(DV.isVariable());
903 DbgVariable NewVar(DV, this);
903 DbgVariable NewVar(DV, DIExpression(nullptr), this);
904904 auto VariableDie = SPCU->constructVariableDIE(NewVar);
905905 SPCU->applyVariableAttributes(NewVar, *VariableDie);
906906 SPDIE->addChild(std::move(VariableDie));
11201120
11211121 void DwarfDebug::createAbstractVariable(const DIVariable &Var,
11221122 LexicalScope *Scope) {
1123 auto AbsDbgVariable = make_unique(Var, this);
1123 auto AbsDbgVariable = make_unique(Var, DIExpression(), this);
11241124 addScopeVariable(Scope, AbsDbgVariable.get());
11251125 AbstractVariables[Var] = std::move(AbsDbgVariable);
11261126 }
11761176 continue;
11771177 Processed.insert(VI.Var);
11781178 DIVariable DV(VI.Var);
1179 DIExpression Expr(VI.Expr);
11791180 LexicalScope *Scope = LScopes.findLexicalScope(VI.Loc);
11801181
11811182 // If variable scope is not found then skip this variable.
11831184 continue;
11841185
11851186 ensureAbstractVariableIsCreatedIfScoped(DV, Scope->getScopeNode());
1186 ConcreteVariables.push_back(make_unique(DV, this));
1187 ConcreteVariables.push_back(make_unique(DV, Expr, this));
11871188 DbgVariable *RegVar = ConcreteVariables.back().get();
11881189 RegVar->setFrameIndex(VI.Slot);
11891190 addScopeVariable(Scope, RegVar);
11921193
11931194 // Get .debug_loc entry for the instruction range starting at MI.
11941195 static DebugLocEntry::Value getDebugLocValue(const MachineInstr *MI) {
1196 const MDNode *Expr = MI->getDebugExpression();
11951197 const MDNode *Var = MI->getDebugVariable();
11961198
1197 assert(MI->getNumOperands() == 3);
1199 assert(MI->getNumOperands() == 4);
11981200 if (MI->getOperand(0).isReg()) {
11991201 MachineLocation MLoc;
12001202 // If the second operand is an immediate, this is a
12031205 MLoc.set(MI->getOperand(0).getReg());
12041206 else
12051207 MLoc.set(MI->getOperand(0).getReg(), MI->getOperand(1).getImm());
1206 return DebugLocEntry::Value(Var, MLoc);
1208 return DebugLocEntry::Value(Var, Expr, MLoc);
12071209 }
12081210 if (MI->getOperand(0).isImm())
1209 return DebugLocEntry::Value(Var, MI->getOperand(0).getImm());
1211 return DebugLocEntry::Value(Var, Expr, MI->getOperand(0).getImm());
12101212 if (MI->getOperand(0).isFPImm())
1211 return DebugLocEntry::Value(Var, MI->getOperand(0).getFPImm());
1213 return DebugLocEntry::Value(Var, Expr, MI->getOperand(0).getFPImm());
12121214 if (MI->getOperand(0).isCImm())
1213 return DebugLocEntry::Value(Var, MI->getOperand(0).getCImm());
1214
1215 llvm_unreachable("Unexpected 3 operand DBG_VALUE instruction!");
1215 return DebugLocEntry::Value(Var, Expr, MI->getOperand(0).getCImm());
1216
1217 llvm_unreachable("Unexpected 4-operand DBG_VALUE instruction!");
12161218 }
12171219
12181220 /// Determine whether two variable pieces overlap.
1219 static bool piecesOverlap(DIVariable P1, DIVariable P2) {
1221 static bool piecesOverlap(DIExpression P1, DIExpression P2) {
12201222 if (!P1.isVariablePiece() || !P2.isVariablePiece())
12211223 return true;
12221224 unsigned l1 = P1.getPieceOffset();
12671269 }
12681270
12691271 // If this piece overlaps with any open ranges, truncate them.
1270 DIVariable DIVar = Begin->getDebugVariable();
1272 DIExpression DIExpr = Begin->getDebugExpression();
12711273 auto Last = std::remove_if(OpenRanges.begin(), OpenRanges.end(),
12721274 [&](DebugLocEntry::Value R) {
1273 return piecesOverlap(DIVar, R.getVariable());
1274 });
1275 return piecesOverlap(DIExpr, R.getExpression());
1276 });
12751277 OpenRanges.erase(Last, OpenRanges.end());
12761278
12771279 const MCSymbol *StartLabel = getLabelBeforeInsn(Begin);
12931295 bool couldMerge = false;
12941296
12951297 // If this is a piece, it may belong to the current DebugLocEntry.
1296 if (DIVar.isVariablePiece()) {
1298 if (DIExpr.isVariablePiece()) {
12971299 // Add this value to the list of open ranges.
12981300 OpenRanges.push_back(Value);
12991301
13191321 if (PrevEntry != DebugLoc.rend() && PrevEntry->MergeRanges(*CurEntry))
13201322 DebugLoc.pop_back();
13211323
1322 DEBUG(dbgs() << "Values:\n";
1323 for (auto Value : CurEntry->getValues())
1324 Value.getVariable()->dump();
1325 dbgs() << "-----\n");
1324 DEBUG({
1325 dbgs() << CurEntry->getValues().size() << " Values:\n";
1326 for (auto Value : CurEntry->getValues()) {
1327 Value.getVariable()->dump();
1328 Value.getExpression()->dump();
1329 }
1330 dbgs() << "-----\n";
1331 });
13261332 }
13271333 }
13281334
13571363 if (!Scope)
13581364 continue;
13591365
1360 Processed.insert(getEntireVariable(DV));
1366 Processed.insert(DV);
13611367 const MachineInstr *MInsn = Ranges.front().first;
13621368 assert(MInsn->isDebugValue() && "History must begin with debug value");
13631369 ensureAbstractVariableIsCreatedIfScoped(DV, Scope->getScopeNode());
13911397 continue;
13921398 if (LexicalScope *Scope = LScopes.findLexicalScope(DV.getContext())) {
13931399 ensureAbstractVariableIsCreatedIfScoped(DV, Scope->getScopeNode());
1394 ConcreteVariables.push_back(make_unique(DV, this));
1400 DIExpression NoExpr;
1401 ConcreteVariables.push_back(make_unique(DV, NoExpr, this));
13951402 addScopeVariable(Scope, ConcreteVariables.back().get());
13961403 }
13971404 }
15791586
15801587 // The first mention of a function argument gets the FunctionBeginSym
15811588 // label, so arguments are visible when breaking at function entry.
1582 DIVariable DV(Ranges.front().first->getDebugVariable());
1583 if (DV.isVariable() && DV.getTag() == dwarf::DW_TAG_arg_variable &&
1584 getDISubprogram(DV.getContext()).describes(MF->getFunction())) {
1585 if (!DV.isVariablePiece())
1586 LabelsBeforeInsn[Ranges.front().first] = FunctionBeginSym;
1587 else {
1589 DIVariable DIVar(Ranges.front().first->getDebugVariable());
1590 if (DIVar.isVariable() && DIVar.getTag() == dwarf::DW_TAG_arg_variable &&
1591 getDISubprogram(DIVar.getContext()).describes(MF->getFunction())) {
1592 LabelsBeforeInsn[Ranges.front().first] = FunctionBeginSym;
1593 if (Ranges.front().first->getDebugExpression().isVariablePiece()) {
15881594 // Mark all non-overlapping initial pieces.
15891595 for (auto I = Ranges.begin(); I != Ranges.end(); ++I) {
1590 DIVariable Piece = I->first->getDebugVariable();
1596 DIExpression Piece = I->first->getDebugExpression();
15911597 if (std::all_of(Ranges.begin(), I,
1592 [&](DbgValueHistoryMap::InstrRange Pred){
1593 return !piecesOverlap(Piece, Pred.first->getDebugVariable());
1598 [&](DbgValueHistoryMap::InstrRange Pred) {
1599 return !piecesOverlap(Piece, Pred.first->getDebugExpression());
15941600 }))
15951601 LabelsBeforeInsn[I->first] = FunctionBeginSym;
15961602 else
20882094
20892095 unsigned Offset = 0;
20902096 for (auto Piece : Values) {
2091 DIVariable Var = Piece.getVariable();
2092 unsigned PieceOffset = Var.getPieceOffset();
2093 unsigned PieceSize = Var.getPieceSize();
2097 DIExpression Expr = Piece.getExpression();
2098 unsigned PieceOffset = Expr.getPieceOffset();
2099 unsigned PieceSize = Expr.getPieceSize();
20942100 assert(Offset <= PieceOffset && "overlapping or duplicate pieces");
20952101 if (Offset < PieceOffset) {
20962102 // The DWARF spec seriously mandates pieces with no locations for gaps.
21012107 Offset += PieceSize;
21022108
21032109 const unsigned SizeOfByte = 8;
2110 #ifndef NDEBUG
2111 DIVariable Var = Piece.getVariable();
21042112 assert(!Var.isIndirect() && "indirect address for piece");
2105 #ifndef NDEBUG
21062113 unsigned VarSize = Var.getSizeInBits(Map);
21072114 assert(PieceSize+PieceOffset <= VarSize/SizeOfByte
21082115 && "piece is larger than or outside of variable");
21482155 }
21492156 } else if (Value.isLocation()) {
21502157 MachineLocation Loc = Value.getLoc();
2151 if (!DV.hasComplexAddress())
2158 DIExpression Expr = Value.getExpression();
2159 if (!Expr)
21522160 // Regular entry.
21532161 Asm->EmitDwarfRegOp(Streamer, Loc, DV.isIndirect());
21542162 else {
21552163 // Complex address entry.
2156 unsigned N = DV.getNumAddrElements();
2164 unsigned N = Expr.getNumElements();
21572165 unsigned i = 0;
2158 if (N >= 2 && DV.getAddrElement(0) == DIBuilder::OpPlus) {
2166 if (N >= 2 && Expr.getElement(0) == dwarf::DW_OP_plus) {
21592167 if (Loc.getOffset()) {
21602168 i = 2;
21612169 Asm->EmitDwarfRegOp(Streamer, Loc, DV.isIndirect());
21622170 Streamer.EmitInt8(dwarf::DW_OP_deref, "DW_OP_deref");
21632171 Streamer.EmitInt8(dwarf::DW_OP_plus_uconst, "DW_OP_plus_uconst");
2164 Streamer.EmitSLEB128(DV.getAddrElement(1));
2172 Streamer.EmitSLEB128(Expr.getElement(1));
21652173 } else {
21662174 // If first address element is OpPlus then emit
21672175 // DW_OP_breg + Offset instead of DW_OP_reg + Offset.
2168 MachineLocation TLoc(Loc.getReg(), DV.getAddrElement(1));
2176 MachineLocation TLoc(Loc.getReg(), Expr.getElement(1));
21692177 Asm->EmitDwarfRegOp(Streamer, TLoc, DV.isIndirect());
21702178 i = 2;
21712179 }
21752183
21762184 // Emit remaining complex address elements.
21772185 for (; i < N; ++i) {
2178 uint64_t Element = DV.getAddrElement(i);
2179 if (Element == DIBuilder::OpPlus) {
2186 uint64_t Element = Expr.getElement(i);
2187 if (Element == dwarf::DW_OP_plus) {
21802188 Streamer.EmitInt8(dwarf::DW_OP_plus_uconst, "DW_OP_plus_uconst");
2181 Streamer.EmitULEB128(DV.getAddrElement(++i));
2182 } else if (Element == DIBuilder::OpDeref) {
2189 Streamer.EmitULEB128(Expr.getElement(++i));
2190 } else if (Element == dwarf::DW_OP_deref) {
21832191 if (!Loc.isReg())
21842192 Streamer.EmitInt8(dwarf::DW_OP_deref, "DW_OP_deref");
2185 } else if (Element == DIBuilder::OpPiece) {
2193 } else if (Element == dwarf::DW_OP_piece) {
21862194 i += 3;
21872195 // handled in emitDebugLocEntry.
21882196 } else
6969 /// \brief This class is used to track local variable information.
7070 class DbgVariable {
7171 DIVariable Var; // Variable Descriptor.
72 DIExpression Expr; // Complex address location expression.
7273 DIE *TheDIE; // Variable DIE.
7374 unsigned DotDebugLocOffset; // Offset in DotDebugLocEntries.
7475 const MachineInstr *MInsn; // DBG_VALUE instruction of the variable.
7778
7879 public:
7980 /// Construct a DbgVariable from a DIVariable.
80 DbgVariable(DIVariable V, DwarfDebug *DD)
81 : Var(V), TheDIE(nullptr), DotDebugLocOffset(~0U), MInsn(nullptr),
82 FrameIndex(~0), DD(DD) {}
81 DbgVariable(DIVariable V, DIExpression E, DwarfDebug *DD)
82 : Var(V), Expr(E), TheDIE(nullptr), DotDebugLocOffset(~0U),
83 MInsn(nullptr), FrameIndex(~0), DD(DD) {
84 assert(Var.Verify() && Expr.Verify());
85 }
8386
8487 /// Construct a DbgVariable from a DEBUG_VALUE.
8588 /// AbstractVar may be NULL.
8689 DbgVariable(const MachineInstr *DbgValue, DwarfDebug *DD)
87 : Var(DbgValue->getDebugVariable()), TheDIE(nullptr),
88 DotDebugLocOffset(~0U), MInsn(DbgValue), FrameIndex(~0), DD(DD) {}
90 : Var(DbgValue->getDebugVariable()), Expr(DbgValue->getDebugExpression()),
91 TheDIE(nullptr), DotDebugLocOffset(~0U), MInsn(DbgValue),
92 FrameIndex(~0), DD(DD) {}
8993
9094 // Accessors.
9195 DIVariable getVariable() const { return Var; }
96 DIExpression getExpression() const { return Expr; }
9297 void setDIE(DIE &D) { TheDIE = &D; }
9398 DIE *getDIE() const { return TheDIE; }
9499 void setDotDebugLocOffset(unsigned O) { DotDebugLocOffset = O; }
123128
124129 bool variableHasComplexAddress() const {
125130 assert(Var.isVariable() && "Invalid complex DbgVariable!");
126 return Var.hasComplexAddress();
131 return Expr.getNumElements() > 0;
127132 }
128133 bool isBlockByrefVariable() const;
129134 unsigned getNumAddrElements() const {
130135 assert(Var.isVariable() && "Invalid complex DbgVariable!");
131 return Var.getNumAddrElements();
132 }
133 uint64_t getAddrElement(unsigned i) const { return Var.getAddrElement(i); }
136 return Expr.getNumElements();
137 }
138 uint64_t getAddrElement(unsigned i) const { return Expr.getElement(i); }
134139 DIType getType() const;
135140
136141 private:
606606 unsigned N = DV.getNumAddrElements();
607607 unsigned i = 0;
608608 if (Location.isReg()) {
609 if (N >= 2 && DV.getAddrElement(0) == DIBuilder::OpPlus) {
609 if (N >= 2 && DV.getAddrElement(0) == dwarf::DW_OP_plus) {
610 assert(!DV.getVariable().isIndirect() &&
611 "double indirection not handled");
610612 // If first address element is OpPlus then emit
611613 // DW_OP_breg + Offset instead of DW_OP_reg + Offset.
612614 addRegisterOffset(*Loc, Location.getReg(), DV.getAddrElement(1));
613615 i = 2;
614 } else if (N >= 2 && DV.getAddrElement(0) == DIBuilder::OpDeref) {
615 addRegisterOpPiece(*Loc, Location.getReg(),
616 DV.getVariable().getPieceSize(),
617 DV.getVariable().getPieceOffset());
618 i = 3;
616 } else if (N >= 2 && DV.getAddrElement(0) == dwarf::DW_OP_deref) {
617 assert(!DV.getVariable().isIndirect() &&
618 "double indirection not handled");
619 addRegisterOpPiece(*Loc, Location.getReg(),
620 DV.getExpression().getPieceSize(),
621 DV.getExpression().getPieceOffset());
622 i = 3;
619623 } else
620624 addRegisterOpPiece(*Loc, Location.getReg());
621625 } else
623627
624628 for (; i < N; ++i) {
625629 uint64_t Element = DV.getAddrElement(i);
626 if (Element == DIBuilder::OpPlus) {
630 if (Element == dwarf::DW_OP_plus) {
627631 addUInt(*Loc, dwarf::DW_FORM_data1, dwarf::DW_OP_plus_uconst);
628632 addUInt(*Loc, dwarf::DW_FORM_udata, DV.getAddrElement(++i));
629633
630 } else if (Element == DIBuilder::OpDeref) {
634 } else if (Element == dwarf::DW_OP_deref) {
631635 if (!Location.isReg())
632636 addUInt(*Loc, dwarf::DW_FORM_data1, dwarf::DW_OP_deref);
633637
634 } else if (Element == DIBuilder::OpPiece) {
638 } else if (Element == dwarf::DW_OP_piece) {
635639 const unsigned SizeOfByte = 8;
636640 unsigned PieceOffsetInBits = DV.getAddrElement(++i)*SizeOfByte;
637641 unsigned PieceSizeInBits = DV.getAddrElement(++i)*SizeOfByte;
18601864
18611865 // Check if variable is described by a DBG_VALUE instruction.
18621866 if (const MachineInstr *DVInsn = DV.getMInsn()) {
1863 assert(DVInsn->getNumOperands() == 3);
1867 assert(DVInsn->getNumOperands() == 4);
18641868 if (DVInsn->getOperand(0).isReg()) {
18651869 const MachineOperand RegOp = DVInsn->getOperand(0);
18661870 // If the second operand is an immediate, this is an indirect value.
12231223 // Modify DBG_VALUE now that the value is in a spill slot.
12241224 bool IsIndirect = MI->isIndirectDebugValue();
12251225 uint64_t Offset = IsIndirect ? MI->getOperand(1).getImm() : 0;
1226 const MDNode *MDPtr = MI->getOperand(2).getMetadata();
1226 const MDNode *Var = MI->getDebugVariable();
1227 const MDNode *Expr = MI->getDebugExpression();
12271228 DebugLoc DL = MI->getDebugLoc();
12281229 DEBUG(dbgs() << "Modifying debug info due to spill:" << "\t" << *MI);
12291230 MachineBasicBlock *MBB = MI->getParent();
12301231 BuildMI(*MBB, MBB->erase(MI), DL, TII.get(TargetOpcode::DBG_VALUE))
1231 .addFrameIndex(StackSlot).addImm(Offset).addMetadata(MDPtr);
1232 .addFrameIndex(StackSlot)
1233 .addImm(Offset)
1234 .addMetadata(Var)
1235 .addMetadata(Expr);
12321236 continue;
12331237 }
12341238
109109 namespace {
110110 class LDVImpl;
111111 class UserValue {
112 const MDNode *variable; ///< The debug info variable we are part of.
112 const MDNode *Variable; ///< The debug info variable we are part of.
113 const MDNode *Expression; ///< Any complex address expression.
113114 unsigned offset; ///< Byte offset into variable.
114115 bool IsIndirect; ///< true if this is a register-indirect+offset value.
115116 DebugLoc dl; ///< The debug location for the variable. This is
139140
140141 public:
141142 /// UserValue - Create a new UserValue.
142 UserValue(const MDNode *var, unsigned o, bool i, DebugLoc L,
143 LocMap::Allocator &alloc)
144 : variable(var), offset(o), IsIndirect(i), dl(L), leader(this),
145 next(nullptr), locInts(alloc)
146 {}
143 UserValue(const MDNode *var, const MDNode *expr, unsigned o, bool i,
144 DebugLoc L, LocMap::Allocator &alloc)
145 : Variable(var), Expression(expr), offset(o), IsIndirect(i), dl(L),
146 leader(this), next(nullptr), locInts(alloc) {}
147147
148148 /// getLeader - Get the leader of this value's equivalence class.
149149 UserValue *getLeader() {
157157 UserValue *getNext() const { return next; }
158158
159159 /// match - Does this UserValue match the parameters?
160 bool match(const MDNode *Var, unsigned Offset, bool indirect) const {
161 return Var == variable && Offset == offset && indirect == IsIndirect;
160 bool match(const MDNode *Var, const MDNode *Expr, unsigned Offset,
161 bool indirect) const {
162 return Var == Variable && Expr == Expression && Offset == offset &&
163 indirect == IsIndirect;
162164 }
163165
164166 /// merge - Merge equivalence classes.
306308 UVMap userVarMap;
307309
308310 /// getUserValue - Find or create a UserValue.
309 UserValue *getUserValue(const MDNode *Var, unsigned Offset,
310 bool IsIndirect, DebugLoc DL);
311 UserValue *getUserValue(const MDNode *Var, const MDNode *Expr,
312 unsigned Offset, bool IsIndirect, DebugLoc DL);
311313
312314 /// lookupVirtReg - Find the EC leader for VirtReg or null.
313315 UserValue *lookupVirtReg(unsigned VirtReg);
360362 } // namespace
361363
362364 void UserValue::print(raw_ostream &OS, const TargetMachine *TM) {
363 DIVariable DV(variable);
365 DIVariable DV(Variable);
364366 OS << "!\"";
365367 DV.printExtendedName(OS);
366368 OS << "\"\t";
421423 LDV->mapVirtReg(locations[i].getReg(), this);
422424 }
423425
424 UserValue *LDVImpl::getUserValue(const MDNode *Var, unsigned Offset,
425 bool IsIndirect, DebugLoc DL) {
426 UserValue *LDVImpl::getUserValue(const MDNode *Var, const MDNode *Expr,
427 unsigned Offset, bool IsIndirect,
428 DebugLoc DL) {
426429 UserValue *&Leader = userVarMap[Var];
427430 if (Leader) {
428431 UserValue *UV = Leader->getLeader();
429432 Leader = UV;
430433 for (; UV; UV = UV->getNext())
431 if (UV->match(Var, Offset, IsIndirect))
434 if (UV->match(Var, Expr, Offset, IsIndirect))
432435 return UV;
433436 }
434437
435438 userValues.push_back(
436 make_unique(Var, Offset, IsIndirect, DL, allocator));
439 make_unique(Var, Expr, Offset, IsIndirect, DL, allocator));
437440 UserValue *UV = userValues.back().get();
438441 Leader = UserValue::merge(Leader, UV);
439442 return UV;
453456
454457 bool LDVImpl::handleDebugValue(MachineInstr *MI, SlotIndex Idx) {
455458 // DBG_VALUE loc, offset, variable
456 if (MI->getNumOperands() != 3 ||
459 if (MI->getNumOperands() != 4 ||
457460 !(MI->getOperand(1).isReg() || MI->getOperand(1).isImm()) ||
458461 !MI->getOperand(2).isMetadata()) {
459462 DEBUG(dbgs() << "Can't handle " << *MI);
463466 // Get or create the UserValue for (variable,offset).
464467 bool IsIndirect = MI->isIndirectDebugValue();
465468 unsigned Offset = IsIndirect ? MI->getOperand(1).getImm() : 0;
466 const MDNode *Var = MI->getOperand(2).getMetadata();
469 const MDNode *Var = MI->getDebugVariable();
470 const MDNode *Expr = MI->getDebugExpression();
467471 //here.
468 UserValue *UV = getUserValue(Var, Offset, IsIndirect, MI->getDebugLoc());
472 UserValue *UV =
473 getUserValue(Var, Expr, Offset, IsIndirect, MI->getDebugLoc());
469474 UV->addDef(Idx, MI->getOperand(0));
470475 return true;
471476 }
950955
951956 if (Loc.isReg())
952957 BuildMI(*MBB, I, findDebugLoc(), TII.get(TargetOpcode::DBG_VALUE),
953 IsIndirect, Loc.getReg(), offset, variable);
958 IsIndirect, Loc.getReg(), offset, Variable, Expression);
954959 else
955960 BuildMI(*MBB, I, findDebugLoc(), TII.get(TargetOpcode::DBG_VALUE))
956 .addOperand(Loc).addImm(offset).addMetadata(variable);
961 .addOperand(Loc)
962 .addImm(offset)
963 .addMetadata(Variable)
964 .addMetadata(Expression);
957965 }
958966
959967 void UserValue::emitDebugValues(VirtRegMap *VRM, LiveIntervals &LIS,
16421642 if (isDebugValue() && MO.isMetadata()) {
16431643 // Pretty print DBG_VALUE instructions.
16441644 const MDNode *MD = MO.getMetadata();
1645 if (const MDString *MDS = dyn_cast(MD->getOperand(2)))
1646 OS << "!\"" << MDS->getString() << '\"';
1645 if (MD->getNumOperands() >= 2)
1646 if (const MDString *MDS = dyn_cast(MD->getOperand(2)))
1647 OS << "!\"" << MDS->getString() << '\"';
1648 else
1649 MO.print(OS, TM);
16471650 else
16481651 MO.print(OS, TM);
16491652 } else if (TM && (isInsertSubreg() || isRegSequence()) && MO.isImm()) {
17461749 OS << " ]";
17471750 }
17481751 }
1752 if (isIndirectDebugValue())
1753 OS << " indirect";
17491754 } else if (!debugLoc.isUnknown() && MF) {
17501755 if (!HaveSemi) OS << ";";
17511756 OS << " dbg:";
298298 LiveDbgValueMap[LRI->VirtReg];
299299 for (unsigned li = 0, le = LRIDbgValues.size(); li != le; ++li) {
300300 MachineInstr *DBG = LRIDbgValues[li];
301 const MDNode *MDPtr = DBG->getOperand(2).getMetadata();
301 const MDNode *Var = DBG->getDebugVariable();
302 const MDNode *Expr = DBG->getDebugExpression();
302303 bool IsIndirect = DBG->isIndirectDebugValue();
303304 uint64_t Offset = IsIndirect ? DBG->getOperand(1).getImm() : 0;
304305 DebugLoc DL;
310311 DL = MI->getDebugLoc();
311312 MachineInstr *NewDV =
312313 BuildMI(*MBB, MI, DL, TII->get(TargetOpcode::DBG_VALUE))
313 .addFrameIndex(FI).addImm(Offset).addMetadata(MDPtr);
314 .addFrameIndex(FI)
315 .addImm(Offset)
316 .addMetadata(Var)
317 .addMetadata(Expr);
314318 assert(NewDV->getParent() == MBB && "dangling parent pointer");
315319 (void)NewDV;
316320 DEBUG(dbgs() << "Inserting debug info due to spill:" << "\n" << *NewDV);
862866 // Modify DBG_VALUE now that the value is in a spill slot.
863867 bool IsIndirect = MI->isIndirectDebugValue();
864868 uint64_t Offset = IsIndirect ? MI->getOperand(1).getImm() : 0;
865 const MDNode *MDPtr =
866 MI->getOperand(MI->getNumOperands()-1).getMetadata();
869 const MDNode *Var = MI->getDebugVariable();
870 const MDNode *Expr = MI->getDebugExpression();
867871 DebugLoc DL = MI->getDebugLoc();
868872 MachineBasicBlock *MBB = MI->getParent();
869873 MachineInstr *NewDV = BuildMI(*MBB, MBB->erase(MI), DL,
870874 TII->get(TargetOpcode::DBG_VALUE))
871 .addFrameIndex(SS).addImm(Offset).addMetadata(MDPtr);
875 .addFrameIndex(SS)
876 .addImm(Offset)
877 .addMetadata(Var)
878 .addMetadata(Expr);
872879 DEBUG(dbgs() << "Modifying debug info due to spill:"
873880 << "\t" << *NewDV);
874881 // Scan NewDV operands from the beginning.
11241124 Op->setIsDebug(true);
11251125 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc,
11261126 TII.get(TargetOpcode::DBG_VALUE), false, Op->getReg(), 0,
1127 DI->getVariable());
1127 DI->getVariable(), DI->getExpression());
11281128 } else
11291129 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc,
11301130 TII.get(TargetOpcode::DBG_VALUE))
11311131 .addOperand(*Op)
11321132 .addImm(0)
1133 .addMetadata(DI->getVariable());
1133 .addMetadata(DI->getVariable())
1134 .addMetadata(DI->getExpression());
11341135 } else {
11351136 // We can't yet handle anything else here because it would require
11361137 // generating code, thus altering codegen because of debug info.
11491150 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, II)
11501151 .addReg(0U)
11511152 .addImm(DI->getOffset())
1152 .addMetadata(DI->getVariable());
1153 .addMetadata(DI->getVariable())
1154 .addMetadata(DI->getExpression());
11531155 } else if (const auto *CI = dyn_cast(V)) {
11541156 if (CI->getBitWidth() > 64)
11551157 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, II)
11561158 .addCImm(CI)
11571159 .addImm(DI->getOffset())
1158 .addMetadata(DI->getVariable());
1160 .addMetadata(DI->getVariable())
1161 .addMetadata(DI->getExpression());
11591162 else
11601163 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, II)
11611164 .addImm(CI->getZExtValue())
11621165 .addImm(DI->getOffset())
1163 .addMetadata(DI->getVariable());
1166 .addMetadata(DI->getVariable())
1167 .addMetadata(DI->getExpression());
11641168 } else if (const auto *CF = dyn_cast(V)) {
11651169 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, II)
11661170 .addFPImm(CF)
11671171 .addImm(DI->getOffset())
1168 .addMetadata(DI->getVariable());
1172 .addMetadata(DI->getVariable())
1173 .addMetadata(DI->getExpression());
11691174 } else if (unsigned Reg = lookUpRegForValue(V)) {
11701175 // FIXME: This does not handle register-indirect values at offset 0.
11711176 bool IsIndirect = DI->getOffset() != 0;
11721177 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, II, IsIndirect, Reg,
1173 DI->getOffset(), DI->getVariable());
1178 DI->getOffset(), DI->getVariable(), DI->getExpression());
11741179 } else {
11751180 // We can't yet handle anything else here because it would require
11761181 // generating code, thus altering codegen because of debug info.
21802185 }
21812186
21822187 return Predicate;
2183 }
2188 }
196196 StaticAllocaMap.find(AI);
197197 if (SI != StaticAllocaMap.end()) { // Check for VLAs.
198198 int FI = SI->second;
199 MMI.setVariableDbgInfo(DI->getVariable(),
199 MMI.setVariableDbgInfo(DI->getVariable(), DI->getExpression(),
200200 FI, DI->getDebugLoc());
201201 }
202202 }
648648 InstrEmitter::EmitDbgValue(SDDbgValue *SD,
649649 DenseMap &VRBaseMap) {
650650 uint64_t Offset = SD->getOffset();
651 MDNode* MDPtr = SD->getMDPtr();
651 MDNode *Var = SD->getVariable();
652 MDNode *Expr = SD->getExpression();
652653 DebugLoc DL = SD->getDebugLoc();
653654
654655 if (SD->getKind() == SDDbgValue::FRAMEIX) {
655656 // Stack address; this needs to be lowered in target-dependent fashion.
656657 // EmitTargetCodeForFrameDebugValue is responsible for allocation.
657658 return BuildMI(*MF, DL, TII->get(TargetOpcode::DBG_VALUE))
658 .addFrameIndex(SD->getFrameIx()).addImm(Offset).addMetadata(MDPtr);
659 .addFrameIndex(SD->getFrameIx())
660 .addImm(Offset)
661 .addMetadata(Var)
662 .addMetadata(Expr);
659663 }
660664 // Otherwise, we're going to create an instruction here.
661665 const MCInstrDesc &II = TII->get(TargetOpcode::DBG_VALUE);
701705 MIB.addReg(0U, RegState::Debug);
702706 }
703707
704 MIB.addMetadata(MDPtr);
708 MIB.addMetadata(Var);
709 MIB.addMetadata(Expr);
705710
706711 return &*MIB;
707712 }
4343 const Value *Const; // valid for constants
4444 unsigned FrameIx; // valid for stack objects
4545 } u;
46 MDNode *mdPtr;
46 MDNode *Var;
47 MDNode *Expr;
4748 bool IsIndirect;
4849 uint64_t Offset;
4950 DebugLoc DL;
5152 bool Invalid;
5253 public:
5354 // Constructor for non-constants.
54 SDDbgValue(MDNode *mdP, SDNode *N, unsigned R,
55 bool indir, uint64_t off, DebugLoc dl,
56 unsigned O) : mdPtr(mdP), IsIndirect(indir),
57 Offset(off), DL(dl), Order(O),
58 Invalid(false) {
55 SDDbgValue(MDNode *Var, MDNode *Expr, SDNode *N, unsigned R, bool indir,
56 uint64_t off, DebugLoc dl, unsigned O)
57 : Var(Var), Expr(Expr), IsIndirect(indir), Offset(off), DL(dl), Order(O),
58 Invalid(false) {
5959 kind = SDNODE;
6060 u.s.Node = N;
6161 u.s.ResNo = R;
6262 }
6363
6464 // Constructor for constants.
65 SDDbgValue(MDNode *mdP, const Value *C, uint64_t off, DebugLoc dl,
66 unsigned O) :
67 mdPtr(mdP), IsIndirect(false), Offset(off), DL(dl), Order(O),
68 Invalid(false) {
65 SDDbgValue(MDNode *Var, MDNode *Expr, const Value *C, uint64_t off,
66 DebugLoc dl, unsigned O)
67 : Var(Var), Expr(Expr), IsIndirect(false), Offset(off), DL(dl), Order(O),
68 Invalid(false) {
6969 kind = CONST;
7070 u.Const = C;
7171 }
7272
7373 // Constructor for frame indices.
74 SDDbgValue(MDNode *mdP, unsigned FI, uint64_t off, DebugLoc dl, unsigned O) :
75 mdPtr(mdP), IsIndirect(false), Offset(off), DL(dl), Order(O),
76 Invalid(false) {
74 SDDbgValue(MDNode *Var, MDNode *Expr, unsigned FI, uint64_t off, DebugLoc dl,
75 unsigned O)
76 : Var(Var), Expr(Expr), IsIndirect(false), Offset(off), DL(dl), Order(O),
77 Invalid(false) {
7778 kind = FRAMEIX;
7879 u.FrameIx = FI;
7980 }
8182 // Returns the kind.
8283 DbgValueKind getKind() { return kind; }
8384
84 // Returns the MDNode pointer.
85 MDNode *getMDPtr() { return mdPtr; }
85 // Returns the MDNode pointer for the variable.
86 MDNode *getVariable() { return Var; }
87
88 // Returns the MDNode pointer for the expression.
89 MDNode *getExpression() { return Expr; }
8690
8791 // Returns the SDNode* for a register ref
8892 SDNode *getSDNode() { assert (kind==SDNODE); return u.s.Node; }
57635763 /// getDbgValue - Creates a SDDbgValue node.
57645764 ///
57655765 /// SDNode
5766 SDDbgValue *
5767 SelectionDAG::getDbgValue(MDNode *MDPtr, SDNode *N, unsigned R,
5768 bool IsIndirect, uint64_t Off,
5769 DebugLoc DL, unsigned O) {
5770 return new (Allocator) SDDbgValue(MDPtr, N, R, IsIndirect, Off, DL, O);
5766 SDDbgValue *SelectionDAG::getDbgValue(MDNode *Var, MDNode *Expr, SDNode *N,
5767 unsigned R, bool IsIndirect, uint64_t Off,
5768 DebugLoc DL, unsigned O) {
5769 return new (Allocator) SDDbgValue(Var, Expr, N, R, IsIndirect, Off, DL, O);
57715770 }
57725771
57735772 /// Constant
5774 SDDbgValue *
5775 SelectionDAG::getConstantDbgValue(MDNode *MDPtr, const Value *C,
5776 uint64_t Off,
5777 DebugLoc DL, unsigned O) {
5778 return new (Allocator) SDDbgValue(MDPtr, C, Off, DL, O);
5773 SDDbgValue *SelectionDAG::getConstantDbgValue(MDNode *Var, MDNode *Expr,
5774 const Value *C, uint64_t Off,
5775 DebugLoc DL, unsigned O) {
5776 return new (Allocator) SDDbgValue(Var, Expr, C, Off, DL, O);
57795777 }
57805778
57815779 /// FrameIndex
5782 SDDbgValue *
5783 SelectionDAG::getFrameIndexDbgValue(MDNode *MDPtr, unsigned FI, uint64_t Off,
5784 DebugLoc DL, unsigned O) {
5785 return new (Allocator) SDDbgValue(MDPtr, FI, Off, DL, O);
5780 SDDbgValue *SelectionDAG::getFrameIndexDbgValue(MDNode *Var, MDNode *Expr,
5781 unsigned FI, uint64_t Off,
5782 DebugLoc DL, unsigned O) {
5783 return new (Allocator) SDDbgValue(Var, Expr, FI, Off, DL, O);
57865784 }
57875785
57885786 namespace {
61886186 I != E; ++I) {
61896187 SDDbgValue *Dbg = *I;
61906188 if (Dbg->getKind() == SDDbgValue::SDNODE) {
6191 SDDbgValue *Clone = getDbgValue(Dbg->getMDPtr(), ToNode, To.getResNo(),
6192 Dbg->isIndirect(),
6193 Dbg->getOffset(), Dbg->getDebugLoc(),
6194 Dbg->getOrder());
6189 SDDbgValue *Clone =
6190 getDbgValue(Dbg->getVariable(), Dbg->getExpression(), ToNode,
6191 To.getResNo(), Dbg->isIndirect(), Dbg->getOffset(),
6192 Dbg->getDebugLoc(), Dbg->getOrder());
61956193 ClonedDVs.push_back(Clone);
61966194 }
61976195 }
992992 DebugLoc dl = DDI.getdl();
993993 unsigned DbgSDNodeOrder = DDI.getSDNodeOrder();
994994 MDNode *Variable = DI->getVariable();
995 MDNode *Expr = DI->getExpression();
995996 uint64_t Offset = DI->getOffset();
996997 // A dbg.value for an alloca is always indirect.
997998 bool IsIndirect = isa(V) || Offset != 0;
998999 SDDbgValue *SDV;
9991000 if (Val.getNode()) {
1000 if (!EmitFuncArgumentDbgValue(V, Variable, Offset, IsIndirect, Val)) {
1001 SDV = DAG.getDbgValue(Variable, Val.getNode(),
1002 Val.getResNo(), IsIndirect,
1003 Offset, dl, DbgSDNodeOrder);
1001 if (!EmitFuncArgumentDbgValue(V, Variable, Expr, Offset, IsIndirect,
1002 Val)) {
1003 SDV = DAG.getDbgValue(Variable, Expr, Val.getNode(), Val.getResNo(),
1004 IsIndirect, Offset, dl, DbgSDNodeOrder);
10041005 DAG.AddDbgValue(SDV, Val.getNode(), false);
10051006 }
10061007 } else
46024603 /// EmitFuncArgumentDbgValue - If the DbgValueInst is a dbg_value of a function
46034604 /// argument, create the corresponding DBG_VALUE machine instruction for it now.
46044605 /// At the end of instruction selection, they will be inserted to the entry BB.
4605 bool
4606 SelectionDAGBuilder::EmitFuncArgumentDbgValue(const Value *V, MDNode *Variable,
4607 int64_t Offset, bool IsIndirect,
4608 const SDValue &N) {
4606 bool SelectionDAGBuilder::EmitFuncArgumentDbgValue(const Value *V,
4607 MDNode *Variable,
4608 MDNode *Expr, int64_t Offset,
4609 bool IsIndirect,
4610 const SDValue &N) {
46094611 const Argument *Arg = dyn_cast(V);
46104612 if (!Arg)
46114613 return false;
46574659 return false;
46584660
46594661 if (Op->isReg())
4660 FuncInfo.ArgDbgValues.push_back(BuildMI(MF, getCurDebugLoc(),
4661 TII->get(TargetOpcode::DBG_VALUE),
4662 IsIndirect,
4663 Op->getReg(), Offset, Variable));
4662 FuncInfo.ArgDbgValues.push_back(
4663 BuildMI(MF, getCurDebugLoc(), TII->get(TargetOpcode::DBG_VALUE),
4664 IsIndirect, Op->getReg(), Offset, Variable, Expr));
46644665 else
46654666 FuncInfo.ArgDbgValues.push_back(
4666 BuildMI(MF, getCurDebugLoc(), TII->get(TargetOpcode::DBG_VALUE))
4667 .addOperand(*Op).addImm(Offset).addMetadata(Variable));
4667 BuildMI(MF, getCurDebugLoc(), TII->get(TargetOpcode::DBG_VALUE))
4668 .addOperand(*Op)
4669 .addImm(Offset)
4670 .addMetadata(Variable)
4671 .addMetadata(Expr));
46684672
46694673 return true;
46704674 }
47844788 case Intrinsic::dbg_declare: {
47854789 const DbgDeclareInst &DI = cast(I);
47864790 MDNode *Variable = DI.getVariable();
4791 MDNode *Expression = DI.getExpression();
47874792 const Value *Address = DI.getAddress();
47884793 DIVariable DIVar(Variable);
47894794 assert((!DIVar || DIVar.isVariable()) &&
48194824 FrameIndexSDNode *FINode = dyn_cast(N.getNode());
48204825 if (FINode)
48214826 // Byval parameter. We have a frame index at this point.
4822 SDV = DAG.getFrameIndexDbgValue(Variable, FINode->getIndex(),
4823 0, dl, SDNodeOrder);
4827 SDV = DAG.getFrameIndexDbgValue(
4828 Variable, Expression, FINode->getIndex(), 0, dl, SDNodeOrder);
48244829 else {
48254830 // Address is an argument, so try to emit its dbg value using
48264831 // virtual register info from the FuncInfo.ValueMap.
4827 EmitFuncArgumentDbgValue(Address, Variable, 0, false, N);
4832 EmitFuncArgumentDbgValue(Address, Variable, Expression, 0, false, N);
48284833 return nullptr;
48294834 }
48304835 } else if (AI)
4831 SDV = DAG.getDbgValue(Variable, N.getNode(), N.getResNo(),
4836 SDV = DAG.getDbgValue(Variable, Expression, N.getNode(), N.getResNo(),
48324837 true, 0, dl, SDNodeOrder);
48334838 else {
48344839 // Can't do anything with other non-AI cases yet.
48414846 } else {
48424847 // If Address is an argument then try to emit its dbg value using
48434848 // virtual register info from the FuncInfo.ValueMap.
4844 if (!EmitFuncArgumentDbgValue(Address, Variable, 0, false, N)) {
4849 if (!EmitFuncArgumentDbgValue(Address, Variable, Expression, 0, false,
4850 N)) {
48454851 // If variable is pinned by a alloca in dominating bb then
48464852 // use StaticAllocaMap.
48474853 if (const AllocaInst *AI = dyn_cast(Address)) {
48494855 DenseMap::iterator SI =
48504856 FuncInfo.StaticAllocaMap.find(AI);
48514857 if (SI != FuncInfo.StaticAllocaMap.end()) {
4852 SDV = DAG.getFrameIndexDbgValue(Variable, SI->second,
4858 SDV = DAG.getFrameIndexDbgValue(Variable, Expression, SI->second,
48534859 0, dl, SDNodeOrder);
48544860 DAG.AddDbgValue(SDV, nullptr, false);
48554861 return nullptr;
48704876 return nullptr;
48714877
48724878 MDNode *Variable = DI.getVariable();
4879 MDNode *Expression = DI.getExpression();
48734880 uint64_t Offset = DI.getOffset();
48744881 const Value *V = DI.getValue();
48754882 if (!V)
48774884
48784885 SDDbgValue *SDV;
48794886 if (isa(V) || isa(V) || isa(V)) {
4880 SDV = DAG.getConstantDbgValue(Variable, V, Offset, dl, SDNodeOrder);
4887 SDV = DAG.getConstantDbgValue(Variable, Expression, V, Offset, dl,
4888 SDNodeOrder);
48814889 DAG.AddDbgValue(SDV, nullptr, false);
48824890 } else {
48834891 // Do not use getValue() in here; we don't want to generate code at
48894897 if (N.getNode()) {
48904898 // A dbg.value for an alloca is always indirect.
48914899 bool IsIndirect = isa(V) || Offset != 0;
4892 if (!EmitFuncArgumentDbgValue(V, Variable, Offset, IsIndirect, N)) {
4893 SDV = DAG.getDbgValue(Variable, N.getNode(),
4894 N.getResNo(), IsIndirect,
4895 Offset, dl, SDNodeOrder);
4900 if (!EmitFuncArgumentDbgValue(V, Variable, Expression, Offset,
4901 IsIndirect, N)) {
4902 SDV = DAG.getDbgValue(Variable, Expression, N.getNode(), N.getResNo(),
4903 IsIndirect, Offset, dl, SDNodeOrder);
48964904 DAG.AddDbgValue(SDV, N.getNode(), false);
48974905 }
48984906 } else if (!V->use_empty() ) {
790790 /// EmitFuncArgumentDbgValue - If V is an function argument then create
791791 /// corresponding DBG_VALUE machine instruction for it now. At the end of
792792 /// instruction selection, they will be inserted to the entry BB.
793 bool EmitFuncArgumentDbgValue(const Value *V, MDNode *Variable,
793 bool EmitFuncArgumentDbgValue(const Value *V, MDNode *Variable, MDNode *Expr,
794794 int64_t Offset, bool IsIndirect,
795795 const SDValue &N);
796796 };
485485 "- add if needed");
486486 MachineInstr *Def = RegInfo->getVRegDef(LDI->second);
487487 MachineBasicBlock::iterator InsertPos = Def;
488 const MDNode *Variable =
489 MI->getOperand(MI->getNumOperands()-1).getMetadata();
488 const MDNode *Variable = MI->getDebugVariable();
489 const MDNode *Expr = MI->getDebugExpression();
490490 bool IsIndirect = MI->isIndirectDebugValue();
491491 unsigned Offset = IsIndirect ? MI->getOperand(1).getImm() : 0;
492492 // Def is never a terminator here, so it is ok to increment InsertPos.
493493 BuildMI(*EntryMBB, ++InsertPos, MI->getDebugLoc(),
494 TII.get(TargetOpcode::DBG_VALUE),
495 IsIndirect,
496 LDI->second, Offset, Variable);
494 TII.get(TargetOpcode::DBG_VALUE), IsIndirect, LDI->second, Offset,
495 Variable, Expr);
497496
498497 // If this vreg is directly copied into an exported register then
499498 // that COPY instructions also need DBG_VALUE, if it is the only
512511 }
513512 if (CopyUseMI) {
514513 MachineInstr *NewMI =
515 BuildMI(*MF, CopyUseMI->getDebugLoc(),
516 TII.get(TargetOpcode::DBG_VALUE),
517 IsIndirect,
518 CopyUseMI->getOperand(0).getReg(),
519 Offset, Variable);
514 BuildMI(*MF, CopyUseMI->getDebugLoc(),
515 TII.get(TargetOpcode::DBG_VALUE), IsIndirect,
516 CopyUseMI->getOperand(0).getReg(), Offset, Variable, Expr);
520517 MachineBasicBlock::iterator Pos = CopyUseMI;
521518 EntryMBB->insertAfter(Pos, NewMI);
522519 }
1616 #include "llvm/IR/Constants.h"
1717 #include "llvm/IR/DebugInfo.h"
1818 #include "llvm/IR/DiagnosticInfo.h"
19 #include "llvm/IR/DIBuilder.h"
1920 #include "llvm/IR/Function.h"
2021 #include "llvm/IR/IRBuilder.h"
2122 #include "llvm/IR/Instruction.h"
105106 }
106107 break;
107108 }
109 case 'd': {
110 if (Name.startswith("dbg.declare") && F->arg_size() == 2) {
111 F->setName(Name + ".old");
112 NewFn = Intrinsic::getDeclaration(F->getParent(), Intrinsic::dbg_declare);
113 return true;
114 }
115 if (Name.startswith("dbg.value") && F->arg_size() == 3) {
116 F->setName(Name + ".old");
117 NewFn = Intrinsic::getDeclaration(F->getParent(), Intrinsic::dbg_value);
118 return true;
119 }
120 break;
121 }
122
108123 case 'o':
109124 // We only need to change the name to match the mangling including the
110125 // address space.
236251 bool llvm::UpgradeGlobalVariable(GlobalVariable *GV) {
237252 // Nothing to do yet.
238253 return false;
254 }
255
256 static MDNode *getNodeField(const MDNode *DbgNode, unsigned Elt) {
257 if (!DbgNode || Elt >= DbgNode->getNumOperands())
258 return nullptr;
259 return dyn_cast_or_null(DbgNode->getOperand(Elt));
260 }
261
262 static DIExpression getExpression(Value *VarOperand, Function *F) {
263 // Old-style DIVariables have an optional expression as the 8th element.
264 DIExpression Expr(getNodeField(cast(VarOperand), 8));
265 if (!Expr) {
266 DIBuilder DIB(*F->getParent());
267 Expr = DIB.createExpression();
268 }
269 return Expr;
239270 }
240271
241272 // UpgradeIntrinsicCall - Upgrade a call to an old intrinsic to be a call the
401432 }
402433
403434 std::string Name = CI->getName().str();
404 CI->setName(Name + ".old");
435 if (!Name.empty())
436 CI->setName(Name + ".old");
405437
406438 switch (NewFn->getIntrinsicID()) {
407439 default:
408440 llvm_unreachable("Unknown function for CallInst upgrade.");
409441
442 // Upgrade debug intrinsics to use an additional DIExpression argument.
443 case Intrinsic::dbg_declare: {
444 auto NewCI =
445 Builder.CreateCall3(NewFn, CI->getArgOperand(0), CI->getArgOperand(1),
446 getExpression(CI->getArgOperand(1), F), Name);
447 NewCI->setDebugLoc(CI->getDebugLoc());
448 CI->replaceAllUsesWith(NewCI);
449 CI->eraseFromParent();
450 return;
451 }
452 case Intrinsic::dbg_value: {
453 auto NewCI = Builder.CreateCall4(
454 NewFn, CI->getArgOperand(0), CI->getArgOperand(1), CI->getArgOperand(2),
455 getExpression(CI->getArgOperand(2), F), Name);
456 NewCI->setDebugLoc(CI->getDebugLoc());
457 CI->replaceAllUsesWith(NewCI);
458 CI->eraseFromParent();
459 return;
460 }
410461 case Intrinsic::ctlz:
411462 case Intrinsic::cttz:
412463 assert(CI->getNumArgOperands() == 1 &&
10411041 return RetVar;
10421042 }
10431043
1044 /// createComplexVariable - Create a new descriptor for the specified variable
1045 /// which has a complex address expression for its address.
1046 DIVariable DIBuilder::createComplexVariable(unsigned Tag, DIDescriptor Scope,
1047 StringRef Name, DIFile F,
1048 unsigned LineNo,
1049 DITypeRef Ty,
1050 ArrayRef Addr,
1051 unsigned ArgNo) {
1052 assert(Addr.size() > 0 && "complex address is empty");
1053 Value *Elts[] = {
1054 GetTagConstant(VMContext, Tag),
1055 getNonCompileUnitScope(Scope),
1056 MDString::get(VMContext, Name),
1057 F,
1058 ConstantInt::get(Type::getInt32Ty(VMContext),
1059 (LineNo | (ArgNo << 24))),
1060 Ty,
1061 Constant::getNullValue(Type::getInt32Ty(VMContext)),
1062 Constant::getNullValue(Type::getInt32Ty(VMContext)),
1063 MDNode::get(VMContext, Addr)
1064 };
1065 return DIVariable(MDNode::get(VMContext, Elts));
1044 /// createExpression - Create a new descriptor for the specified
1045 /// variable which has a complex address expression for its address.
1046 /// @param Addr An array of complex address operations.
1047 DIExpression DIBuilder::createExpression(ArrayRef Addr) {
1048 SmallVector Elts;
1049 Elts.push_back(GetTagConstant(VMContext, DW_TAG_expression));
1050 Elts.insert(Elts.end(), Addr.begin(), Addr.end());
1051 return DIExpression(MDNode::get(VMContext, Elts));
10661052 }
10671053
10681054 /// createVariablePiece - Create a descriptor to describe one part
10691055 /// of aggregate variable that is fragmented across multiple Values.
1070 DIVariable DIBuilder::createVariablePiece(DIVariable Variable,
1071 unsigned OffsetInBytes,
1072 unsigned SizeInBytes) {
1056 DIExpression DIBuilder::createPieceExpression(unsigned OffsetInBytes,
1057 unsigned SizeInBytes) {
10731058 assert(SizeInBytes > 0 && "zero-size piece");
10741059 Value *Addr[] = {
1075 ConstantInt::get(Type::getInt32Ty(VMContext), OpPiece),
1076 ConstantInt::get(Type::getInt32Ty(VMContext), OffsetInBytes),
1077 ConstantInt::get(Type::getInt32Ty(VMContext), SizeInBytes)
1078 };
1079
1080 assert((Variable->getNumOperands() == 8 || Variable.isVariablePiece()) &&
1081 "variable already has a complex address");
1082 SmallVector Elts;
1083 for (unsigned i = 0; i < 8; ++i)
1084 Elts.push_back(Variable->getOperand(i));
1085
1086 Elts.push_back(MDNode::get(VMContext, Addr));
1087 return DIVariable(MDNode::get(VMContext, Elts));
1060 GetTagConstant(VMContext, DW_TAG_expression),
1061 ConstantInt::get(Type::getInt64Ty(VMContext), dwarf::DW_OP_piece),
1062 ConstantInt::get(Type::getInt64Ty(VMContext), OffsetInBytes),
1063 ConstantInt::get(Type::getInt64Ty(VMContext), SizeInBytes)};
1064
1065 return DIExpression(MDNode::get(VMContext, Addr));
10881066 }
10891067
10901068 /// createFunction - Create a new descriptor for the specified function.
12911269
12921270 /// insertDeclare - Insert a new llvm.dbg.declare intrinsic call.
12931271 Instruction *DIBuilder::insertDeclare(Value *Storage, DIVariable VarInfo,
1272 DIExpression Expr,
12941273 Instruction *InsertBefore) {
12951274 assert(Storage && "no storage passed to dbg.declare");
12961275 assert(VarInfo.isVariable() &&
12981277 if (!DeclareFn)
12991278 DeclareFn = Intrinsic::getDeclaration(&M, Intrinsic::dbg_declare);
13001279
1301 Value *Args[] = { MDNode::get(Storage->getContext(), Storage), VarInfo };
1280 Value *Args[] = {MDNode::get(Storage->getContext(), Storage), VarInfo, Expr};
13021281 return CallInst::Create(DeclareFn, Args, "", InsertBefore);
13031282 }
13041283
13051284 /// insertDeclare - Insert a new llvm.dbg.declare intrinsic call.
13061285 Instruction *DIBuilder::insertDeclare(Value *Storage, DIVariable VarInfo,
1286 DIExpression Expr,
13071287 BasicBlock *InsertAtEnd) {
13081288 assert(Storage && "no storage passed to dbg.declare");
13091289 assert(VarInfo.isVariable() &&
13111291 if (!DeclareFn)
13121292 DeclareFn = Intrinsic::getDeclaration(&M, Intrinsic::dbg_declare);
13131293
1314 Value *Args[] = { MDNode::get(Storage->getContext(), Storage), VarInfo };
1294 Value *Args[] = {MDNode::get(Storage->getContext(), Storage), VarInfo, Expr};
13151295
13161296 // If this block already has a terminator then insert this intrinsic
13171297 // before the terminator.
13241304 /// insertDbgValueIntrinsic - Insert a new llvm.dbg.value intrinsic call.
13251305 Instruction *DIBuilder::insertDbgValueIntrinsic(Value *V, uint64_t Offset,
13261306 DIVariable VarInfo,
1307 DIExpression Expr,
13271308 Instruction *InsertBefore) {
13281309 assert(V && "no value passed to dbg.value");
13291310 assert(VarInfo.isVariable() &&
13311312 if (!ValueFn)
13321313 ValueFn = Intrinsic::getDeclaration(&M, Intrinsic::dbg_value);
13331314
1334 Value *Args[] = { MDNode::get(V->getContext(), V),
1335 ConstantInt::get(Type::getInt64Ty(V->getContext()), Offset),
1336 VarInfo };
1315 Value *Args[] = {MDNode::get(V->getContext(), V),
1316 ConstantInt::get(Type::getInt64Ty(V->getContext()), Offset),
1317 VarInfo, Expr};
13371318 return CallInst::Create(ValueFn, Args, "", InsertBefore);
13381319 }
13391320
13401321 /// insertDbgValueIntrinsic - Insert a new llvm.dbg.value intrinsic call.
13411322 Instruction *DIBuilder::insertDbgValueIntrinsic(Value *V, uint64_t Offset,
13421323 DIVariable VarInfo,
1324 DIExpression Expr,
13431325 BasicBlock *InsertAtEnd) {
13441326 assert(V && "no value passed to dbg.value");
13451327 assert(VarInfo.isVariable() &&
13471329 if (!ValueFn)
13481330 ValueFn = Intrinsic::getDeclaration(&M, Intrinsic::dbg_value);
13491331
1350 Value *Args[] = { MDNode::get(V->getContext(), V),
1351 ConstantInt::get(Type::getInt64Ty(V->getContext()), Offset),
1352 VarInfo };
1332 Value *Args[] = {MDNode::get(V->getContext(), V),
1333 ConstantInt::get(Type::getInt64Ty(V->getContext()), Offset),
1334 VarInfo, Expr};
13531335 return CallInst::Create(ValueFn, Args, "", InsertAtEnd);
13541336 }
4848 DIObjCProperty(DbgNode).Verify() ||
4949 DITemplateTypeParameter(DbgNode).Verify() ||
5050 DITemplateValueParameter(DbgNode).Verify() ||
51 DIImportedEntity(DbgNode).Verify());
51 DIImportedEntity(DbgNode).Verify() || DIExpression(DbgNode).Verify());
5252 }
5353
5454 static Value *getField(const MDNode *DbgNode, unsigned Elt) {
137137 }
138138 }
139139
140 uint64_t DIVariable::getAddrElement(unsigned Idx) const {
141 DIDescriptor ComplexExpr = getDescriptorField(8);
142 if (Idx < ComplexExpr->getNumOperands())
143 if (auto *CI = dyn_cast_or_null(ComplexExpr->getOperand(Idx)))
144 return CI->getZExtValue();
145
146 assert(false && "non-existing complex address element requested");
147 return 0;
148 }
149
150140 /// getInlinedAt - If this variable is inlined then return inline location.
151141 MDNode *DIVariable::getInlinedAt() const { return getNodeField(DbgNode, 7); }
152
153 bool DIVariable::isVariablePiece() const {
154 return hasComplexAddress() && getAddrElement(0) == DIBuilder::OpPiece;
155 }
156
157 uint64_t DIVariable::getPieceOffset() const {
158 assert(isVariablePiece());
159 return getAddrElement(1);
160 }
161
162 uint64_t DIVariable::getPieceSize() const {
163 assert(isVariablePiece());
164 return getAddrElement(2);
165 }
166142
167143 /// Return the size reported by the variable's type.
168144 unsigned DIVariable::getSizeInBits(const DITypeIdentifierMap &Map) {
177153 return Ty.getSizeInBits();
178154 }
179155
180
181
156 uint64_t DIExpression::getElement(unsigned Idx) const {
157 unsigned I = Idx + 1;
158 if (I < DbgNode->getNumOperands())
159 if (auto *CI = dyn_cast_or_null(DbgNode->getOperand(I)))
160 return CI->getZExtValue();
161
162 assert(false && "non-existing complex address element requested");
163 return 0;
164 }
165
166 bool DIExpression::isVariablePiece() const {
167 return getNumElements() && getElement(0) == dwarf::DW_OP_piece;
168 }
169
170 uint64_t DIExpression::getPieceOffset() const {
171 assert(isVariablePiece());
172 return getElement(1);
173 }
174
175 uint64_t DIExpression::getPieceSize() const {
176 assert(isVariablePiece());
177 return getElement(2);
178 }
182179
183180 //===----------------------------------------------------------------------===//
184181 // Predicates
356353 getTag() == dwarf::DW_TAG_imported_declaration);
357354 }
358355
356 /// \brief Return true if the specified tag is DW_TAG_imported_module or
357 /// DW_TAG_imported_declaration.
358 bool DIDescriptor::isExpression() const {
359 return DbgNode && (getTag() == dwarf::DW_TAG_expression);
360 }
361
359362 //===----------------------------------------------------------------------===//
360363 // Simple Descriptor Constructors and other Methods
361364 //===----------------------------------------------------------------------===//
595598 if (!fieldIsTypeRef(DbgNode, 5))
596599 return false;
597600
598 // Variable without a complex expression.
599 if (DbgNode->getNumOperands() == 8)
601 // Variable without an inline location.
602 if (DbgNode->getNumOperands() == 7)
600603 return true;
601604
602 // Make sure the complex expression is an MDNode.
603 return (DbgNode->getNumOperands() == 9 && fieldIsMDNode(DbgNode, 8));
605 return DbgNode->getNumOperands() == 8;
606 }
607
608 /// Verify - Verify that a variable descriptor is well formed.
609 bool DIExpression::Verify() const {
610 // Empty DIExpressions may be represented as a nullptr.
611 if (!DbgNode)
612 return true;
613
614 return isExpression();
604615 }
605616
606617 /// Verify - Verify that a location descriptor is well formed.
933944 i == 7 ? Elts.push_back(Constant::getNullValue(Type::getInt32Ty(VMContext)))
934945 : Elts.push_back(DV->getOperand(i));
935946 return DIVariable(MDNode::get(VMContext, Elts));
936 }
937
938
939 /// getEntireVariable - Remove OpPiece exprs from the variable.
940 DIVariable llvm::getEntireVariable(DIVariable DV) {
941 if (!DV.isVariablePiece())
942 return DV;
943
944 SmallVector Elts;
945 for (unsigned i = 0; i < 8; ++i)
946 Elts.push_back(DV->getOperand(i));
947
948 return DIVariable(MDNode::get(DV->getContext(), Elts));
949947 }
950948
951949 /// getDISubprogram - Find subprogram that is enclosing this scope.
12921290 DINameSpace(DbgNode).printInternal(OS);
12931291 } else if (this->isScope()) {
12941292 DIScope(DbgNode).printInternal(OS);
1293 } else if (this->isExpression()) {
1294 DIExpression(DbgNode).printInternal(OS);
12951295 }
12961296 }
12971297
14411441 OS << " [" << Res << ']';
14421442
14431443 OS << " [line " << getLineNumber() << ']';
1444
1445 if (isVariablePiece())
1446 OS << " [piece, size " << getPieceSize()
1447 << ", offset " << getPieceOffset() << ']';
1444 }
1445
1446 void DIExpression::printInternal(raw_ostream &OS) const {
1447 for (unsigned I = 0; I < getNumElements(); ++I) {
1448 uint64_t OpCode = getElement(I);
1449 OS << " [" << OperationEncodingString(OpCode);
1450 switch (OpCode) {
1451 case DW_OP_plus: {
1452 OS << " " << getElement(++I);
1453 break;
1454 }
1455 case DW_OP_piece: {
1456 unsigned Offset = getElement(++I);
1457 unsigned Size = getElement(++I);
1458 OS << " offset=" << Offset << ", size= " << Size;
1459 break;
1460 }
1461 default:
1462 break;
1463 }
1464 OS << "]";
1465 }
14481466 }
14491467
14501468 void DIObjCProperty::printInternal(raw_ostream &OS) const {
8181 case DW_TAG_hi_user: return "DW_TAG_hi_user";
8282 case DW_TAG_auto_variable: return "DW_TAG_auto_variable";
8383 case DW_TAG_arg_variable: return "DW_TAG_arg_variable";
84 case DW_TAG_expression: return "DW_TAG_expression";
8485 case DW_TAG_rvalue_reference_type: return "DW_TAG_rvalue_reference_type";
8586 case DW_TAG_template_alias: return "DW_TAG_template_alias";
8687 case DW_TAG_coarray_type: return "DW_TAG_coarray_type";
14431443 }
14441444 }
14451445
1446 MachineInstr *AArch64InstrInfo::emitFrameIndexDebugValue(MachineFunction &MF,
1447 int FrameIx,
1448 uint64_t Offset,
1449 const MDNode *MDPtr,
1450 DebugLoc DL) const {
1446 MachineInstr *AArch64InstrInfo::emitFrameIndexDebugValue(
1447 MachineFunction &MF, int FrameIx, uint64_t Offset, const MDNode *Var,
1448 const MDNode *Expr, DebugLoc DL) const {
14511449 MachineInstrBuilder MIB = BuildMI(MF, DL, get(AArch64::DBG_VALUE))
14521450 .addFrameIndex(FrameIx)
14531451 .addImm(0)
14541452 .addImm(Offset)
1455 .addMetadata(MDPtr);
1453 .addMetadata(Var)
1454 .addMetadata(Expr);
14561455 return &*MIB;
14571456 }
14581457
106106 MachineInstr *Second) const override;
107107
108108 MachineInstr *emitFrameIndexDebugValue(MachineFunction &MF, int FrameIx,
109 uint64_t Offset, const MDNode *MDPtr,
110 DebugLoc DL) const;
109 uint64_t Offset, const MDNode *Var,
110 const MDNode *Expr, DebugLoc DL) const;
111111 void copyPhysRegTuple(MachineBasicBlock &MBB, MachineBasicBlock::iterator I,
112112 DebugLoc DL, unsigned DestReg, unsigned SrcReg,
113113 bool KillSrc, unsigned Opcode,
22482248 const MCInstrDesc &II = TII.get(TargetOpcode::DBG_VALUE);
22492249 // FIXME may need to add RegState::Debug to any registers produced,
22502250 // although ESP/EBP should be the only ones at the moment.
2251 addFullAddress(BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, II), AM).
2252 addImm(0).addMetadata(DI->getVariable());
2251 addFullAddress(BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, II), AM)
2252 .addImm(0)
2253 .addMetadata(DI->getVariable())
2254 .addMetadata(DI->getExpression());
22532255 return true;
22542256 }
22552257 case Intrinsic::trap: {
890890 continue;
891891 }
892892 Instruction *DbgVal =
893 DIB.insertDbgValueIntrinsic(Arg, 0, DIVariable(DVI->getVariable()),
894 Inst);
893 DIB.insertDbgValueIntrinsic(Arg, 0, DIVariable(DVI->getVariable()),
894 DIExpression(DVI->getExpression()), Inst);
895895 DbgVal->setDebugLoc(DVI->getDebugLoc());
896896 }
897897 }
11231123 } else {
11241124 continue;
11251125 }
1126 Instruction *DbgVal =
1127 DIB->insertDbgValueIntrinsic(Arg, 0, DIVariable(DVI->getVariable()),
1128 Inst);
1126 Instruction *DbgVal = DIB->insertDbgValueIntrinsic(
1127 Arg, 0, DIVariable(DVI->getVariable()),
1128 DIExpression(DVI->getExpression()), Inst);
11291129 DbgVal->setDebugLoc(DVI->getDebugLoc());
11301130 }
11311131 }
992992 bool llvm::ConvertDebugDeclareToDebugValue(DbgDeclareInst *DDI,
993993 StoreInst *SI, DIBuilder &Builder) {
994994 DIVariable DIVar(DDI->getVariable());
995 DIExpression DIExpr(DDI->getExpression());
995996 assert((!DIVar || DIVar.isVariable()) &&
996997 "Variable in DbgDeclareInst should be either null or a DIVariable.");
997998 if (!DIVar)
10091010 if (SExtInst *SExt = dyn_cast(SI->getOperand(0)))
10101011 ExtendedArg = dyn_cast(SExt->getOperand(0));
10111012 if (ExtendedArg)
1012 DbgVal = Builder.insertDbgValueIntrinsic(ExtendedArg, 0, DIVar, SI);
1013 DbgVal = Builder.insertDbgValueIntrinsic(ExtendedArg, 0, DIVar, DIExpr, SI);
10131014 else
1014 DbgVal = Builder.insertDbgValueIntrinsic(SI->getOperand(0), 0, DIVar, SI);
1015 DbgVal = Builder.insertDbgValueIntrinsic(SI->getOperand(0), 0, DIVar,
1016 DIExpr, SI);
10151017 DbgVal->setDebugLoc(DDI->getDebugLoc());
10161018 return true;
10171019 }
10211023 bool llvm::ConvertDebugDeclareToDebugValue(DbgDeclareInst *DDI,
10221024 LoadInst *LI, DIBuilder &Builder) {
10231025 DIVariable DIVar(DDI->getVariable());
1026 DIExpression DIExpr(DDI->getExpression());
10241027 assert((!DIVar || DIVar.isVariable()) &&
10251028 "Variable in DbgDeclareInst should be either null or a DIVariable.");
10261029 if (!DIVar)
10301033 return true;
10311034
10321035 Instruction *DbgVal =
1033 Builder.insertDbgValueIntrinsic(LI->getOperand(0), 0,
1034 DIVar, LI);
1036 Builder.insertDbgValueIntrinsic(LI->getOperand(0), 0, DIVar, DIExpr, LI);
10351037 DbgVal->setDebugLoc(DDI->getDebugLoc());
10361038 return true;
10371039 }
10741076 // This is a call by-value or some other instruction that
10751077 // takes a pointer to the variable. Insert a *value*
10761078 // intrinsic that describes the alloca.
1077 auto DbgVal =
1078 DIB.insertDbgValueIntrinsic(AI, 0,
1079 DIVariable(DDI->getVariable()), CI);
1080 DbgVal->setDebugLoc(DDI->getDebugLoc());
1081 }
1079 auto DbgVal = DIB.insertDbgValueIntrinsic(
1080 AI, 0, DIVariable(DDI->getVariable()),
1081 DIExpression(DDI->getExpression()), CI);
1082 DbgVal->setDebugLoc(DDI->getDebugLoc());
1083 }
10821084 DDI->eraseFromParent();
10831085 }
10841086 }
11021104 if (!DDI)
11031105 return false;
11041106 DIVariable DIVar(DDI->getVariable());
1107 DIExpression DIExpr(DDI->getExpression());
11051108 assert((!DIVar || DIVar.isVariable()) &&
11061109 "Variable in DbgDeclareInst should be either null or a DIVariable.");
11071110 if (!DIVar)
11121115 // will take a value storing address of the memory for variable, not
11131116 // alloca itself.
11141117 Type *Int64Ty = Type::getInt64Ty(AI->getContext());
1115 SmallVector NewDIVarAddress;
1116 if (DIVar.hasComplexAddress()) {
1117 for (unsigned i = 0, n = DIVar.getNumAddrElements(); i < n; ++i) {
1118 NewDIVarAddress.push_back(
1119 ConstantInt::get(Int64Ty, DIVar.getAddrElement(i)));
1120 }
1121 }
1122 NewDIVarAddress.push_back(ConstantInt::get(Int64Ty, DIBuilder::OpDeref));
1123 DIVariable NewDIVar = Builder.createComplexVariable(
1124 DIVar.getTag(), DIVar.getContext(), DIVar.getName(),
1125 DIVar.getFile(), DIVar.getLineNumber(), DIVar.getType(),
1126 NewDIVarAddress, DIVar.getArgNumber());
1118 SmallVector NewDIExpr;
1119 if (DIExpr) {
1120 for (unsigned i = 0, n = DIExpr.getNumElements(); i < n; ++i) {
1121 NewDIExpr.push_back(ConstantInt::get(Int64Ty, DIExpr.getElement(i)));
1122 }
1123 }
1124 NewDIExpr.push_back(ConstantInt::get(Int64Ty, dwarf::DW_OP_deref));
11271125
11281126 // Insert llvm.dbg.declare in the same basic block as the original alloca,
11291127 // and remove old llvm.dbg.declare.
11301128 BasicBlock *BB = AI->getParent();
1131 Builder.insertDeclare(NewAllocaAddress, NewDIVar, BB);
1129 Builder.insertDeclare(NewAllocaAddress, DIVar,
1130 Builder.createExpression(NewDIExpr), BB);
11321131 DDI->eraseFromParent();
11331132 return true;
11341133 }
2525
2626 define void @bar2(i32* %foo) {
2727 store i32 0, i32* %foo, align 4
28 tail call void @llvm.dbg.value(metadata !{}, i64 0, metadata !{})
28 tail call void @llvm.dbg.value(metadata !{}, i64 0, metadata !{}, metadata !{})
2929 ret void
3030 }
3131
32 declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone
32 declare void @llvm.dbg.value(metadata, i64, metadata, metadata) nounwind readnone
1111
1212 define i32 @main() nounwind readonly {
1313 %diff1 = alloca i64 ; [#uses=2]
14 call void @llvm.dbg.declare(metadata !{i64* %diff1}, metadata !0)
14 call void @llvm.dbg.declare(metadata !{i64* %diff1}, metadata !0, metadata !{i32 786690})
1515 store i64 72, i64* %diff1, align 8
1616 %v1 = load %struct.test** @TestArrayPtr, align 8 ; <%struct.test*> [#uses=1]
1717 %v2 = ptrtoint %struct.test* %v1 to i64 ; [#uses=1]
2020 ret i32 4
2121 }
2222
23 declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone
23 declare void @llvm.dbg.declare(metadata, metadata, metadata) nounwind readnone
2424
2525 !7 = metadata !{metadata !1}
2626 !6 = metadata !{i32 786449, metadata !8, i32 12, metadata !"clang version 3.0 (trunk 131941)", i1 true, metadata !"", i32 0, metadata !9, metadata !9, metadata !7, null, null, metadata !""} ; [ DW_TAG_compile_unit ]
22
33 define void @Foo(i32 %a, i32 %b) {
44 entry:
5 call void @llvm.dbg.value(metadata !{ i32* %1 }, i64 16, metadata !2)
6 ; CHECK: call void @llvm.dbg.value(metadata !{i32* %1}, i64 16, metadata ![[ID2:[0-9]+]])
5 call void @llvm.dbg.value(metadata !{ i32* %1 }, i64 16, metadata !2, metadata !{i32 786690})
6 ; CHECK: call void @llvm.dbg.value(metadata !{i32* %1}, i64 16, metadata ![[ID2:[0-9]+]], metadata {{.*}})
77 %0 = add i32 %a, 1 ; [#uses=1]
88 %two = add i32 %b, %0 ; [#uses=0]
99 %1 = alloca i32 ; [#uses=1]
1010
11 call void @llvm.dbg.declare(metadata !{i32* %1}, metadata !{i32* %1})
12 ; CHECK: metadata !{i32* %1}, metadata !{i32* %1}
13 call void @llvm.dbg.declare(metadata !{i32 %two}, metadata !{i32 %0})
14 ; CHECK: metadata !{i32 %two}, metadata !{i32 %0}
15 call void @llvm.dbg.declare(metadata !{i32 %0}, metadata !{i32* %1, i32 %0})
16 ; CHECK: metadata !{i32 %0}, metadata !{i32* %1, i32 %0}
17 call void @llvm.dbg.declare(metadata !{i32* %1}, metadata !{i32 %b, i32 %0})
18 ; CHECK: metadata !{i32* %1}, metadata !{i32 %b, i32 %0}
19 call void @llvm.dbg.declare(metadata !{i32 %a}, metadata !{i32 %a, metadata !"foo"})
20 ; CHECK: metadata !{i32 %a}, metadata !{i32 %a, metadata !"foo"}
21 call void @llvm.dbg.declare(metadata !{i32 %b}, metadata !{metadata !0, i32 %two})
22 ; CHECK: metadata !{i32 %b}, metadata !{metadata ![[ID0:[0-9]+]], i32 %two}
11 call void @llvm.dbg.declare(metadata !{i32* %1}, metadata !{i32* %1}, metadata !{i32 786690})
12 ; CHECK: call void @llvm.dbg.declare(metadata !{i32* %1}, metadata !{i32* %1}, metadata {{.*}})
13 call void @llvm.dbg.declare(metadata !{i32 %two}, metadata !{i32 %0}, metadata !{i32 786690})
14 ; CHECK: call void @llvm.dbg.declare(metadata !{i32 %two}, metadata !{i32 %0}, metadata {{.*}})
15 call void @llvm.dbg.declare(metadata !{i32 %0}, metadata !{i32* %1, i32 %0}, metadata !{i32 786690})
16 ; CHECK: call void @llvm.dbg.declare(metadata !{i32 %0}, metadata !{i32* %1, i32 %0}, metadata {{.*}})
17 call void @llvm.dbg.declare(metadata !{i32* %1}, metadata !{i32 %b, i32 %0}, metadata !{i32 786690})
18 ; CHECK: call void @llvm.dbg.declare(metadata !{i32* %1}, metadata !{i32 %b, i32 %0}, metadata {{.*}})
19 call void @llvm.dbg.declare(metadata !{i32 %a}, metadata !{i32 %a, metadata !"foo"}, metadata !{i32 786690})
20 ; CHECK: call void @llvm.dbg.declare(metadata !{i32 %a}, metadata !{i32 %a, metadata !"foo"}, metadata {{.*}})
21 call void @llvm.dbg.declare(metadata !{i32 %b}, metadata !{metadata !0, i32 %two}, metadata !{i32 786690})
22 ; CHECK: call void @llvm.dbg.declare(metadata !{i32 %b}, metadata !{metadata ![[ID0:[0-9]+]], i32 %two}, metadata {{.*}})
2323
24 call void @llvm.dbg.value(metadata !{ i32 %a }, i64 0, metadata !1)
25 ; CHECK: metadata !{i32 %a}, i64 0, metadata ![[ID1:[0-9]+]]
26 call void @llvm.dbg.value(metadata !{ i32 %0 }, i64 25, metadata !0)
27 ; CHECK: metadata !{i32 %0}, i64 25, metadata ![[ID0]]
28 call void @llvm.dbg.value(metadata !{ i32* %1 }, i64 16, metadata !3)
29 ; CHECK: call void @llvm.dbg.value(metadata !{i32* %1}, i64 16, metadata ![[ID3:[0-9]+]])
30 call void @llvm.dbg.value(metadata !3, i64 12, metadata !2)
31 ; CHECK: metadata ![[ID3]], i64 12, metadata ![[ID2]]
24 call void @llvm.dbg.value(metadata !{ i32 %a }, i64 0, metadata !1, metadata !{i32 786690})
25 ; CHECK: call void @llvm.dbg.value(metadata !{i32 %a}, i64 0, metadata ![[ID1:[0-9]+]], metadata {{.*}})
26 call void @llvm.dbg.value(metadata !{ i32 %0 }, i64 25, metadata !0, metadata !{i32 786690})
27 ; CHECK: call void @llvm.dbg.value(metadata !{i32 %0}, i64 25, metadata ![[ID0]], metadata {{.*}})
28 call void @llvm.dbg.value(metadata !{ i32* %1 }, i64 16, metadata !3, metadata !{i32 786690})
29 ; CHECK: call void @llvm.dbg.value(metadata !{i32* %1}, i64 16, metadata ![[ID3:[0-9]+]], metadata {{.*}})
30 call void @llvm.dbg.value(metadata !3, i64 12, metadata !2, metadata !{i32 786690})
31 ; CHECK: call void @llvm.dbg.value(metadata ![[ID3]], i64 12, metadata ![[ID2]], metadata {{.*}})
3232
3333 ret void, !foo !0, !bar !1
3434 ; CHECK: ret void, !foo ![[FOO:[0-9]+]], !bar ![[BAR:[0-9]+]]
4242 !3 = metadata !{metadata !"foo"}
4343 !4 = metadata !{i32 1, metadata !"Debug Info Version", i32 1}
4444
45 declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone
46 declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone
45 declare void @llvm.dbg.declare(metadata, metadata, metadata) nounwind readnone
46 declare void @llvm.dbg.value(metadata, i64, metadata, metadata) nounwind readnone
4747
4848 !foo = !{ !0 }
4949 !bar = !{ !1 }
1515 %add53 = add nsw i64 %n1, 0, !dbg !52
1616 %add55 = add nsw i64 %n1, 0, !dbg !53
1717 %mul63 = mul nsw i64 %add53, -20995, !dbg !54
18 tail call void @llvm.dbg.value(metadata !{i64 %mul63}, i64 0, metadata !30), !dbg !55
18 tail call void @llvm.dbg.value(metadata !{i64 %mul63}, i64 0, metadata !30, metadata !{i32 786690}), !dbg !55
1919 %mul65 = mul nsw i64 %add55, -3196, !dbg !56
2020 %add67 = add nsw i64 0, %mul65, !dbg !57
2121 %add80 = add i64 0, 1024, !dbg !58
3434 }
3535
3636 ; Function Attrs: nounwind readnone
37 declare void @llvm.dbg.value(metadata, i64, metadata) #1
37 declare void @llvm.dbg.value(metadata, i64, metadata, metadata) #1
3838
3939 attributes #0 = { nounwind "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" }
4040 attributes #1 = { nounwind readnone }
1010 unreachable
1111
1212 if.else295: ; preds = %entry
13 call void @llvm.dbg.declare(metadata !{i32* %do_tab_convert}, metadata !16), !dbg !18
13 call void @llvm.dbg.declare(metadata !{i32* %do_tab_convert}, metadata !16, metadata !{i32 786690}), !dbg !18
1414 store i32 0, i32* %do_tab_convert, align 4, !dbg !19
1515 unreachable
1616 }
1717
18 declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone
18 declare void @llvm.dbg.declare(metadata, metadata, metadata) nounwind readnone
1919
2020 !llvm.dbg.gv = !{!0}
2121 !llvm.dbg.sp = !{!1, !7, !10, !11, !12}
88 br label %do.body, !dbg !0
99
1010 do.body: ; preds = %entry
11 call void @llvm.dbg.declare(metadata !{i32* %count_}, metadata !4)
11 call void @llvm.dbg.declare(metadata !{i32* %count_}, metadata !4, metadata !{i32 786690})
1212 %conv = ptrtoint i32* %count_ to i32, !dbg !0 ; [#uses=1]
1313 %call = call i32 @foo(i32 %conv) ssp, !dbg !0 ; [#uses=0]
1414 br label %do.end, !dbg !0
1717 ret void, !dbg !7
1818 }
1919
20 declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone
20 declare void @llvm.dbg.declare(metadata, metadata, metadata) nounwind readnone
2121
2222 declare i32 @foo(i32) ssp
2323
44
55 define hidden i32 @__addvsi3(i32 %a, i32 %b) nounwind {
66 entry:
7 tail call void @llvm.dbg.value(metadata !{i32 %b}, i64 0, metadata !0)
7 tail call void @llvm.dbg.value(metadata !{i32 %b}, i64 0, metadata !0, metadata !{i32 786690})
88 %0 = add nsw i32 %b, %a, !dbg !9 ; [#uses=1]
99 ret i32 %0, !dbg !11
1010 }
1111
12 declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone
12 declare void @llvm.dbg.value(metadata, i64, metadata, metadata) nounwind readnone
1313
1414 !llvm.dbg.cu = !{!3}
1515 !llvm.module.flags = !{!15}
66
77 define void @x0(i8* nocapture %buf, i32 %nbytes) nounwind optsize {
88 entry:
9 tail call void @llvm.dbg.value(metadata !{i8* %buf}, i64 0, metadata !0), !dbg !15
10 tail call void @llvm.dbg.value(metadata !{i32 %nbytes}, i64 0, metadata !8), !dbg !16
9 tail call void @llvm.dbg.value(metadata !{i8* %buf}, i64 0, metadata !0, metadata !{i32 786690}), !dbg !15
10 tail call void @llvm.dbg.value(metadata !{i32 %nbytes}, i64 0, metadata !8, metadata !{i32 786690}), !dbg !16
1111 %tmp = load i32* @length, !dbg !17 ; [#uses=3]
1212 %cmp = icmp eq i32 %tmp, -1, !dbg !17 ; [#uses=1]
1313 %cmp.not = xor i1 %cmp, true ; [#uses=1]
1414 %cmp3 = icmp ult i32 %tmp, %nbytes, !dbg !17 ; [#uses=1]
1515 %or.cond = and i1 %cmp.not, %cmp3 ; [#uses=1]
16 tail call void @llvm.dbg.value(metadata !{i32 %tmp}, i64 0, metadata !8), !dbg !17
16 tail call void @llvm.dbg.value(metadata !{i32 %tmp}, i64 0, metadata !8, metadata !{i32 786690}), !dbg !17
1717 %nbytes.addr.0 = select i1 %or.cond, i32 %tmp, i32 %nbytes ; [#uses=1]
18 tail call void @llvm.dbg.value(metadata !18, i64 0, metadata !10), !dbg !19
18 tail call void @llvm.dbg.value(metadata !18, i64 0, metadata !10, metadata !{i32 786690}), !dbg !19
1919 br label %while.cond, !dbg !20
2020
2121 while.cond: ; preds = %while.body, %entry
4141
4242 declare i32 @x1() optsize
4343
44 declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone
44 declare void @llvm.dbg.value(metadata, i64, metadata, metadata) nounwind readnone
4545
4646 !llvm.dbg.lv.fn = !{!0, !8, !10, !12}
4747 !llvm.dbg.gv = !{!14}
55 define i32 @_Z3fooi4SVal(i32 %i, %struct.SVal* noalias %location) nounwind ssp {
66 entry:
77 %"alloca point" = bitcast i32 0 to i32 ; [#uses=0]
8 call void @llvm.dbg.value(metadata !{i32 %i}, i64 0, metadata !23), !dbg !24
9 call void @llvm.dbg.value(metadata !{%struct.SVal* %location}, i64 0, metadata !25), !dbg !24
8 call void @llvm.dbg.value(metadata !{i32 %i}, i64 0, metadata !23, metadata !{i32 786690}), !dbg !24
9 call void @llvm.dbg.value(metadata !{%struct.SVal* %location}, i64 0, metadata !25, metadata !{i32 786690}), !dbg !24
1010 %0 = icmp ne i32 %i, 0, !dbg !27 ; [#uses=1]
1111 br i1 %0, label %bb, label %bb1, !dbg !27
1212
3333 define linkonce_odr void @_ZN4SValC1Ev(%struct.SVal* %this) nounwind ssp align 2 {
3434 entry:
3535 %"alloca point" = bitcast i32 0 to i32 ; [#uses=0]
36 call void @llvm.dbg.value(metadata !{%struct.SVal* %this}, i64 0, metadata !31), !dbg !34
36 call void @llvm.dbg.value(metadata !{%struct.SVal* %this}, i64 0, metadata !31, metadata !{i32 786690}), !dbg !34
3737 %0 = getelementptr inbounds %struct.SVal* %this, i32 0, i32 0, !dbg !34 ; [#uses=1]
3838 store i8* null, i8** %0, align 8, !dbg !34
3939 %1 = getelementptr inbounds %struct.SVal* %this, i32 0, i32 1, !dbg !34 ; [#uses=1]
4444 ret void, !dbg !35
4545 }
4646
47 declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone
47 declare void @llvm.dbg.declare(metadata, metadata, metadata) nounwind readnone
4848
4949 define i32 @main() nounwind ssp {
5050 entry:
5151 %0 = alloca %struct.SVal ; <%struct.SVal*> [#uses=3]
5252 %v = alloca %struct.SVal ; <%struct.SVal*> [#uses=4]
5353 %"alloca point" = bitcast i32 0 to i32 ; [#uses=0]
54 call void @llvm.dbg.declare(metadata !{%struct.SVal* %v}, metadata !38), !dbg !41
54 call void @llvm.dbg.declare(metadata !{%struct.SVal* %v}, metadata !38, metadata !{i32 786690}), !dbg !41
5555 call void @_ZN4SValC1Ev(%struct.SVal* %v) nounwind, !dbg !41
5656 %1 = getelementptr inbounds %struct.SVal* %v, i32 0, i32 1, !dbg !42 ; [#uses=1]
5757 store i32 1, i32* %1, align 8, !dbg !42
6464 %7 = load i32* %6, align 8, !dbg !43 ; [#uses=1]
6565 store i32 %7, i32* %5, align 8, !dbg !43
6666 %8 = call i32 @_Z3fooi4SVal(i32 2, %struct.SVal* noalias %0) nounwind, !dbg !43 ; [#uses=0]
67 call void @llvm.dbg.value(metadata !{i32 %8}, i64 0, metadata !44), !dbg !43
67 call void @llvm.dbg.value(metadata !{i32 %8}, i64 0, metadata !44, metadata !{i32 786690}), !dbg !43
6868 br label %return, !dbg !45
6969
7070 return: ; preds = %entry
7171 ret i32 0, !dbg !45
7272 }
7373
74 declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone
74 declare void @llvm.dbg.value(metadata, i64, metadata, metadata) nounwind readnone
7575
7676 !llvm.dbg.cu = !{!3}
7777 !llvm.module.flags = !{!49}
2929
3030 define zeroext i8 @get1(i8 zeroext %a) nounwind optsize {
3131 entry:
32 tail call void @llvm.dbg.value(metadata !{i8 %a}, i64 0, metadata !10), !dbg !30
32 tail call void @llvm.dbg.value(metadata !{i8 %a}, i64 0, metadata !10, metadata !{i32 786690}), !dbg !30
3333 %0 = load i8* @x1, align 4, !dbg !30
34 tail call void @llvm.dbg.value(metadata !{i8 %0}, i64 0, metadata !11), !dbg !30
34 tail call void @llvm.dbg.value(metadata !{i8 %0}, i64 0, metadata !11, metadata !{i32 786690}), !dbg !30
3535 store i8 %a, i8* @x1, align 4, !dbg !30
3636 ret i8 %0, !dbg !31
3737 }
3838
39 declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone
39 declare void @llvm.dbg.value(metadata, i64, metadata, metadata) nounwind readnone
4040
4141 define zeroext i8 @get2(i8 zeroext %a) nounwind optsize {
4242 entry:
43 tail call void @llvm.dbg.value(metadata !{i8 %a}, i64 0, metadata !18), !dbg !32
43 tail call void @llvm.dbg.value(metadata !{i8 %a}, i64 0, metadata !18, metadata !{i32 786690}), !dbg !32
4444 %0 = load i8* @x2, align 4, !dbg !32
45 tail call void @llvm.dbg.value(metadata !{i8 %0}, i64 0, metadata !19), !dbg !32
45 tail call void @llvm.dbg.value(metadata !{i8 %0}, i64 0, metadata !19, metadata !{i32 786690}), !dbg !32
4646 store i8 %a, i8* @x2, align 4, !dbg !32
4747 ret i8 %0, !dbg !33
4848 }
4949
5050 define zeroext i8 @get3(i8 zeroext %a) nounwind optsize {
5151 entry:
52 tail call void @llvm.dbg.value(metadata !{i8 %a}, i64 0, metadata !21), !dbg !34
52 tail call void @llvm.dbg.value(metadata !{i8 %a}, i64 0, metadata !21, metadata !{i32 786690}), !dbg !34
5353 %0 = load i8* @x3, align 4, !dbg !34
54 tail call void @llvm.dbg.value(metadata !{i8 %0}, i64 0, metadata !22), !dbg !34
54 tail call void @llvm.dbg.value(metadata !{i8 %0}, i64 0, metadata !22, metadata !{i32 786690}), !dbg !34
5555 store i8 %a, i8* @x3, align 4, !dbg !34
5656 ret i8 %0, !dbg !35
5757 }
5858
5959 define zeroext i8 @get4(i8 zeroext %a) nounwind optsize {
6060 entry:
61 tail call void @llvm.dbg.value(metadata !{i8 %a}, i64 0, metadata !24), !dbg !36
61 tail call void @llvm.dbg.value(metadata !{i8 %a}, i64 0, metadata !24, metadata !{i32 786690}), !dbg !36
6262 %0 = load i8* @x4, align 4, !dbg !36
63 tail call void @llvm.dbg.value(metadata !{i8 %0}, i64 0, metadata !25), !dbg !36
63 tail call void @llvm.dbg.value(metadata !{i8 %0}, i64 0, metadata !25, metadata !{i32 786690}), !dbg !36
6464 store i8 %a, i8* @x4, align 4, !dbg !36
6565 ret i8 %0, !dbg !37
6666 }
6767
6868 define zeroext i8 @get5(i8 zeroext %a) nounwind optsize {
6969 entry:
70 tail call void @llvm.dbg.value(metadata !{i8 %a}, i64 0, metadata !27), !dbg !38
70 tail call void @llvm.dbg.value(metadata !{i8 %a}, i64 0, metadata !27, metadata !{i32 786690}), !dbg !38
7171 %0 = load i8* @x5, align 4, !dbg !38
72 tail call void @llvm.dbg.value(metadata !{i8 %0}, i64 0, metadata !28), !dbg !38
72 tail call void @llvm.dbg.value(metadata !{i8 %0}, i64 0, metadata !28, metadata !{i32 786690}), !dbg !38
7373 store i8 %a, i8* @x5, align 4, !dbg !38
7474 ret i8 %0, !dbg !39
7575 }
2828 @x5 = global i32 0, align 4
2929
3030 define i32 @get1(i32 %a) nounwind optsize ssp {
31 tail call void @llvm.dbg.value(metadata !{i32 %a}, i64 0, metadata !10), !dbg !30
31 tail call void @llvm.dbg.value(metadata !{i32 %a}, i64 0, metadata !10, metadata !{i32 786690}), !dbg !30
3232 %1 = load i32* @x1, align 4, !dbg !31
33 tail call void @llvm.dbg.value(metadata !{i32 %1}, i64 0, metadata !11), !dbg !31
33 tail call void @llvm.dbg.value(metadata !{i32 %1}, i64 0, metadata !11, metadata !{i32 786690}), !dbg !31
3434 store i32 %a, i32* @x1, align 4, !dbg !31
3535 ret i32 %1, !dbg !31
3636 }
3737
3838 define i32 @get2(i32 %a) nounwind optsize ssp {
39 tail call void @llvm.dbg.value(metadata !{i32 %a}, i64 0, metadata !13), !dbg !32
39 tail call void @llvm.dbg.value(metadata !{i32 %a}, i64 0, metadata !13, metadata !{i32 786690}), !dbg !32
4040 %1 = load i32* @x2, align 4, !dbg !33
41 tail call void @llvm.dbg.value(metadata !{i32 %1}, i64 0, metadata !14), !dbg !33
41 tail call void @llvm.dbg.value(metadata !{i32 %1}, i64 0, metadata !14, metadata !{i32 786690}), !dbg !33
4242 store i32 %a, i32* @x2, align 4, !dbg !33
4343 ret i32 %1, !dbg !33
4444 }
4545
4646 define i32 @get3(i32 %a) nounwind optsize ssp {
47 tail call void @llvm.dbg.value(metadata !{i32 %a}, i64 0, metadata !16), !dbg !34
47 tail call void @llvm.dbg.value(metadata !{i32 %a}, i64 0, metadata !16, metadata !{i32 786690}), !dbg !34
4848 %1 = load i32* @x3, align 4, !dbg !35
49 tail call void @llvm.dbg.value(metadata !{i32 %1}, i64 0, metadata !17), !dbg !35
49 tail call void @llvm.dbg.value(metadata !{i32 %1}, i64 0, metadata !17, metadata !{i32 786690}), !dbg !35
5050 store i32 %a, i32* @x3, align 4, !dbg !35
5151 ret i32 %1, !dbg !35
5252 }
5353
5454 define i32 @get4(i32 %a) nounwind optsize ssp {
55 tail call void @llvm.dbg.value(metadata !{i32 %a}, i64 0, metadata !19), !dbg !36
55 tail call void @llvm.dbg.value(metadata !{i32 %a}, i64 0, metadata !19, metadata !{i32 786690}), !dbg !36
5656 %1 = load i32* @x4, align 4, !dbg !37
57 tail call void @llvm.dbg.value(metadata !{i32 %1}, i64 0, metadata !20), !dbg !37
57 tail call void @llvm.dbg.value(metadata !{i32 %1}, i64 0, metadata !20, metadata !{i32 786690}), !dbg !37
5858 store i32 %a, i32* @x4, align 4, !dbg !37
5959 ret i32 %1, !dbg !37
6060 }
6161
6262 define i32 @get5(i32 %a) nounwind optsize ssp {
63 tail call void @llvm.dbg.value(metadata !{i32 %a}, i64 0, metadata !27), !dbg !38
63 tail call void @llvm.dbg.value(metadata !{i32 %a}, i64 0, metadata !27, metadata !{i32 786690}), !dbg !38
6464 %1 = load i32* @x5, align 4, !dbg !39
65 tail call void @llvm.dbg.value(metadata !{i32 %1}, i64 0, metadata !28), !dbg !39
65 tail call void @llvm.dbg.value(metadata !{i32 %1}, i64 0, metadata !28, metadata !{i32 786690}), !dbg !39
6666 store i32 %a, i32* @x5, align 4, !dbg !39
6767 ret i32 %1, !dbg !39
6868 }
6969
70 declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone
70 declare void @llvm.dbg.value(metadata, i64, metadata, metadata) nounwind readnone
7171
7272 !llvm.dbg.cu = !{!0}
7373 !llvm.module.flags = !{!49}
2626
2727 for.body2: ; preds = %for.cond1
2828 store i32 %storemerge11, i32* @b, align 4, !dbg !26
29 tail call void @llvm.dbg.value(metadata !27, i64 0, metadata !11), !dbg !28
29 tail call void @llvm.dbg.value(metadata !27, i64 0, metadata !11, metadata !{i32 786690}), !dbg !28
3030 %0 = load i64* @a, align 8, !dbg !29
3131 %xor = xor i64 %0, %e.1.ph, !dbg !29
3232 %conv3 = trunc i64 %xor to i32, !dbg !29
33 tail call void @llvm.dbg.value(metadata !{i32 %conv3}, i64 0, metadata !10), !dbg !29
33 tail call void @llvm.dbg.value(metadata !{i32 %conv3}, i64 0, metadata !10, metadata !{i32 786690}), !dbg !29
3434 %tobool4 = icmp eq i32 %conv3, 0, !dbg !29
3535 br i1 %tobool4, label %land.end, label %land.rhs, !dbg !29
3636
6868 declare i32 @fn3(...) #1
6969
7070 ; Function Attrs: nounwind readnone
71 declare void @llvm.dbg.value(metadata, i64, metadata) #2
71 declare void @llvm.dbg.value(metadata, i64, metadata, metadata) #2
7272
7373 attributes #0 = { nounwind ssp "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "unsafe-fp-math"="false" "use-soft-float"="false" }
7474 attributes #1 = { "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "unsafe-fp-math"="false" "use-soft-float"="false" }
66 %struct.tag_s = type { i32, i32, i32 }
77
88 define void @foo(%struct.tag_s* nocapture %this, %struct.tag_s* %c, i64 %x, i64 %y, %struct.tag_s* nocapture %ptr1, %struct.tag_s* nocapture %ptr2) nounwind ssp {
9 tail call void @llvm.dbg.value(metadata !{%struct.tag_s* %this}, i64 0, metadata !5), !dbg !20
10 tail call void @llvm.dbg.value(metadata !{%struct.tag_s* %c}, i64 0, metadata !13), !dbg !21
11 tail call void @llvm.dbg.value(metadata !{i64 %x}, i64 0, metadata !14), !dbg !22
12 tail call void @llvm.dbg.value(metadata !{i64 %y}, i64 0, metadata !17), !dbg !23
9 tail call void @llvm.dbg.value(metadata !{%struct.tag_s* %this}, i64 0, metadata !5, metadata !{i32 786690}), !dbg !20
10 tail call void @llvm.dbg.value(metadata !{%struct.tag_s* %c}, i64 0, metadata !13, metadata !{i32 786690}), !dbg !21
11 tail call void @llvm.dbg.value(metadata !{i64 %x}, i64 0, metadata !14, metadata !{i32 786690}), !dbg !22
12 tail call void @llvm.dbg.value(metadata !{i64 %y}, i64 0, metadata !17, metadata !{i32 786690}), !dbg !23
1313 ;CHECK: @DEBUG_VALUE: foo:y <- [R7+8]
14 tail call void @llvm.dbg.value(metadata !{%struct.tag_s* %ptr1}, i64 0, metadata !18), !dbg !24
15 tail call void @llvm.dbg.value(metadata !{%struct.tag_s* %ptr2}, i64 0, metadata !19), !dbg !25
14 tail call void @llvm.dbg.value(metadata !{%struct.tag_s* %ptr1}, i64 0, metadata !18, metadata !{i32 786690}), !dbg !24
15 tail call void @llvm.dbg.value(metadata !{%struct.tag_s* %ptr2}, i64 0, metadata !19, metadata !{i32 786690}), !dbg !25
1616 %1 = icmp eq %struct.tag_s* %c, null, !dbg !26
1717 br i1 %1, label %3, label %2, !dbg !26
1818
2626
2727 declare void @foobar(i64, i64)
2828
29 declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone
29 declare void @llvm.dbg.value(metadata, i64, metadata, metadata) nounwind readnone
3030
3131 !llvm.dbg.cu = !{!0}
3232 !llvm.module.flags = !{!33}
1818 @"OBJC_IVAR_$_MyWork._data" = external hidden global i32, section "__DATA, __objc_const", align 4
1919 @"\01L_OBJC_SELECTOR_REFERENCES_222" = external hidden global i8*, section "__DATA, __objc_selrefs, literal_pointers, no_dead_strip"
2020
21 declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone
21 declare void @llvm.dbg.declare(metadata, metadata, metadata) nounwind readnone
2222
2323 declare i8* @objc_msgSend(i8*, i8*, ...)
2424
25 declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone
25 declare void @llvm.dbg.value(metadata, i64, metadata, metadata) nounwind readnone
2626
2727 declare void @llvm.memcpy.p0i8.p0i8.i32(i8* nocapture, i8* nocapture, i32, i32, i1) nounwind
2828
3030 %1 = alloca %0*, align 4
3131 %bounds = alloca %struct.CR, align 4
3232 %data = alloca %struct.CR, align 4
33 call void @llvm.dbg.value(metadata !{i8* %.block_descriptor}, i64 0, metadata !27), !dbg !129
33 call void @llvm.dbg.value(metadata !{i8* %.block_descriptor}, i64 0, metadata !27, metadata !{i32 786690}), !dbg !129
3434 store %0* %loadedMydata, %0** %1, align 4
35 call void @llvm.dbg.declare(metadata !{%0** %1}, metadata !130), !dbg !131
35 call void @llvm.dbg.declare(metadata !{%0** %1}, metadata !130, metadata !{i32 786690}), !dbg !131
3636 %2 = bitcast %struct.CR* %bounds to %1*
3737 %3 = getelementptr %1* %2, i32 0, i32 0
3838 store [4 x i32] %bounds.coerce0, [4 x i32]* %3
39 call void @llvm.dbg.declare(metadata !{%struct.CR* %bounds}, metadata !132), !dbg !133
39 call void @llvm.dbg.declare(metadata !{%struct.CR* %bounds}, metadata !132, metadata !{i32 786690}), !dbg !133
4040 %4 = bitcast %struct.CR* %data to %1*
4141 %5 = getelementptr %1* %4, i32 0, i32 0
4242 store [4 x i32] %data.coerce0, [4 x i32]* %5
43 call void @llvm.dbg.declare(metadata !{%struct.CR* %data}, metadata !134), !dbg !135
43 call void @llvm.dbg.declare(metadata !{%struct.CR* %data}, metadata !134, metadata !{i32 786690}), !dbg !135
4444 %6 = bitcast i8* %.block_descriptor to %2*
4545 %7 = getelementptr inbounds %2* %6, i32 0, i32 6
46 call void @llvm.dbg.declare(metadata !{%2* %6}, metadata !136), !dbg !137
47 call void @llvm.dbg.declare(metadata !{%2* %6}, metadata !138), !dbg !137
48 call void @llvm.dbg.declare(metadata !{%2* %6}, metadata !139), !dbg !140
46 call void @llvm.dbg.declare(metadata !{%2* %6}, metadata !136, metadata !163), !dbg !137
47 call void @llvm.dbg.declare(metadata !{%2* %6}, metadata !138, metadata !164), !dbg !137
48 call void @llvm.dbg.declare(metadata !{%2* %6}, metadata !139, metadata !165), !dbg !140
4949 %8 = load %0** %1, align 4, !dbg !141
5050 %9 = load i8** @"\01L_OBJC_SELECTOR_REFERENCES_13", !dbg !141
5151 %10 = bitcast %0* %8 to i8*, !dbg !141
230230 !133 = metadata !{i32 609, i32 175, metadata !23, null}
231231 !134 = metadata !{i32 786689, metadata !23, metadata !"data", metadata !24, i32 67109473, metadata !108, i32 0, null} ; [ DW_TAG_arg_variable ]
232232 !135 = metadata !{i32 609, i32 190, metadata !23, null}
233 !136 = metadata !{i32 786688, metadata !23, metadata !"mydata", metadata !24, i32 604, metadata !50, i32 0, null, metadata !163} ; [ DW_TAG_auto_variable ]
233 !136 = metadata !{i32 786688, metadata !23, metadata !"mydata", metadata !24, i32 604, metadata !50, i32 0, null} ;; [ DW_TAG_auto_variable ]
234234 !137 = metadata !{i32 604, i32 49, metadata !23, null}
235 !138 = metadata !{i32 786688, metadata !23, metadata !"self", metadata !40, i32 604, metadata !90, i32 0, null, metadata !164} ; [ DW_TAG_auto_variable ]
236 !139 = metadata !{i32 786688, metadata !23, metadata !"semi", metadata !24, i32 607, metadata !125, i32 0, null, metadata !165} ; [ DW_TAG_auto_variable ]
235 !138 = metadata !{i32 786688, metadata !23, metadata !"self", metadata !40, i32 604, metadata !90, i32 0, null} ;; [ DW_TAG_auto_variable ]
236 !139 = metadata !{i32 786688, metadata !23, metadata !"semi", metadata !24, i32 607, metadata !125, i32 0, null} ;; [ DW_TAG_auto_variable ]
237237 !140 = metadata !{i32 607, i32 30, metadata !23, null}
238238 !141 = metadata !{i32 610, i32 17, metadata !142, null}
239239 !142 = metadata !{i32 786443, metadata !152, metadata !23, i32 609, i32 200, i32 94} ; [ DW_TAG_lexical_block ]
257257 !160 = metadata !{metadata !"header.h", metadata !"/Volumes/Sandbox/llvm"}
258258 !161 = metadata !{metadata !"header2.h", metadata !"/Volumes/Sandbox/llvm"}
259259 !162 = metadata !{i32 1, metadata !"Debug Info Version", i32 1}
260 !163 = metadata !{i64 1, i64 20, i64 2, i64 1, i64 4, i64 2, i64 1, i64 24}
261 !164 = metadata !{i64 1, i64 24}
262 !165 = metadata !{i64 1, i64 28}
260 !163 = metadata !{i32 786690, i64 34, i64 20, i64 6, i64 34, i64 4, i64 6, i64 34, i64 24} ; [DW_OP_plus 20 DW_OP_deref DW_OP_plus 4 DW_OP_deref DW_OP_plus 24]
261 !164 = metadata !{i32 786690, i64 34, i64 24} ; [DW_OP_plus 24]
262 !165 = metadata !{i32 786690, i64 34, i64 28} ; [DW_OP_plus 28]
1919
2020 for.body9: ; preds = %for.body9, %entry
2121 %add19 = fadd <4 x float> undef, , !dbg !39
22 tail call void @llvm.dbg.value(metadata !{<4 x float> %add19}, i64 0, metadata !27), !dbg !39
22 tail call void @llvm.dbg.value(metadata !{<4 x float> %add19}, i64 0, metadata !27, metadata !{i32 786690}), !dbg !39
2323 %add20 = fadd <4 x float> undef, , !dbg !39
24 tail call void @llvm.dbg.value(metadata !{<4 x float> %add20}, i64 0, metadata !28), !dbg !39
24 tail call void @llvm.dbg.value(metadata !{<4 x float> %add20}, i64 0, metadata !28, metadata !{i32 786690}), !dbg !39
2525 br i1 %cond, label %for.end54, label %for.body9, !dbg !44
2626
2727 for.end54: ; preds = %for.body9
3636
3737 declare i32 @printf(i8* nocapture, ...) nounwind
3838
39 declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone
39 declare void @llvm.dbg.value(metadata, i64, metadata, metadata) nounwind readnone
4040
4141 !llvm.module.flags = !{!56}
4242 !llvm.dbg.cu = !{!2}
1111
1212 define i32 @inlineprinter(i8* %ptr, double %val, i8 zeroext %c) nounwind optsize {
1313 entry:
14 tail call void @llvm.dbg.value(metadata !{i8* %ptr}, i64 0, metadata !19), !dbg !26
15 tail call void @llvm.dbg.value(metadata !{double %val}, i64 0, metadata !20), !dbg !26
16 tail call void @llvm.dbg.value(metadata !{i8 %c}, i64 0, metadata !21), !dbg !26
14 tail call void @llvm.dbg.value(metadata !{i8* %ptr}, i64 0, metadata !19, metadata !{i32 786690}), !dbg !26
15 tail call void @llvm.dbg.value(metadata !{double %val}, i64 0, metadata !20, metadata !{i32 786690}), !dbg !26
16 tail call void @llvm.dbg.value(metadata !{i8 %c}, i64 0, metadata !21, metadata !{i32 786690}), !dbg !26
1717 %0 = zext i8 %c to i32, !dbg !27
1818 %1 = tail call i32 (i8*, ...)* @printf(i8* getelementptr inbounds ([11 x i8]* @.str, i32 0, i32 0), i8* %ptr, double %val, i32 %0) nounwind, !dbg !27
1919 ret i32 0, !dbg !29
2121
2222 define i32 @printer(i8* %ptr, double %val, i8 zeroext %c) nounwind optsize noinline {
2323 entry:
24 tail call void @llvm.dbg.value(metadata !{i8* %ptr}, i64 0, metadata !16), !dbg !30
25 tail call void @llvm.dbg.value(metadata !{double %val}, i64 0, metadata !17), !dbg !30
26 tail call void @llvm.dbg.value(metadata !{i8 %c}, i64 0, metadata !18), !dbg !30
24 tail call void @llvm.dbg.value(metadata !{i8* %ptr}, i64 0, metadata !16, metadata !{i32 786690}), !dbg !30
25 tail call void @llvm.dbg.value(metadata !{double %val}, i64 0, metadata !17, metadata !{i32 786690}), !dbg !30
26 tail call void @llvm.dbg.value(metadata !{i8 %c}, i64 0, metadata !18, metadata !{i32 786690}), !dbg !30
2727 %0 = zext i8 %c to i32, !dbg !31
2828 %1 = tail call i32 (i8*, ...)* @printf(i8* getelementptr inbounds ([11 x i8]* @.str, i32 0, i32 0), i8* %ptr, double %val, i32 %0) nounwind, !dbg !31
2929 ret i32 0, !dbg !33
3131
3232 declare i32 @printf(i8* nocapture, ...) nounwind
3333
34 declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone
34 declare void @llvm.dbg.value(metadata, i64, metadata, metadata) nounwind readnone
3535
3636 define i32 @main(i32 %argc, i8** nocapture %argv) nounwind optsize {
3737 entry:
38 tail call void @llvm.dbg.value(metadata !{i32 %argc}, i64 0, metadata !22), !dbg !34
39 tail call void @llvm.dbg.value(metadata !{i8** %argv}, i64 0, metadata !23), !dbg !34
38 tail call void @llvm.dbg.value(metadata !{i32 %argc}, i64 0, metadata !22, metadata !{i32 786690}), !dbg !34
39 tail call void @llvm.dbg.value(metadata !{i8** %argv}, i64 0, metadata !23, metadata !{i32 786690}), !dbg !34
4040 %0 = sitofp i32 %argc to double, !dbg !35
4141 %1 = fadd double %0, 5.555552e+05, !dbg !35
42 tail call void @llvm.dbg.value(metadata !{double %1}, i64 0, metadata !24), !dbg !35
42 tail call void @llvm.dbg.value(metadata !{double %1}, i64 0, metadata !24, metadata !{i32 786690}), !dbg !35
4343 %2 = tail call i32 @puts(i8* getelementptr inbounds ([6 x i8]* @.str1, i32 0, i32 0)) nounwind, !dbg !36
4444 %3 = getelementptr inbounds i8* bitcast (i32 (i32, i8**)* @main to i8*), i32 %argc, !dbg !37
4545 %4 = trunc i32 %argc to i8, !dbg !37
4646 %5 = add i8 %4, 97, !dbg !37
47 tail call void @llvm.dbg.value(metadata !{i8* %3}, i64 0, metadata !19) nounwind, !dbg !38
48 tail call void @llvm.dbg.value(metadata !{double %1}, i64 0, metadata !20) nounwind, !dbg !38
49 tail call void @llvm.dbg.value(metadata !{i8 %5}, i64 0, metadata !21) nounwind, !dbg !38
47 tail call void @llvm.dbg.value(metadata !{i8* %3}, i64 0, metadata !19, metadata !{i32 786690}) nounwind, !dbg !38
48 tail call void @llvm.dbg.value(metadata !{double %1}, i64 0, metadata !20, metadata !{i32 786690}) nounwind, !dbg !38
49 tail call void @llvm.dbg.value(metadata !{i8 %5}, i64 0, metadata !21, metadata !{i32 786690}) nounwind, !dbg !38
5050 %6 = zext i8 %5 to i32, !dbg !39
5151 %7 = tail call i32 (i8*, ...)* @printf(i8* getelementptr inbounds ([11 x i8]* @.str, i32 0, i32 0), i8* %3, double %1, i32 %6) nounwind, !dbg !39
5252 %8 = tail call i32 @printer(i8* %3, double %1, i8 zeroext %5) nounwind, !dbg !40
2525 br i1 undef, label %for.end54, label %for.body9, !dbg !44
2626
2727 for.end54: ; preds = %for.body9
28 tail call void @llvm.dbg.value(metadata !{<4 x float> %add19}, i64 0, metadata !27), !dbg !39
28 tail call void @llvm.dbg.value(metadata !{<4 x float> %add19}, i64 0, metadata !27, metadata !{i32 786690}), !dbg !39
2929 %tmp115 = extractelement <4 x float> %add19, i32 1
3030 %conv6.i75 = fpext float %tmp115 to double, !dbg !45
3131 %call.i82 = tail call i32 (i8*, ...)* @printf(i8* getelementptr inbounds ([13 x i8]* @.str, i32 0, i32 0), double undef, double %conv6.i75, double undef, double undef) nounwind, !dbg !45
3434
3535 declare i32 @printf(i8* nocapture, ...) nounwind
3636
37 declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone
37 declare void @llvm.dbg.value(metadata, i64, metadata, metadata) nounwind readnone
3838
3939 !llvm.dbg.cu = !{!2}
4040 !llvm.module.flags = !{!56}
1414
1515 define i32 @inlineprinter(i8* %ptr, float %val, i8 zeroext %c) nounwind optsize ssp {
1616 entry:
17 tail call void @llvm.dbg.value(metadata !{i8* %ptr}, i64 0, metadata !8), !dbg !24
18 tail call void @llvm.dbg.value(metadata !{float %val}, i64 0, metadata !10), !dbg !25
19 tail call void @llvm.dbg.value(metadata !{i8 %c}, i64 0, metadata !12), !dbg !26
17 tail call void @llvm.dbg.value(metadata !{i8* %ptr}, i64 0, metadata !8, metadata !{i32 786690}), !dbg !24
18 tail call void @llvm.dbg.value(metadata !{float %val}, i64 0, metadata !10, metadata !{i32 786690}), !dbg !25
19 tail call void @llvm.dbg.value(metadata !{i8 %c}, i64 0, metadata !12, metadata !{i32 786690}), !dbg !26
2020 %conv = fpext float %val to double, !dbg !27
2121 %conv3 = zext i8 %c to i32, !dbg !27
2222 %call = tail call i32 (i8*, ...)* @printf(i8* getelementptr inbounds ([11 x i8]* @.str, i32 0, i32 0), i8* %ptr, double %conv, i32 %conv3) nounwind optsize, !dbg !27
2727
2828 define i32 @printer(i8* %ptr, float %val, i8 zeroext %c) nounwind optsize noinline ssp {
2929 entry:
30 tail call void @llvm.dbg.value(metadata !{i8* %ptr}, i64 0, metadata !14), !dbg !30
31 tail call void @llvm.dbg.value(metadata !{float %val}, i64 0, metadata !15), !dbg !31
32 tail call void @llvm.dbg.value(metadata !{i8 %c}, i64 0, metadata !16), !dbg !32
30 tail call void @llvm.dbg.value(metadata !{i8* %ptr}, i64 0, metadata !14, metadata !{i32 786690}), !dbg !30
31 tail call void @llvm.dbg.value(metadata !{float %val}, i64 0, metadata !15, metadata !{i32 786690}), !dbg !31
32 tail call void @llvm.dbg.value(metadata !{i8 %c}, i64 0, metadata !16, metadata !{i32 786690}), !dbg !32
3333 %conv = fpext float %val to double, !dbg !33
3434 %conv3 = zext i8 %c to i32, !dbg !33
3535 %call = tail call i32 (i8*, ...)* @printf(i8* getelementptr inbounds ([11 x i8]* @.str, i32 0, i32 0), i8* %ptr, double %conv, i32 %conv3) nounwind optsize, !dbg !33
3838
3939 define i32 @main(i32 %argc, i8** nocapture %argv) nounwind optsize ssp {
4040 entry:
41 tail call void @llvm.dbg.value(metadata !{i32 %argc}, i64 0, metadata !17), !dbg !36
42 tail call void @llvm.dbg.value(metadata !{i8** %argv}, i64 0, metadata !18), !dbg !37
41 tail call void @llvm.dbg.value(metadata !{i32 %argc}, i64 0, metadata !17, metadata !{i32 786690}), !dbg !36
42 tail call void @llvm.dbg.value(metadata !{i8** %argv}, i64 0, metadata !18, metadata !{i32 786690}), !dbg !37
4343 %conv = sitofp i32 %argc to double, !dbg !38
4444 %add = fadd double %conv, 5.555552e+05, !dbg !38
4545 %conv1 = fptrunc double %add to float, !dbg !38
46 tail call void @llvm.dbg.value(metadata !{float %conv1}, i64 0, metadata !22), !dbg !38
46 tail call void @llvm.dbg.value(metadata !{float %conv1}, i64 0, metadata !22, metadata !{i32 786690}), !dbg !38
4747 %call = tail call i32 @puts(i8* getelementptr inbounds ([6 x i8]* @.str1, i32 0, i32 0)) nounwind optsize, !dbg !39
4848 %add.ptr = getelementptr i8* bitcast (i32 (i32, i8**)* @main to i8*), i32 %argc, !dbg !40
4949 %add5 = add nsw i32 %argc, 97, !dbg !40
5050 %conv6 = trunc i32 %add5 to i8, !dbg !40
51 tail call void @llvm.dbg.value(metadata !{i8* %add.ptr}, i64 0, metadata !8) nounwind, !dbg !41
52 tail call void @llvm.dbg.value(metadata !{float %conv1}, i64 0, metadata !10) nounwind, !dbg !42
53 tail call void @llvm.dbg.value(metadata !{i8 %conv6}, i64 0, metadata !12) nounwind, !dbg !43
51 tail call void @llvm.dbg.value(metadata !{i8* %add.ptr}, i64 0, metadata !8, metadata !{i32 786690}) nounwind, !dbg !41
52 tail call void @llvm.dbg.value(metadata !{float %conv1}, i64 0, metadata !10, metadata !{i32 786690}) nounwind, !dbg !42
53 tail call void @llvm.dbg.value(metadata !{i8 %conv6}, i64 0, metadata !12, metadata !{i32 786690}) nounwind, !dbg !43
5454 %conv.i = fpext float %conv1 to double, !dbg !44
5555 %conv3.i = and i32 %add5, 255, !dbg !44
5656 %call.i = tail call i32 (i8*, ...)* @printf(i8* getelementptr inbounds ([11 x i8]* @.str, i32 0, i32 0), i8* %add.ptr, double %conv.i, i32 %conv3.i) nounwind optsize, !dbg !44
6060
6161 declare i32 @puts(i8* nocapture) nounwind optsize
6262
63 declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone
63 declare void @llvm.dbg.value(metadata, i64, metadata, metadata) nounwind readnone
6464
6565 !llvm.dbg.cu = !{!2}
6666 !llvm.module.flags = !{!53}
1414 define void @_Z3foov() optsize ssp {
1515 entry:
1616 %call = tail call float @_Z3barv() optsize, !dbg !11
17 tail call void @llvm.dbg.value(metadata !{float %call}, i64 0, metadata !5), !dbg !11
17 tail call void @llvm.dbg.value(metadata !{float %call}, i64 0, metadata !5, metadata !{i32 786690}), !dbg !11
1818 %call16 = tail call float @_Z2f2v() optsize, !dbg !12
1919 %cmp7 = fcmp olt float %call, %call16, !dbg !12
2020 br i1 %cmp7, label %for.body, label %for.end, !dbg !12
3737
3838 declare float @_Z2f3f(float) optsize
3939
40 declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone
40 declare void @llvm.dbg.value(metadata, i64, metadata, metadata) nounwind readnone
4141
4242 !llvm.dbg.cu = !{!0}
4343 !llvm.module.flags = !{!20}
33 %0 = type { i32, i32 }
44
55 define void @t(%0*, i32, i32, i32, i32) nounwind {
6 tail call void @llvm.dbg.value(metadata !{%0* %0}, i64 0, metadata !0)
6 tail call void @llvm.dbg.value(metadata !{%0* %0}, i64 0, metadata !0, metadata !{i32 786690})
77 unreachable
88 }
99
10 declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone
10 declare void @llvm.dbg.value(metadata, i64, metadata, metadata) nounwind readnone
1111
1212 ; !0 should conform to the format of DIVariable.
1313 !0 = metadata !{i32 786689, null, metadata !"a", null, i32 0, null, i32 0, i32 0} ;
44
55 define void @foo(i32* nocapture %a, i32* nocapture %b) nounwind {
66 entry:
7 tail call void @llvm.dbg.value(metadata !{i32* %a}, i64 0, metadata !13), !dbg !17
8 tail call void @llvm.dbg.value(metadata !{i32* %b}, i64 0, metadata !14), !dbg !18
9 tail call void @llvm.dbg.value(metadata !30, i64 0, metadata !15), !dbg !19
7 tail call void @llvm.dbg.value(metadata !{i32* %a}, i64 0, metadata !13, metadata !{i32 786690}), !dbg !17
8 tail call void @llvm.dbg.value(metadata !{i32* %b}, i64 0, metadata !14, metadata !{i32 786690}), !dbg !18
9 tail call void @llvm.dbg.value(metadata !30, i64 0, metadata !15, metadata !{i32 786690}), !dbg !19
1010 br label %for.body, !dbg !19
1111
1212 for.body: ; preds = %for.body, %entry
1717 %i.02 = phi i32 [ 0, %entry ], [ %inc, %for.body ]
1818 %b.addr.01 = phi i32* [ %b, %entry ], [ %incdec.ptr, %for.body ]
1919 %incdec.ptr = getelementptr inbounds i32* %b.addr.01, i32 1, !dbg !21
20 tail call void @llvm.dbg.value(metadata !{i32* %incdec.ptr}, i64 0, metadata !14), !dbg !21
20 tail call void @llvm.dbg.value(metadata !{i32* %incdec.ptr}, i64 0, metadata !14, metadata !{i32 786690}), !dbg !21
2121 %0 = load i32* %b.addr.01, align 4, !dbg !21
2222 store i32 %0, i32* %arrayidx.phi, align 4, !dbg !21
2323 %inc = add nsw i32 %i.02, 1, !dbg !26
24 tail call void @llvm.dbg.value(metadata !{i32 %inc}, i64 0, metadata !15), !dbg !26
24 tail call void @llvm.dbg.value(metadata !{i32 %inc}, i64 0, metadata !15, metadata !{i32 786690}), !dbg !26
2525 %exitcond = icmp eq i32 %inc, 10, !dbg !19
2626 %arrayidx.inc = getelementptr i32* %arrayidx.phi, i32 1
2727 br i1 %exitcond, label %for.end, label %for.body, !dbg !19
3030 ret void, !dbg !27
3131 }
3232
33 declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone
33 declare void @llvm.dbg.value(metadata, i64, metadata, metadata) nounwind readnone
3434
3535
3636 !llvm.dbg.cu = !{!0}
22 define i32 @main() nounwind ssp {
33 entry:
44 ; CHECK: DEBUG_VALUE
5 call void @llvm.dbg.value(metadata !6, i64 0, metadata !7), !dbg !9
5 call void @llvm.dbg.value(metadata !6, i64 0, metadata !7, metadata !{i32 786690}), !dbg !9
66 ret i32 0, !dbg !10
77 }
88
9 declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone
9 declare void @llvm.dbg.declare(metadata, metadata, metadata) nounwind readnone
1010
11 declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone
11 declare void @llvm.dbg.value(metadata, i64, metadata, metadata) nounwind readnone
1212
1313 !llvm.dbg.cu = !{!2}
1414 !llvm.module.flags = !{!13}
55
66 define i32 @main(i32 %argc, i8** nocapture %argv) nounwind readnone {
77 entry:
8 tail call void @llvm.dbg.value(metadata !{i32 %argc}, i64 0, metadata !15), !dbg !17
9 tail call void @llvm.dbg.value(metadata !{i8** %argv}, i64 0, metadata !16), !dbg !18
8 tail call void @llvm.dbg.value(metadata !{i32 %argc}, i64 0, metadata !15, metadata !{i32 786690}), !dbg !17
9 tail call void @llvm.dbg.value(metadata !{i8** %argv}, i64 0, metadata !16, metadata !{i32 786690}), !dbg !18
1010 %add = add nsw i32 %argc, 1, !dbg !19
1111 ret i32 %add, !dbg !19
1212 }
1313
14 declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone
14 declare void @llvm.dbg.value(metadata, i64, metadata, metadata) nounwind readnone
1515
1616 !llvm.dbg.cu = !{!0}
1717 !llvm.module.flags = !{!22}
2424 for.end1042: ; preds = %for.cond968.preheader, %for.cond964.preheader, %entry
2525 %0 = phi i32 [ undef, %for.cond964.preheader ], [ undef, %for.cond968.preheader ], [ undef, %entry ]
2626 %1 = load i32* getelementptr inbounds ([3 x i32]* @grid_points, i64 0, i64 0), align 4, !dbg !443, !tbaa !444
27 tail call void @llvm.dbg.value(metadata !447, i64 0, metadata !119), !dbg !448
27 tail call void @llvm.dbg.value(metadata !447, i64 0, metadata !119, metadata !{i32 786690}), !dbg !448
2828 %sub10454270 = add nsw i32 %0, -1, !dbg !448
2929 %cmp10464271 = icmp sgt i32 %sub10454270, 1, !dbg !448
3030 %sub11134263 = add nsw i32 %1, -1, !dbg !450
4545 }
4646
4747 ; Function Attrs: nounwind readnone
48 declare void @llvm.dbg.value(metadata, i64, metadata) #1
48 declare void @llvm.dbg.value(metadata, i64, metadata, metadata) #1
4949
5050 attributes #0 = { nounwind "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" }
5151 attributes #1 = { nounwind readnone }
2424 %storemerge = phi double [ -1.000000e+00, %4 ], [ 1.000000e+00, %3 ], [ 1.000000e+00, %3 ] ; [#uses=1]
2525 %v_6 = icmp slt i32 %1, 2 ; [#uses=1]
2626 %storemerge1 = select i1 %v_6, double 1.000000e+00, double -1.000000e+00 ; [#uses=3]
27 call void @llvm.dbg.value(metadata !{double %storemerge}, i64 0, metadata !91), !dbg !0
27 call void @llvm.dbg.value(metadata !{double %storemerge}, i64 0, metadata !91, metadata !{i32 786690}), !dbg !0
2828 %v_7 = icmp eq i32 %2, 1, !dbg !92 ; [#uses=1]
2929 %storemerge2 = select i1 %v_7, double 1.000000e+00, double -1.000000e+00 ; [#uses=3]
3030 %v_8 = getelementptr inbounds %0* %0, i32 0, i32 0, i32 0 ; [#uses=1]
3939 ret void, !dbg !98
4040 }
4141
42 declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone
42 declare void @llvm.dbg.declare(metadata, metadata, metadata) nounwind readnone
4343
4444 declare double @sqrt(double) nounwind readonly
4545
46 declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone
46 declare void @llvm.dbg.value(metadata, i64, metadata, metadata) nounwind readnone
4747
4848 !llvm.dbg.cu = !{!5}
4949 !llvm.module.flags = !{!104}
1313 %2 = alloca i64 ; [#uses=1]
1414 %3 = alloca i64 ; [#uses=6]
1515 %"alloca point" = bitcast i32 0 to i32 ; [#uses=0]
16 call void @llvm.dbg.declare(metadata !{i8** %s1_addr}, metadata !0), !dbg !7
16 call void @llvm.dbg.declare(metadata !{i8** %s1_addr}, metadata !0, metadata !{i32 786690}), !dbg !7
1717 store i8* %s1, i8** %s1_addr
18 call void @llvm.dbg.declare(metadata !{[0 x i8]** %str.0}, metadata !8), !dbg !7
18 call void @llvm.dbg.declare(metadata !{[0 x i8]** %str.0}, metadata !8, metadata !{i32 786690}), !dbg !7
1919 %4 = call i8* @llvm.stacksave(), !dbg !7 ; [#uses=1]
2020 store i8* %4, i8** %saved_stack.1, align 8, !dbg !7
2121 %5 = load i8** %s1_addr, align 8, !dbg !13 ; [#uses=1]
5757 ret i8 %retval12, !dbg !16
5858 }
5959
60 declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone
60 declare void @llvm.dbg.declare(metadata, metadata, metadata) nounwind readnone
6161
6262 declare i8* @llvm.stacksave() nounwind
6363
88 br label %do.body, !dbg !0
99
1010 do.body: ; preds = %entry
11 call void @llvm.dbg.declare(metadata !{i32* %count_}, metadata !4)
11 call void @llvm.dbg.declare(metadata !{i32* %count_}, metadata !4, metadata !{i32 786690})
1212 %conv = ptrtoint i32* %count_ to i32, !dbg !0 ; [#uses=1]
1313 %call = call i32 @foo(i32 %conv) ssp, !dbg !0 ; [#uses=0]
1414 br label %do.end, !dbg !0
1717 ret void, !dbg !7
1818 }
1919
20 declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone
20 declare void @llvm.dbg.declare(metadata, metadata, metadata) nounwind readnone
2121
2222 declare i32 @foo(i32) ssp
2323
1111 %retval = alloca double ; [#uses=2]
1212 %0 = alloca double ; [#uses=2]
1313 %"alloca point" = bitcast i32 0 to i32 ; [#uses=0]
14 call void @llvm.dbg.declare(metadata !{%struct.Rect* %my_r0}, metadata !0), !dbg !15
14 call void @llvm.dbg.declare(metadata !{%struct.Rect* %my_r0}, metadata !0, metadata !{i32 786690}), !dbg !15
1515 %1 = getelementptr inbounds %struct.Rect* %my_r0, i32 0, i32 0, !dbg !16 ; <%struct.Pt*> [#uses=1]
1616 %2 = getelementptr inbounds %struct.Pt* %1, i32 0, i32 0, !dbg !16 ; [#uses=1]
1717 %3 = load double* %2, align 8, !dbg !16 ; [#uses=1]
2525 ret double %retval1, !dbg !16
2626 }
2727
28 declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone
28 declare void @llvm.dbg.declare(metadata, metadata, metadata) nounwind readnone
2929
3030 !llvm.dbg.cu = !{!3}
3131 !llvm.module.flags = !{!21}
77
88 define i32 @"main(tart.core.String[])->int32"(i32 %args) {
99 entry:
10 tail call void @llvm.dbg.value(metadata !14, i64 0, metadata !8)
10 tail call void @llvm.dbg.value(metadata !14, i64 0, metadata !8, metadata !{i32 786690})
1111 tail call void @"tart.reflect.ComplexType.create->tart.core.Object"(%tart.reflect.ComplexType* @.type.SwitchStmtTest) ; <%tart.core.Object*> [#uses=2]
1212 ret i32 3
1313 }
1414
15 declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone
15 declare void @llvm.dbg.value(metadata, i64, metadata, metadata) nounwind readnone
1616 declare void @"tart.reflect.ComplexType.create->tart.core.Object"(%tart.reflect.ComplexType*) nounwind readnone
1717
1818 !0 = metadata !{i32 458769, metadata !15, i32 1, metadata !"4.2.1 (Based on Apple Inc. build 5658) (LLVM build)", i1 true, metadata !"", i32 0, metadata !16, metadata !16, null, null, null, i32 0} ; [ DW_TAG_compile_unit ]
1010
1111 define hidden %0 @__divsc3(float %a, float %b, float %c, float %d) nounwind readnone {
1212 entry:
13 tail call void @llvm.dbg.value(metadata !{float %a}, i64 0, metadata !0)
14 tail call void @llvm.dbg.value(metadata !{float %b}, i64 0, metadata !11)
15 tail call void @llvm.dbg.value(metadata !{float %c}, i64 0, metadata !12)
16 tail call void @llvm.dbg.value(metadata !{float %d}, i64 0, metadata !13)
13 tail call void @llvm.dbg.value(metadata !{float %a}, i64 0, metadata !0, metadata !{i32 786690})
14 tail call void @llvm.dbg.value(metadata !{float %b}, i64 0, metadata !11, metadata !{i32 786690})
15 tail call void @llvm.dbg.value(metadata !{float %c}, i64 0, metadata !12, metadata !{i32 786690})
16 tail call void @llvm.dbg.value(metadata !{float %d}, i64 0, metadata !13, metadata !{i32 786690})
1717 %0 = tail call float @fabsf(float %c) nounwind readnone, !dbg !19 ; [#uses=1]
1818 %1 = tail call float @fabsf(float %d) nounwind readnone, !dbg !19 ; [#uses=1]
1919 %2 = fcmp olt float %0, %1, !dbg !19 ; [#uses=1]
2121
2222 bb: ; preds = %entry
2323 %3 = fdiv float %c, %d, !dbg !20 ; [#uses=3]
24 tail call void @llvm.dbg.value(metadata !{float %3}, i64 0, metadata !16), !dbg !20
24 tail call void @llvm.dbg.value(metadata !{float %3}, i64 0, metadata !16, metadata !{i32 786690}), !dbg !20
2525 %4 = fmul float %3, %c, !dbg !21 ; [#uses=1]
2626 %5 = fadd float %4, %d, !dbg !21 ; [#uses=2]
27 tail call void @llvm.dbg.value(metadata !{float %5}, i64 0, metadata !14), !dbg !21
27 tail call void @llvm.dbg.value(metadata !{float %5}, i64 0, metadata !14, metadata !{i32 786690}), !dbg !21
2828 %6 = fmul float %3, %a, !dbg !22 ; [#uses=1]
2929 %7 = fadd float %6, %b, !dbg !22 ; [#uses=1]
3030 %8 = fdiv float %7, %5, !dbg !22 ; [#uses=1]
31 tail call void @llvm.dbg.value(metadata !{float %8}, i64 0, metadata !17), !dbg !22
31 tail call void @llvm.dbg.value(metadata !{float %8}, i64 0, metadata !17, metadata !{i32 786690}), !dbg !22
3232 %9 = fmul float %3, %b, !dbg !23 ; [#uses=1]
3333 %10 = fsub float %9, %a, !dbg !23 ; [#uses=1]
3434 %11 = fdiv float %10, %5, !dbg !23 ; [#uses=1]
35 tail call void @llvm.dbg.value(metadata !{float %11}, i64 0, metadata !18), !dbg !23
35 tail call void @llvm.dbg.value(metadata !{float %11}, i64 0, metadata !18, metadata !{i32 786690}), !dbg !23
3636 br label %bb2, !dbg !23
3737
3838 bb1: ; preds = %entry
3939 %12 = fdiv float %d, %c, !dbg !24 ; [#uses=3]
40 tail call void @llvm.dbg.value(metadata !{float %12}, i64 0, metadata !16), !dbg !24
40 tail call void @llvm.dbg.value(metadata !{float %12}, i64 0, metadata !16, metadata !{i32 786690}), !dbg !24
4141 %13 = fmul float %12, %d, !dbg !25 ; [#uses=1]
4242 %14 = fadd float %13, %c, !dbg !25 ; [#uses=2]
43 tail call void @llvm.dbg.value(metadata !{float %14}, i64 0, metadata !14), !dbg !25
43 tail call void @llvm.dbg.value(metadata !{float %14}, i64 0, metadata !14, metadata !{i32 786690}), !dbg !25
4444 %15 = fmul float %12, %b, !dbg !26 ; [#uses=1]
4545 %16 = fadd float %15, %a, !dbg !26 ; [#uses=1]
4646 %17 = fdiv float %16, %14, !dbg !26 ; [#uses=1]
47 tail call void @llvm.dbg.value(metadata !{float %17}, i64 0, metadata !17), !dbg !26
47 tail call void @llvm.dbg.value(metadata !{float %17}, i64 0, metadata !17, metadata !{i32 786690}), !dbg !26
4848 %18 = fmul float %12, %a, !dbg !27 ; [#uses=1]
4949 %19 = fsub float %b, %18, !dbg !27 ; [#uses=1]
5050 %20 = fdiv float %19, %14, !dbg !27 ; [#uses=1]
51 tail call void @llvm.dbg.value(metadata !{float %20}, i64 0, metadata !18), !dbg !27
51 tail call void @llvm.dbg.value(metadata !{float %20}, i64 0, metadata !18, metadata !{i32 786690}), !dbg !27
5252 br label %bb2, !dbg !27
5353
5454 bb2: ; preds = %bb1, %bb
7474 bb8: ; preds = %bb6
7575 %27 = tail call float @copysignf(float 0x7FF0000000000000, float %c) nounwind readnone, !dbg !30 ; [#uses=2]
7676 %28 = fmul float %27, %a, !dbg !30 ; [#uses=1]
77 tail call void @llvm.dbg.value(metadata !{float %28}, i64 0, metadata !17), !dbg !30
77 tail call void @llvm.dbg.value(metadata !{float %28}, i64 0, metadata !17, metadata !{i32 786690}), !dbg !30
7878 %29 = fmul float %27, %b, !dbg !31 ; [#uses=1]
79 tail call void @llvm.dbg.value(metadata !{float %29}, i64 0, metadata !18), !dbg !31
79 tail call void @llvm.dbg.value(metadata !{float %29}, i64 0, metadata !18, metadata !{i32 786690}), !dbg !31
8080 br label %bb46, !dbg !31
8181
8282 bb9: ; preds = %bb6, %bb4
106106 bb16: ; preds = %bb15
107107 %iftmp.0.0 = select i1 %33, float 1.000000e+00, float 0.000000e+00 ; [#uses=1]
108108 %42 = tail call float @copysignf(float %iftmp.0.0, float %a) nounwind readnone, !dbg !33 ; [#uses=2]
109 tail call void @llvm.dbg.value(metadata !{float %42}, i64 0, metadata !0), !dbg !33
109 tail call void @llvm.dbg.value(metadata !{float %42}, i64 0, metadata !0, metadata !{i32 786690}), !dbg !33
110110 %43 = fcmp ord float %b, 0.000000e+00 ; [#uses=1]
111111 %44 = fsub float %b, %b, !dbg !34 ; [#uses=1]
112112 %45 = fcmp uno float %44, 0.000000e+00 ; [#uses=1]
113113 %46 = and i1 %43, %45, !dbg !34 ; [#uses=1]
114114 %iftmp.1.0 = select i1 %46, float 1.000000e+00, float 0.000000e+00 ; [#uses=1]
115115 %47 = tail call float @copysignf(float %iftmp.1.0, float %b) nounwind readnone, !dbg !34 ; [#uses=2]
116 tail call void @llvm.dbg.value(metadata !{float %47}, i64 0, metadata !11), !dbg !34
116 tail call void @llvm.dbg.value(metadata !{float %47}, i64 0, metadata !11, metadata !{i32 786690}), !dbg !34
117117 %48 = fmul float %42, %c, !dbg !35 ; [#uses=1]
118118 %49 = fmul float %47, %d, !dbg !35 ; [#uses=1]
119119 %50 = fadd float %48, %49, !dbg !35 ; [#uses=1]
120120 %51 = fmul float %50, 0x7FF0000000000000, !dbg !35 ; [#uses=1]
121 tail call void @llvm.dbg.value(metadata !{float %51}, i64 0, metadata !17), !dbg !35
121 tail call void @llvm.dbg.value(metadata !{float %51}, i64 0, metadata !17, metadata !{i32 786690}), !dbg !35
122122 %52 = fmul float %47, %c, !dbg !36 ; [#uses=1]
123123 %53 = fmul float %42, %d, !dbg !36 ; [#uses=1]
124124 %54 = fsub float %52, %53, !dbg !36 ; [#uses=1]
125125 %55 = fmul float %54, 0x7FF0000000000000, !dbg !36 ; [#uses=1]
126 tail call void @llvm.dbg.value(metadata !{float %55}, i64 0, metadata !18), !dbg !36
126 tail call void @llvm.dbg.value(metadata !{float %55}, i64 0, metadata !18, metadata !{i32 786690}), !dbg !36
127127 br label %bb46, !dbg !36
128128
129129 bb27: ; preds = %bb15, %bb14, %bb11
154154 bb35: ; preds = %bb34
155155 %iftmp.2.0 = select i1 %59, float 1.000000e+00, float 0.000000e+00 ; [#uses=1]
156156 %67 = tail call float @copysignf(float %iftmp.2.0, float %c) nounwind readnone, !dbg !38 ; [#uses=2]
157 tail call void @llvm.dbg.value(metadata !{float %67}, i64 0, metadata !12), !dbg !38
157 tail call void @llvm.dbg.value(metadata !{float %67}, i64 0, metadata !12, metadata !{i32 786690}), !dbg !38
158158 %68 = fcmp ord float %d, 0.000000e+00 ; [#uses=1]
159159 %69 = fsub float %d, %d, !dbg !39 ; [#uses=1]
160160 %70 = fcmp uno float %69, 0.000000e+00 ; [#uses=1]
161161 %71 = and i1 %68, %70, !dbg !39 ; [#uses=1]
162162 %iftmp.3.0 = select i1 %71, float 1.000000e+00, float 0.000000e+00 ; [#uses=1]
163163 %72 = tail call float @copysignf(float %iftmp.3.0, float %d) nounwind readnone, !dbg !39 ; [#uses=2]
164 tail call void @llvm.dbg.value(metadata !{float %72}, i64 0, metadata !13), !dbg !39
164 tail call void @llvm.dbg.value(metadata !{float %72}, i64 0, metadata !13, metadata !{i32 786690}), !dbg !39
165165 %73 = fmul float %67, %a, !dbg !40 ; [#uses=1]
166166 %74 = fmul float %72, %b, !dbg !40 ; [#uses=1]
167167 %75 = fadd float %73, %74, !dbg !40 ; [#uses=1]
168168 %76 = fmul float %75, 0.000000e+00, !dbg !40 ; [#uses=1]
169 tail call void @llvm.dbg.value(metadata !{float %76}, i64 0, metadata !17), !dbg !40
169 tail call void @llvm.dbg.value(metadata !{float %76}, i64 0, metadata !17, metadata !{i32 786690}), !dbg !40
170170 %77 = fmul float %67, %b, !dbg !41 ; [#uses=1]
171171 %78 = fmul float %72, %a, !dbg !41 ; [#uses=1]
172172 %79 = fsub float %77, %78, !dbg !41 ; [#uses=1]
173173 %80 = fmul float %79, 0.000000e+00, !dbg !41 ; [#uses=1]
174 tail call void @llvm.dbg.value(metadata !{float %80}, i64 0, metadata !18), !dbg !41
174 tail call void @llvm.dbg.value(metadata !{float %80}, i64 0, metadata !18, metadata !{i32 786690}), !dbg !41
175175 br label %bb46, !dbg !41
176176
177177 bb46: ; preds = %bb35, %bb34, %bb33, %bb30, %bb16, %bb8, %bb2
195195
196196 declare float @copysignf(float, float) nounwind readnone
197197
198 declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone
198 declare void @llvm.dbg.value(metadata, i64, metadata, metadata) nounwind readnone
199199
200200 !llvm.dbg.cu = !{!3}
201201 !llvm.module.flags = !{!48}
88
99 define i8* @bar(%struct.a* %myvar) nounwind optsize noinline ssp {
1010 entry:
11 tail call void @llvm.dbg.value(metadata !{%struct.a* %myvar}, i64 0, metadata !8)
11 tail call void @llvm.dbg.value(metadata !{%struct.a* %myvar}, i64 0, metadata !8, metadata !{i32 786690})
1212 %0 = getelementptr inbounds %struct.a* %myvar, i64 0, i32 0, !dbg !28 ; [#uses=1]
1313 %1 = load i32* %0, align 8, !dbg !28 ; [#uses=1]
1414 tail call void @foo(i32 %1) nounwind optsize noinline ssp, !dbg !28
1818
1919 declare void @foo(i32) nounwind optsize noinline ssp
2020
21 declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone
21 declare void @llvm.dbg.value(metadata, i64, metadata, metadata) nounwind readnone
2222
2323 !llvm.dbg.cu = !{!2}