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Use uint16_t to store registers in callee saved register tables to reduce size of static data. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151996 91177308-0d34-0410-b5e6-96231b3b80d8 Craig Topper 7 years ago
33 changed file(s) with 55 addition(s) and 55 deletion(s). Raw diff Collapse all Expand all
350350 /// order of desired callee-save stack frame offset. The first register is
351351 /// closest to the incoming stack pointer if stack grows down, and vice versa.
352352 ///
353 virtual const unsigned* getCalleeSavedRegs(const MachineFunction *MF = 0)
353 virtual const uint16_t* getCalleeSavedRegs(const MachineFunction *MF = 0)
354354 const = 0;
355355
356356 /// getCallPreservedMask - Return a mask of call-preserved registers for the
185185 // callee-saved register that is not saved in the prolog.
186186 const MachineFrameInfo *MFI = MF.getFrameInfo();
187187 BitVector Pristine = MFI->getPristineRegs(BB);
188 for (const unsigned *I = TRI->getCalleeSavedRegs(&MF); *I; ++I) {
188 for (const uint16_t *I = TRI->getCalleeSavedRegs(&MF); *I; ++I) {
189189 unsigned Reg = *I;
190190 if (!IsReturnBlock && !Pristine.test(Reg)) continue;
191191 for (const unsigned *Alias = TRI->getOverlaps(Reg);
101101 // callee-saved register that is not saved in the prolog.
102102 const MachineFrameInfo *MFI = MF.getFrameInfo();
103103 BitVector Pristine = MFI->getPristineRegs(BB);
104 for (const unsigned *I = TRI->getCalleeSavedRegs(&MF); *I; ++I) {
104 for (const uint16_t *I = TRI->getCalleeSavedRegs(&MF); *I; ++I) {
105105 unsigned Reg = *I;
106106 if (!IsReturnBlock && !Pristine.test(Reg)) continue;
107107 Classes[Reg] = reinterpret_cast(-1);
461461 if (!isCalleeSavedInfoValid())
462462 return BV;
463463
464 for (const unsigned *CSR = TRI->getCalleeSavedRegs(MF); CSR && *CSR; ++CSR)
464 for (const uint16_t *CSR = TRI->getCalleeSavedRegs(MF); CSR && *CSR; ++CSR)
465465 BV.set(*CSR);
466466
467467 // The entry MBB always has all CSRs pristine.
209209 MachineFrameInfo *MFI = Fn.getFrameInfo();
210210
211211 // Get the callee saved register list...
212 const unsigned *CSRegs = RegInfo->getCalleeSavedRegs(&Fn);
212 const uint16_t *CSRegs = RegInfo->getCalleeSavedRegs(&Fn);
213213
214214 // These are used to keep track the callee-save area. Initialize them.
215215 MinCSFrameIndex = INT_MAX;
4242 }
4343
4444 // Does this MF have different CSRs?
45 const unsigned *CSR = TRI->getCalleeSavedRegs(MF);
45 const uint16_t *CSR = TRI->getCalleeSavedRegs(MF);
4646 if (Update || CSR != CalleeSaved) {
4747 // Build a CSRNum map. Every CSR alias gets an entry pointing to the last
4848 // overlapping CSR.
4848
4949 // Callee saved registers of last MF. Assumed to be valid until the next
5050 // runOnFunction() call.
51 const unsigned *CalleeSaved;
51 const uint16_t *CalleeSaved;
5252
5353 // Map register number to CalleeSaved index + 1;
5454 SmallVector CSRNum;
9494
9595 // Create callee-saved registers bitvector.
9696 CalleeSavedRegs.resize(NumPhysRegs);
97 const unsigned *CSRegs = TRI->getCalleeSavedRegs(&MF);
97 const uint16_t *CSRegs = TRI->getCalleeSavedRegs(&MF);
9898 if (CSRegs != NULL)
9999 for (unsigned i = 0; CSRegs[i]; ++i)
100100 CalleeSavedRegs.set(CSRegs[i]);
6060 BasePtr(ARM::R6) {
6161 }
6262
63 const unsigned*
63 const uint16_t*
6464 ARMBaseRegisterInfo::getCalleeSavedRegs(const MachineFunction *MF) const {
6565 return (STI.isTargetIOS()) ? CSR_iOS_SaveList : CSR_AAPCS_SaveList;
6666 }
9393
9494 public:
9595 /// Code Generation virtual methods...
96 const unsigned *getCalleeSavedRegs(const MachineFunction *MF = 0) const;
96 const uint16_t *getCalleeSavedRegs(const MachineFunction *MF = 0) const;
9797 const uint32_t *getCallPreservedMask(CallingConv::ID) const;
9898
9999 BitVector getReservedRegs(const MachineFunction &MF) const;
8080 return hasReservedCallFrame(MF) || MF.getFrameInfo()->hasVarSizedObjects();
8181 }
8282
83 static bool isCalleeSavedRegister(unsigned Reg, const unsigned *CSRegs) {
83 static bool isCalleeSavedRegister(unsigned Reg, const uint16_t *CSRegs) {
8484 for (unsigned i = 0; CSRegs[i]; ++i)
8585 if (Reg == CSRegs[i])
8686 return true;
8989
9090 static bool isCSRestore(MachineInstr *MI,
9191 const ARMBaseInstrInfo &TII,
92 const unsigned *CSRegs) {
92 const uint16_t *CSRegs) {
9393 // Integer spill area is handled with "pop".
9494 if (MI->getOpcode() == ARM::LDMIA_RET ||
9595 MI->getOpcode() == ARM::t2LDMIA_RET ||
358358 emitSPUpdate(isARM, MBB, MBBI, dl, TII, NumBytes);
359359 } else {
360360 // Unwind MBBI to point to first LDR / VLDRD.
361 const unsigned *CSRegs = RegInfo->getCalleeSavedRegs();
361 const uint16_t *CSRegs = RegInfo->getCalleeSavedRegs();
362362 if (MBBI != MBB.begin()) {
363363 do
364364 --MBBI;
12431243
12441244 // Don't spill FP if the frame can be eliminated. This is determined
12451245 // by scanning the callee-save registers to see if any is used.
1246 const unsigned *CSRegs = RegInfo->getCalleeSavedRegs();
1246 const uint16_t *CSRegs = RegInfo->getCalleeSavedRegs();
12471247 for (unsigned i = 0; CSRegs[i]; ++i) {
12481248 unsigned Reg = CSRegs[i];
12491249 bool Spilled = false;
60706070 // N.B. the order the invoke BBs are processed in doesn't matter here.
60716071 const ARMBaseInstrInfo *AII = static_cast(TII);
60726072 const ARMBaseRegisterInfo &RI = AII->getRegisterInfo();
6073 const unsigned *SavedRegs = RI.getCalleeSavedRegs(MF);
6073 const uint16_t *SavedRegs = RI.getCalleeSavedRegs(MF);
60746074 SmallVector MBBLPads;
60756075 for (SmallPtrSet::iterator
60766076 I = InvokeBBs.begin(), E = InvokeBBs.end(); I != E; ++I) {
174174 AFI->setShouldRestoreSPFromFP(true);
175175 }
176176
177 static bool isCalleeSavedRegister(unsigned Reg, const unsigned *CSRegs) {
177 static bool isCalleeSavedRegister(unsigned Reg, const uint16_t *CSRegs) {
178178 for (unsigned i = 0; CSRegs[i]; ++i)
179179 if (Reg == CSRegs[i])
180180 return true;
181181 return false;
182182 }
183183
184 static bool isCSRestore(MachineInstr *MI, const unsigned *CSRegs) {
184 static bool isCSRestore(MachineInstr *MI, const uint16_t *CSRegs) {
185185 if (MI->getOpcode() == ARM::tLDRspi &&
186186 MI->getOperand(1).isFI() &&
187187 isCalleeSavedRegister(MI->getOperand(0).getReg(), CSRegs))
213213
214214 unsigned VARegSaveSize = AFI->getVarArgsRegSaveSize();
215215 int NumBytes = (int)MFI->getStackSize();
216 const unsigned *CSRegs = RegInfo->getCalleeSavedRegs();
216 const uint16_t *CSRegs = RegInfo->getCalleeSavedRegs();
217217 unsigned FramePtr = RegInfo->getFrameRegister(MF);
218218
219219 if (!AFI->hasStackFrame()) {
196196 return &SPU::R32CRegClass;
197197 }
198198
199 const unsigned *
199 const uint16_t *
200200 SPURegisterInfo::getCalleeSavedRegs(const MachineFunction *MF) const
201201 {
202202 // Cell ABI calling convention
203 static const unsigned SPU_CalleeSaveRegs[] = {
203 static const uint16_t SPU_CalleeSaveRegs[] = {
204204 SPU::R80, SPU::R81, SPU::R82, SPU::R83,
205205 SPU::R84, SPU::R85, SPU::R86, SPU::R87,
206206 SPU::R88, SPU::R89, SPU::R90, SPU::R91,
5656 }
5757
5858 //! Return the array of callee-saved registers
59 virtual const unsigned* getCalleeSavedRegs(const MachineFunction *MF) const;
59 virtual const uint16_t* getCalleeSavedRegs(const MachineFunction *MF) const;
6060
6161 //! Allow for scavenging, so we can get scratch registers when needed.
6262 virtual bool requiresRegisterScavenging(const MachineFunction &MF) const
4343 TII(tii) {
4444 }
4545
46 const unsigned* HexagonRegisterInfo::getCalleeSavedRegs(const MachineFunction
46 const uint16_t* HexagonRegisterInfo::getCalleeSavedRegs(const MachineFunction
4747 *MF)
4848 const {
49 static const unsigned CalleeSavedRegsV2[] = {
50 Hexagon::R24, Hexagon::R25, Hexagon::R26, Hexagon::R27, 0
49 static const uint16_t CalleeSavedRegsV2[] = {
50 Hexagon::R24, Hexagon::R25, Hexagon::R26, Hexagon::R27, 0
5151 };
52 static const unsigned CalleeSavedRegsV3[] = {
52 static const uint16_t CalleeSavedRegsV3[] = {
5353 Hexagon::R16, Hexagon::R17, Hexagon::R18, Hexagon::R19,
5454 Hexagon::R20, Hexagon::R21, Hexagon::R22, Hexagon::R23,
5555 Hexagon::R24, Hexagon::R25, Hexagon::R26, Hexagon::R27, 0
4747 HexagonRegisterInfo(HexagonSubtarget &st, const HexagonInstrInfo &tii);
4848
4949 /// Code Generation virtual methods...
50 const unsigned *getCalleeSavedRegs(const MachineFunction *MF = 0) const;
50 const uint16_t *getCalleeSavedRegs(const MachineFunction *MF = 0) const;
5151
5252 const TargetRegisterClass* const* getCalleeSavedRegClasses(
5353 const MachineFunction *MF = 0) const;
5353 //===----------------------------------------------------------------------===//
5454
5555 /// MBlaze Callee Saved Registers
56 const unsigned* MBlazeRegisterInfo::
56 const uint16_t* MBlazeRegisterInfo::
5757 getCalleeSavedRegs(const MachineFunction *MF) const {
5858 // MBlaze callee-save register range is R20 - R31
59 static const unsigned CalleeSavedRegs[] = {
59 static const uint16_t CalleeSavedRegs[] = {
6060 MBlaze::R20, MBlaze::R21, MBlaze::R22, MBlaze::R23,
6161 MBlaze::R24, MBlaze::R25, MBlaze::R26, MBlaze::R27,
6262 MBlaze::R28, MBlaze::R29, MBlaze::R30, MBlaze::R31,
4545 static unsigned getPICCallReg();
4646
4747 /// Code Generation virtual methods...
48 const unsigned *getCalleeSavedRegs(const MachineFunction* MF = 0) const;
48 const uint16_t *getCalleeSavedRegs(const MachineFunction* MF = 0) const;
4949
5050 BitVector getReservedRegs(const MachineFunction &MF) const;
5151
3737 StackAlign = TM.getFrameLowering()->getStackAlignment();
3838 }
3939
40 const unsigned*
40 const uint16_t*
4141 MSP430RegisterInfo::getCalleeSavedRegs(const MachineFunction *MF) const {
4242 const TargetFrameLowering *TFI = MF->getTarget().getFrameLowering();
4343 const Function* F = MF->getFunction();
44 static const unsigned CalleeSavedRegs[] = {
44 static const uint16_t CalleeSavedRegs[] = {
4545 MSP430::FPW, MSP430::R5W, MSP430::R6W, MSP430::R7W,
4646 MSP430::R8W, MSP430::R9W, MSP430::R10W, MSP430::R11W,
4747 0
4848 };
49 static const unsigned CalleeSavedRegsFP[] = {
49 static const uint16_t CalleeSavedRegsFP[] = {
5050 MSP430::R5W, MSP430::R6W, MSP430::R7W,
5151 MSP430::R8W, MSP430::R9W, MSP430::R10W, MSP430::R11W,
5252 0
5353 };
54 static const unsigned CalleeSavedRegsIntr[] = {
54 static const uint16_t CalleeSavedRegsIntr[] = {
5555 MSP430::FPW, MSP430::R5W, MSP430::R6W, MSP430::R7W,
5656 MSP430::R8W, MSP430::R9W, MSP430::R10W, MSP430::R11W,
5757 MSP430::R12W, MSP430::R13W, MSP430::R14W, MSP430::R15W,
5858 0
5959 };
60 static const unsigned CalleeSavedRegsIntrFP[] = {
60 static const uint16_t CalleeSavedRegsIntrFP[] = {
6161 MSP430::R5W, MSP430::R6W, MSP430::R7W,
6262 MSP430::R8W, MSP430::R9W, MSP430::R10W, MSP430::R11W,
6363 MSP430::R12W, MSP430::R13W, MSP430::R14W, MSP430::R15W,
3535 MSP430RegisterInfo(MSP430TargetMachine &tm, const TargetInstrInfo &tii);
3636
3737 /// Code Generation virtual methods...
38 const unsigned *getCalleeSavedRegs(const MachineFunction *MF = 0) const;
38 const uint16_t *getCalleeSavedRegs(const MachineFunction *MF = 0) const;
3939
4040 BitVector getReservedRegs(const MachineFunction &MF) const;
4141 const TargetRegisterClass* getPointerRegClass(unsigned Kind = 0) const;
5252 //===----------------------------------------------------------------------===//
5353
5454 /// Mips Callee Saved Registers
55 const unsigned* MipsRegisterInfo::
55 const uint16_t* MipsRegisterInfo::
5656 getCalleeSavedRegs(const MachineFunction *MF) const
5757 {
5858 if (Subtarget.isSingleFloat())
4141 void adjustMipsStackFrame(MachineFunction &MF) const;
4242
4343 /// Code Generation virtual methods...
44 const unsigned *getCalleeSavedRegs(const MachineFunction* MF = 0) const;
44 const uint16_t *getCalleeSavedRegs(const MachineFunction* MF = 0) const;
4545 const uint32_t *getCallPreservedMask(CallingConv::ID) const;
4646
4747 BitVector getReservedRegs(const MachineFunction &MF) const;
3131 PTXRegisterInfo(PTXTargetMachine &TM,
3232 const TargetInstrInfo &tii);
3333
34 virtual const unsigned
34 virtual const uint16_t
3535 *getCalleeSavedRegs(const MachineFunction *MF = 0) const {
36 static const unsigned CalleeSavedRegs[] = { 0 };
36 static const uint16_t CalleeSavedRegs[] = { 0 };
3737 return CalleeSavedRegs; // save nothing
3838 }
3939
9797 return &PPC::GPRCRegClass;
9898 }
9999
100 const unsigned*
100 const uint16_t*
101101 PPCRegisterInfo::getCalleeSavedRegs(const MachineFunction *MF) const {
102102 // 32-bit Darwin calling convention.
103 static const unsigned Darwin32_CalleeSavedRegs[] = {
103 static const uint16_t Darwin32_CalleeSavedRegs[] = {
104104 PPC::R13, PPC::R14, PPC::R15,
105105 PPC::R16, PPC::R17, PPC::R18, PPC::R19,
106106 PPC::R20, PPC::R21, PPC::R22, PPC::R23,
122122 };
123123
124124 // 32-bit SVR4 calling convention.
125 static const unsigned SVR4_CalleeSavedRegs[] = {
125 static const uint16_t SVR4_CalleeSavedRegs[] = {
126126 PPC::R14, PPC::R15,
127127 PPC::R16, PPC::R17, PPC::R18, PPC::R19,
128128 PPC::R20, PPC::R21, PPC::R22, PPC::R23,
146146 0
147147 };
148148 // 64-bit Darwin calling convention.
149 static const unsigned Darwin64_CalleeSavedRegs[] = {
149 static const uint16_t Darwin64_CalleeSavedRegs[] = {
150150 PPC::X14, PPC::X15,
151151 PPC::X16, PPC::X17, PPC::X18, PPC::X19,
152152 PPC::X20, PPC::X21, PPC::X22, PPC::X23,
168168 };
169169
170170 // 64-bit SVR4 calling convention.
171 static const unsigned SVR4_64_CalleeSavedRegs[] = {
171 static const uint16_t SVR4_64_CalleeSavedRegs[] = {
172172 PPC::X14, PPC::X15,
173173 PPC::X16, PPC::X17, PPC::X18, PPC::X19,
174174 PPC::X20, PPC::X21, PPC::X22, PPC::X23,
4040 MachineFunction &MF) const;
4141
4242 /// Code Generation virtual methods...
43 const unsigned *getCalleeSavedRegs(const MachineFunction* MF = 0) const;
43 const uint16_t *getCalleeSavedRegs(const MachineFunction* MF = 0) const;
4444
4545 BitVector getReservedRegs(const MachineFunction &MF) const;
4646
3232 : SparcGenRegisterInfo(SP::I7), Subtarget(st), TII(tii) {
3333 }
3434
35 const unsigned* SparcRegisterInfo::getCalleeSavedRegs(const MachineFunction *MF)
35 const uint16_t* SparcRegisterInfo::getCalleeSavedRegs(const MachineFunction *MF)
3636 const {
37 static const unsigned CalleeSavedRegs[] = { 0 };
37 static const uint16_t CalleeSavedRegs[] = { 0 };
3838 return CalleeSavedRegs;
3939 }
4040
3131 SparcRegisterInfo(SparcSubtarget &st, const TargetInstrInfo &tii);
3232
3333 /// Code Generation virtual methods...
34 const unsigned *getCalleeSavedRegs(const MachineFunction *MF = 0) const;
34 const uint16_t *getCalleeSavedRegs(const MachineFunction *MF = 0) const;
3535
3636 BitVector getReservedRegs(const MachineFunction &MF) const;
3737
225225 }
226226 }
227227
228 const unsigned *
228 const uint16_t *
229229 X86RegisterInfo::getCalleeSavedRegs(const MachineFunction *MF) const {
230230 bool callsEHReturn = false;
231231 bool ghcCall = false;
9494
9595 /// getCalleeSavedRegs - Return a null-terminated list of all of the
9696 /// callee-save registers on this target.
97 const unsigned *getCalleeSavedRegs(const MachineFunction* MF = 0) const;
97 const uint16_t *getCalleeSavedRegs(const MachineFunction* MF = 0) const;
9898 const uint32_t *getCallPreservedMask(CallingConv::ID) const;
9999
100100 /// getReservedRegs - Returns a bitset indexed by physical register number
7272 MF.getFunction()->needsUnwindTableEntry();
7373 }
7474
75 const unsigned* XCoreRegisterInfo::getCalleeSavedRegs(const MachineFunction *MF)
75 const uint16_t* XCoreRegisterInfo::getCalleeSavedRegs(const MachineFunction *MF)
7676 const {
77 static const unsigned CalleeSavedRegs[] = {
77 static const uint16_t CalleeSavedRegs[] = {
7878 XCore::R4, XCore::R5, XCore::R6, XCore::R7,
7979 XCore::R8, XCore::R9, XCore::R10, XCore::LR,
8080 0
4343
4444 /// Code Generation virtual methods...
4545
46 const unsigned *getCalleeSavedRegs(const MachineFunction *MF = 0) const;
46 const uint16_t *getCalleeSavedRegs(const MachineFunction *MF = 0) const;
4747
4848 BitVector getReservedRegs(const MachineFunction &MF) const;
4949
844844 const unsigned BVWords = (RegisterClasses.size()+31)/32;
845845 BitVector BV(RegisterClasses.size());
846846
847 OS << " static const unsigned Table[" << RegisterClasses.size()
847 OS << " static const uint32_t Table[" << RegisterClasses.size()
848848 << "][" << SubRegIndices.size() << "][" << BVWords << "] = {\n";
849849 for (unsigned rci = 0, rce = RegisterClasses.size(); rci != rce; ++rci) {
850850 const CodeGenRegisterClass &RC = *RegisterClasses[rci];
911911 assert(Regs && "Cannot expand CalleeSavedRegs instance");
912912
913913 // Emit the *_SaveList list of callee-saved registers.
914 OS << "static const unsigned " << CSRSet->getName()
914 OS << "static const uint16_t " << CSRSet->getName()
915915 << "_SaveList[] = { ";
916916 for (unsigned r = 0, re = Regs->size(); r != re; ++r)
917917 OS << getQualifiedName((*Regs)[r]) << ", ";