llvm.org GIT mirror llvm / 00bc445
Fix TableGen -gen-disassembler output for bit fields with an offset. This fixes bit assignments like this Inst{7-0} = Foo{9-2} Patch by Steve King. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218560 91177308-0d34-0410-b5e6-96231b3b80d8 Craig Topper 5 years ago
2 changed file(s) with 79 addition(s) and 1 deletion(s). Raw diff Collapse all Expand all
0 // RUN: llvm-tblgen -gen-disassembler -I %p/../../include %s | FileCheck %s
1
2 include "llvm/Target/Target.td"
3
4 def archInstrInfo : InstrInfo { }
5
6 def arch : Target {
7 let InstructionSet = archInstrInfo;
8 }
9
10 def Myi32 : Operand {
11 let DecoderMethod = "DecodeMyi32";
12 }
13
14
15 let OutOperandList = (outs), Size = 2 in {
16
17 def foo : Instruction {
18 let InOperandList = (ins i32imm:$factor);
19 field bits<16> Inst;
20 bits<32> factor;
21 let Inst{7-0} = 0xAA;
22 let Inst{14-8} = factor{6-0}; // no offset
23 let AsmString = "foo $factor";
24 field bits<16> SoftFail = 0;
25 }
26
27 def bar : Instruction {
28 let InOperandList = (ins i32imm:$factor);
29 field bits<16> Inst;
30 bits<32> factor;
31 let Inst{7-0} = 0xBB;
32 let Inst{15-8} = factor{10-3}; // offset by 3
33 let AsmString = "bar $factor";
34 field bits<16> SoftFail = 0;
35 }
36
37 def biz : Instruction {
38 let InOperandList = (ins i32imm:$factor);
39 field bits<16> Inst;
40 bits<32> factor;
41 let Inst{7-0} = 0xCC;
42 let Inst{11-8,15-12} = factor{10-3}; // offset by 3, multipart
43 let AsmString = "biz $factor";
44 field bits<16> SoftFail = 0;
45 }
46
47 def baz : Instruction {
48 let InOperandList = (ins Myi32:$factor);
49 field bits<16> Inst;
50 bits<32> factor;
51 let Inst{7-0} = 0xDD;
52 let Inst{15-8} = factor{11-4}; // offset by 4 + custom decode
53 let AsmString = "baz $factor";
54 field bits<16> SoftFail = 0;
55 }
56
57 def bum : Instruction {
58 let InOperandList = (ins i32imm:$factor);
59 field bits<16> Inst;
60 bits<32> factor;
61 let Inst{7-0} = 0xEE;
62 let Inst{15-8} = !srl(factor,5);
63 let AsmString = "bum $factor";
64 field bits<16> SoftFail = 0;
65 }
66 }
67
68
69 // CHECK: tmp = fieldFromInstruction(insn, 8, 7);
70 // CHECK: tmp = fieldFromInstruction(insn, 8, 8) << 3;
71 // CHECK: tmp |= (fieldFromInstruction(insn, 8, 4) << 7);
72 // CHECK: tmp |= (fieldFromInstruction(insn, 12, 4) << 3);
73 // CHECK: tmp = fieldFromInstruction(insn, 8, 8) << 4;
10501050 OperandInfo::const_iterator OI = OpInfo.begin();
10511051 o.indent(Indentation) << "tmp = fieldFromInstruction"
10521052 << "(insn, " << OI->Base << ", " << OI->Width
1053 << ");\n";
1053 << ")";
1054 if (OI->Offset)
1055 o << " << " << OI->Offset;
1056 o << ";\n";
1057
10541058 } else {
10551059 o.indent(Indentation) << "tmp = 0;\n";
10561060 for (OperandInfo::const_iterator OI = OpInfo.begin(), OE = OpInfo.end();