llvm.org GIT mirror llvm / 008b58c
Revert r141932, r141936 and r141937. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141959 91177308-0d34-0410-b5e6-96231b3b80d8 Akira Hatanaka 8 years ago
4 changed file(s) with 1 addition(s) and 299 deletion(s). Raw diff Collapse all Expand all
1111 MipsAsmPrinter.cpp
1212 MipsCodeEmitter.cpp
1313 MipsDelaySlotFiller.cpp
14 MipsELFWriterInfo.cpp
1514 MipsEmitGPRestore.cpp
1615 MipsExpandPseudo.cpp
1716 MipsJITInfo.cpp
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lib/Target/Mips/MipsELFWriterInfo.cpp less more
None //===-- MipsELFWriterInfo.cpp - ELF Writer Info for the Mips backend ------===//
1 //
2 // The LLVM Compiler Infrastructure
3 //
4 // This file is distributed under the University of Illinois Open Source
5 // License. See LICENSE.TXT for details.
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file implements ELF writer information for the Mips backend.
10 //
11 //===----------------------------------------------------------------------===//
12 #include "MipsELFWriterInfo.h"
13 #include "MipsRelocations.h"
14 #include "llvm/Function.h"
15 #include "llvm/Support/ELF.h"
16 #include "llvm/Support/ErrorHandling.h"
17 #include "llvm/Target/TargetData.h"
18 #include "llvm/Target/TargetMachine.h"
19
20 using namespace llvm;
21
22 //===----------------------------------------------------------------------===//
23 // Implementation of the MipsELFWriterInfo class
24 //===----------------------------------------------------------------------===//
25
26 MipsELFWriterInfo::MipsELFWriterInfo(bool is64Bit_, bool isLittleEndian_)
27 : TargetELFWriterInfo(is64Bit_, isLittleEndian_) {
28 EMachine = EM_MIPS;
29 }
30
31 MipsELFWriterInfo::~MipsELFWriterInfo() {}
32
33 unsigned MipsELFWriterInfo::getRelocationType(unsigned MachineRelTy) const {
34 if (is64Bit) {
35 switch(MachineRelTy) {
36 default:
37 llvm_unreachable("unknown Mips_64 machine relocation type");
38 }
39 } else {
40 switch(MachineRelTy) {
41 case Mips::reloc_mips_pcrel:
42 return ELF::R_MIPS_PC16;
43 case Mips::reloc_mips_hi:
44 return ELF::R_MIPS_HI16;
45 case Mips::reloc_mips_lo:
46 return ELF::R_MIPS_LO16;
47 case Mips::reloc_mips_j_jal:
48 return ELF::R_MIPS_26;
49 case Mips::reloc_mips_16:
50 return ELF::R_MIPS_16;
51 case Mips::reloc_mips_32:
52 return ELF::R_MIPS_32;
53 case Mips::reloc_mips_rel32:
54 return ELF::R_MIPS_REL32;
55 case Mips::reloc_mips_gprel16:
56 return ELF::R_MIPS_GPREL16;
57 case Mips::reloc_mips_literal:
58 return ELF::R_MIPS_LITERAL;
59 case Mips::reloc_mips_got16:
60 return ELF::R_MIPS_GOT16;
61 case Mips::reloc_mips_call16:
62 return ELF::R_MIPS_CALL16;
63 case Mips::reloc_mips_gprel32:
64 return ELF::R_MIPS_GPREL32;
65 case Mips::reloc_mips_shift5:
66 return ELF::R_MIPS_SHIFT5;
67 case Mips::reloc_mips_shift6:
68 return ELF::R_MIPS_SHIFT6;
69 case Mips::reloc_mips_64:
70 return ELF::R_MIPS_64;
71 case Mips::reloc_mips_tlsgd:
72 return ELF::R_MIPS_TLS_GD;
73 case Mips::reloc_mips_gottprel:
74 return ELF::R_MIPS_TLS_GOTTPREL;
75 case Mips::reloc_mips_tprel_hi:
76 return ELF::R_MIPS_TLS_TPREL_HI16;
77 case Mips::reloc_mips_tprel_lo:
78 return ELF::R_MIPS_TLS_TPREL_LO16;
79 case Mips::reloc_mips_branch_pcrel:
80 return ELF::R_MIPS_PC16;
81 default:
82 llvm_unreachable("unknown Mips machine relocation type");
83 }
84 }
85 return 0;
86 }
87
88 long int MipsELFWriterInfo::getDefaultAddendForRelTy(unsigned RelTy,
89 long int Modifier) const {
90 if (is64Bit) {
91 switch(RelTy) {
92 default:
93 llvm_unreachable("unknown Mips_64 relocation type");
94 }
95 } else {
96 switch(RelTy) {
97 case ELF::R_MIPS_PC16: return Modifier - 4;
98 default:
99 llvm_unreachable("unknown Mips relocation type");
100 }
101 }
102 return 0;
103 }
104
105 unsigned MipsELFWriterInfo::getRelocationTySize(unsigned RelTy) const {
106 if (is64Bit) {
107 switch(RelTy) {
108 case ELF::R_MIPS_PC16:
109 case ELF::R_MIPS_HI16:
110 case ELF::R_MIPS_LO16:
111 case ELF::R_MIPS_26:
112 case ELF::R_MIPS_16:
113 case ELF::R_MIPS_32:
114 case ELF::R_MIPS_REL32:
115 case ELF::R_MIPS_GPREL16:
116 case ELF::R_MIPS_LITERAL:
117 case ELF::R_MIPS_GOT16:
118 case ELF::R_MIPS_CALL16:
119 case ELF::R_MIPS_GPREL32:
120 case ELF::R_MIPS_SHIFT5:
121 case ELF::R_MIPS_SHIFT6:
122 return 32;
123 case ELF::R_MIPS_64:
124 return 64;
125 default:
126 llvm_unreachable("unknown Mips_64 relocation type");
127 }
128 } else {
129 switch(RelTy) {
130 case ELF::R_MIPS_PC16:
131 case ELF::R_MIPS_HI16:
132 case ELF::R_MIPS_LO16:
133 case ELF::R_MIPS_26:
134 case ELF::R_MIPS_16:
135 case ELF::R_MIPS_32:
136 case ELF::R_MIPS_REL32:
137 case ELF::R_MIPS_GPREL16:
138 case ELF::R_MIPS_LITERAL:
139 case ELF::R_MIPS_GOT16:
140 case ELF::R_MIPS_CALL16:
141 case ELF::R_MIPS_GPREL32:
142 case ELF::R_MIPS_SHIFT5:
143 case ELF::R_MIPS_SHIFT6:
144 return 32;
145 default:
146 llvm_unreachable("unknown Mips relocation type");
147 }
148 }
149 return 0;
150 }
151
152 bool MipsELFWriterInfo::isPCRelativeRel(unsigned RelTy) const {
153 if (is64Bit) {
154 switch(RelTy) {
155 case ELF::R_MIPS_PC16:
156 return true;
157 case ELF::R_MIPS_HI16:
158 case ELF::R_MIPS_LO16:
159 case ELF::R_MIPS_26:
160 case ELF::R_MIPS_16:
161 case ELF::R_MIPS_32:
162 case ELF::R_MIPS_REL32:
163 case ELF::R_MIPS_GPREL16:
164 case ELF::R_MIPS_LITERAL:
165 case ELF::R_MIPS_GOT16:
166 case ELF::R_MIPS_CALL16:
167 case ELF::R_MIPS_GPREL32:
168 case ELF::R_MIPS_SHIFT5:
169 case ELF::R_MIPS_SHIFT6:
170 case ELF::R_MIPS_64:
171 return false;
172 default:
173 llvm_unreachable("unknown Mips_64 relocation type");
174 }
175 } else {
176 switch(RelTy) {
177 case ELF::R_MIPS_PC16:
178 return true;
179 case ELF::R_MIPS_HI16:
180 case ELF::R_MIPS_LO16:
181 case ELF::R_MIPS_26:
182 case ELF::R_MIPS_16:
183 case ELF::R_MIPS_32:
184 case ELF::R_MIPS_REL32:
185 case ELF::R_MIPS_GPREL16:
186 case ELF::R_MIPS_LITERAL:
187 case ELF::R_MIPS_GOT16:
188 case ELF::R_MIPS_CALL16:
189 case ELF::R_MIPS_GPREL32:
190 case ELF::R_MIPS_SHIFT5:
191 case ELF::R_MIPS_SHIFT6:
192 return false;
193 default:
194 llvm_unreachable("unknown Mips relocation type");
195 }
196 }
197 return 0;
198 }
199
200 unsigned MipsELFWriterInfo::getAbsoluteLabelMachineRelTy() const {
201 assert("getAbsoluteLabelMachineRelTy unknown for this relocation type");
202 return 0;
203 }
204
205 long int MipsELFWriterInfo::computeRelocation(unsigned SymOffset,
206 unsigned RelOffset,
207 unsigned RelTy) const {
208 if (RelTy == ELF::R_MIPS_PC16)
209 return SymOffset - (RelOffset + 4);
210 else
211 assert("computeRelocation unknown for this relocation type");
212
213 return 0;
214 }
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lib/Target/Mips/MipsELFWriterInfo.h less more
None //===-- MipsELFWriterInfo.h - ELF Writer Info for Mips ----------*- C++ -*-===//
1 //
2 // The LLVM Compiler Infrastructure
3 //
4 // This file is distributed under the University of Illinois Open Source
5 // License. See LICENSE.TXT for details.
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file implements ELF writer information for the Mips backend.
10 //
11 //===----------------------------------------------------------------------===//
12
13 #ifndef Mips_ELF_WRITER_INFO_H
14 #define Mips_ELF_WRITER_INFO_H
15
16 #include "llvm/Target/TargetELFWriterInfo.h"
17
18 namespace llvm {
19
20 class MipsELFWriterInfo : public TargetELFWriterInfo {
21
22 public:
23 MipsELFWriterInfo(bool, bool);
24 virtual ~MipsELFWriterInfo();
25
26 /// getRelocationType - Returns the target specific ELF Relocation type.
27 /// 'MachineRelTy' contains the object code independent relocation type
28 virtual unsigned getRelocationType(unsigned MachineRelTy) const;
29
30 /// hasRelocationAddend - True if the target uses an addend in the
31 /// ELF relocation entry.
32 virtual bool hasRelocationAddend() const { return true; }
33 // FIXME Should be case by case
34
35 /// getDefaultAddendForRelTy - Gets the default addend value for a
36 /// relocation entry based on the target ELF relocation type.
37 virtual long int getDefaultAddendForRelTy(unsigned RelTy,
38 long int Modifier = 0) const;
39
40 /// getRelTySize - Returns the size of relocatable field in bits
41 virtual unsigned getRelocationTySize(unsigned RelTy) const;
42
43 /// isPCRelativeRel - True if the relocation type is pc relative
44 virtual bool isPCRelativeRel(unsigned RelTy) const;
45
46 /// getJumpTableRelocationTy - Returns the machine relocation type used
47 /// to reference a jumptable.
48 virtual unsigned getAbsoluteLabelMachineRelTy() const;
49
50 /// computeRelocation - Some relocatable fields could be relocated
51 /// directly, avoiding the relocation symbol emission, compute the
52 /// final relocation value for this symbol.
53 virtual long int computeRelocation(unsigned SymOffset, unsigned RelOffset,
54 unsigned RelTy) const;
55 };
56
57 } // end llvm namespace
58
59 #endif // Mips_ELF_WRITER_INFO_H
3232 reloc_mips_lo = 3,
3333
3434 // reloc_mips_26 - lower 28 bits of the address, shifted right by 2.
35 reloc_mips_26 = 4,
36
37 // I am starting here with the rest of the relocations because
38 // I have no idea if the above enumerations are assumed somewhere
39 // else
40 reloc_mips_16 = 6, // R_MIPS_16
41 reloc_mips_32 = 7, // R_MIPS_32
42 reloc_mips_rel32 = 8, // R_MIPS_REL32
43 reloc_mips_gprel16 = 10, // R_MIPS_GPREL16
44 reloc_mips_literal = 12, // R_MIPS_LITERAL
45 reloc_mips_got16 = 13, // R_MIPS_GOT16
46 reloc_mips_call16 = 15, // R_MIPS_CALL16
47 reloc_mips_gprel32 = 17, // R_MIPS_GPREL32
48 reloc_mips_shift5 = 18, // R_MIPS_SHIFT5
49 reloc_mips_shift6 = 19, // R_MIPS_SHIFT6
50 reloc_mips_64 = 20, // R_MIPS_64
51 reloc_mips_tlsgd = 21, // R_MIPS_TLS_GD
52 reloc_mips_gottprel = 22, // R_MIPS_TLS_GOTTPREL
53 reloc_mips_tprel_hi = 23, // R_MIPS_TLS_TPREL_HI16
54 reloc_mips_tprel_lo = 24, // R_MIPS_TLS_TPREL_LO16
55 reloc_mips_branch_pcrel = 25, // This should become R_MIPS_PC16
56 reloc_mips_pcrel = 26, // R_MIPS_PC16
57 reloc_mips_j_jal = 27 // R_MIPS_26
35 reloc_mips_26 = 4
5836 };
5937 }
6038 }