llvm.org GIT mirror llvm / 0084250
revert r284541. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@284544 91177308-0d34-0410-b5e6-96231b3b80d8 Dehao Chen 3 years ago
10 changed file(s) with 132 addition(s) and 189 deletion(s). Raw diff Collapse all Expand all
2323 #include "llvm/Analysis/AliasAnalysis.h"
2424 #include "llvm/CodeGen/MachineBasicBlock.h"
2525 #include "llvm/CodeGen/MachineBlockFrequencyInfo.h"
26 #include "llvm/CodeGen/MachineBranchProbabilityInfo.h"
2726 #include "llvm/CodeGen/MachineDominators.h"
2827 #include "llvm/CodeGen/MachineFunction.h"
2928 #include "llvm/CodeGen/MachineFunctionPass.h"
6059 cl::desc("Use block frequency info to find successors to sink"),
6160 cl::init(true), cl::Hidden);
6261
63 static cl::opt SplitEdgeProbabilityThreshold(
64 "machine-sink-split-probability-threshold",
65 cl::desc(
66 "Percentage threshold for splitting single-instruction critical edge. "
67 "If the branch threshold is higher than this threshold, we allow "
68 "speculative execution of up to 1 instruction to avoid branching to "
69 "splitted critical edge"),
70 cl::init(40), cl::Hidden);
71
7262 STATISTIC(NumSunk, "Number of machine instructions sunk");
7363 STATISTIC(NumSplit, "Number of critical edges split");
7464 STATISTIC(NumCoalesces, "Number of copies coalesced");
8373 MachinePostDominatorTree *PDT; // Machine post dominator tree
8474 MachineLoopInfo *LI;
8575 const MachineBlockFrequencyInfo *MBFI;
86 const MachineBranchProbabilityInfo *MBPI;
8776 AliasAnalysis *AA;
8877
8978 // Remember which edges have been considered for breaking.
115104 AU.addRequired();
116105 AU.addRequired();
117106 AU.addRequired();
118 AU.addRequired();
119107 AU.addPreserved();
120108 AU.addPreserved();
121109 AU.addPreserved();
294282 PDT = &getAnalysis();
295283 LI = &getAnalysis();
296284 MBFI = UseBlockFreqInfo ? &getAnalysis() : nullptr;
297 MBPI = &getAnalysis();
298285 AA = &getAnalysis().getAAResults();
299286
300287 bool EverMadeChange = false;
393380 return true;
394381
395382 if (!MI.isCopy() && !TII->isAsCheapAsAMove(MI))
396 return true;
397
398 if (MBPI->getEdgeProbability(From, To) <=
399 BranchProbability(SplitEdgeProbabilityThreshold, 100))
400383 return true;
401384
402385 // MI is cheap, we probably don't want to break the critical edge for it.
3737 ; CHECK-ARMV6-NEXT: uxtb [[DESIRED:r[0-9]+]], r1
3838 ; CHECK-ARMV6-NEXT: [[TRY:.LBB[0-9_]+]]:
3939 ; CHECK-ARMV6-NEXT: ldrexb [[LD:r[0-9]+]], [r0]
40 ; CHECK-ARMV6-NEXT: mov [[RES:r[0-9]+]], #0
4041 ; CHECK-ARMV6-NEXT: cmp [[LD]], [[DESIRED]]
41 ; CHECK-ARMV6-NEXT: movne [[RES:r[0-9]+]], #0
42 ; CHECK-ARMV6-NEXT: bxne lr
42 ; CHECK-ARMV6-NEXT: bne [[END:.LBB[0-9_]+]]
4343 ; CHECK-ARMV6-NEXT: strexb [[SUCCESS:r[0-9]+]], r2, [r0]
44 ; CHECK-ARMV6-NEXT: mov [[RES]], #1
4445 ; CHECK-ARMV6-NEXT: cmp [[SUCCESS]], #0
45 ; CHECK-ARMV6-NEXT: moveq [[RES]], #1
46 ; CHECK-ARMV6-NEXT: bxeq lr
47 ; CHECK-ARMV6-NEXT: b [[TRY]]
46 ; CHECK-ARMV6-NEXT: bne [[TRY]]
47 ; CHECK-ARMV6-NEXT: [[END]]:
48 ; CHECK-ARMV6-NEXT: mov r0, [[RES]]
49 ; CHECK-ARMV6-NEXT: bx lr
4850
4951 ; CHECK-THUMBV6-LABEL: test_cmpxchg_res_i8:
5052 ; CHECK-THUMBV6: mov [[EXPECTED:r[0-9]+]], r1
6163 ; CHECK-ARMV7-LABEL: test_cmpxchg_res_i8:
6264 ; CHECK-ARMV7-NEXT: .fnstart
6365 ; CHECK-ARMV7-NEXT: uxtb [[DESIRED:r[0-9]+]], r1
64 ; CHECK-ARMV7-NEXT: b [[TRY:.LBB[0-9_]+]]
65 ; CHECK-ARMV7-NEXT: [[HEAD:.LBB[0-9_]+]]:
66 ; CHECK-ARMV7-NEXT: strexb [[SUCCESS:r[0-9]+]], r2, [r0]
67 ; CHECK-ARMV7-NEXT: cmp [[SUCCESS]], #0
68 ; CHECK-ARMV7-NEXT: moveq [[RES:r[0-9]+]], #1
69 ; CHECK-ARMV7-NEXT: bxeq lr
70 ; CHECK-ARMV7-NEXT: [[TRY]]:
66 ; CHECK-ARMV7-NEXT: [[TRY:.LBB[0-9_]+]]:
7167 ; CHECK-ARMV7-NEXT: ldrexb [[LD:r[0-9]+]], [r0]
7268 ; CHECK-ARMV7-NEXT: cmp [[LD]], [[DESIRED]]
73 ; CHECK-ARMV7-NEXT: beq [[HEAD]]
69 ; CHECK-ARMV7-NEXT: bne [[FAIL:.LBB[0-9_]+]]
70 ; CHECK-ARMV7-NEXT: strexb [[SUCCESS:r[0-9]+]], r2, [r0]
71 ; CHECK-ARMV7-NEXT: mov [[RES:r[0-9]+]], #1
72 ; CHECK-ARMV7-NEXT: cmp [[SUCCESS]], #0
73 ; CHECK-ARMV7-NEXT: bne [[TRY]]
74 ; CHECK-ARMV7-NEXT: b [[END:.LBB[0-9_]+]]
75 ; CHECK-ARMV7-NEXT: [[FAIL]]:
7476 ; CHECK-ARMV7-NEXT: clrex
7577 ; CHECK-ARMV7-NEXT: mov [[RES]], #0
78 ; CHECK-ARMV7-NEXT: [[END]]:
79 ; CHECK-ARMV7-NEXT: mov r0, [[RES]]
7680 ; CHECK-ARMV7-NEXT: bx lr
7781
7882 ; CHECK-THUMBV7-LABEL: test_cmpxchg_res_i8:
1111 br i1 %0, label %bb2, label %bb
1212
1313 bb:
14 ; CHECK: LBB0_[[LABEL:[0-9]]]:
15 ; CHECK: bne LBB0_[[LABEL]]
16 ; CHECK-NOT: b LBB0_[[LABEL]]
14 ; CHECK: LBB0_2:
15 ; CHECK: bne LBB0_2
16 ; CHECK-NOT: b LBB0_2
1717 ; CHECK: bx lr
1818 %list_addr.05 = phi %struct.list_head* [ %2, %bb ], [ %list, %entry ]
1919 %next.04 = phi %struct.list_head* [ %list_addr.05, %bb ], [ null, %entry ]
3333 define i32 @t2(i32 %passes, i32* nocapture %src, i32 %size) nounwind readonly {
3434 entry:
3535 ; CHECK-LABEL: t2:
36 ; CHECK: beq LBB1_[[RET:.]]
3637 %0 = icmp eq i32 %passes, 0 ; [#uses=1]
3738 br i1 %0, label %bb5, label %bb.nph15
3839
40 ; CHECK: LBB1_[[PREHDR:.]]: @ %bb2.preheader
3941 bb1: ; preds = %bb2.preheader, %bb1
40 ; CHECK: LBB1_[[BB3:.]]: @ %bb3
41 ; CHECK: LBB1_[[PREHDR:.]]: @ %bb2.preheader
42 ; CHECK: blt LBB1_[[BB3]]
42 ; CHECK: LBB1_[[BB1:.]]: @ %bb1
43 ; CHECK: bne LBB1_[[BB1]]
4344 %indvar = phi i32 [ %indvar.next, %bb1 ], [ 0, %bb2.preheader ] ; [#uses=2]
4445 %sum.08 = phi i32 [ %2, %bb1 ], [ %sum.110, %bb2.preheader ] ; [#uses=1]
4546 %tmp17 = sub i32 %i.07, %indvar ; [#uses=1]
5152 br i1 %exitcond, label %bb3, label %bb1
5253
5354 bb3: ; preds = %bb1, %bb2.preheader
54 ; CHECK: LBB1_[[BB1:.]]: @ %bb1
55 ; CHECK: bne LBB1_[[BB1]]
56 ; CHECK: b LBB1_[[BB3]]
55 ; CHECK: LBB1_[[BB3:.]]: @ %bb3
56 ; CHECK: bne LBB1_[[PREHDR]]
57 ; CHECK-NOT: b LBB1_
5758 %sum.0.lcssa = phi i32 [ %sum.110, %bb2.preheader ], [ %2, %bb1 ] ; [#uses=2]
5859 %3 = add i32 %pass.011, 1 ; [#uses=2]
5960 %exitcond18 = icmp eq i32 %3, %passes ; [#uses=1]
6970 %sum.110 = phi i32 [ 0, %bb.nph15 ], [ %sum.0.lcssa, %bb3 ] ; [#uses=2]
7071 br i1 %4, label %bb1, label %bb3
7172
73 ; CHECK: LBB1_[[RET]]: @ %bb5
74 ; CHECK: pop
7275 bb5: ; preds = %bb3, %entry
7376 %sum.1.lcssa = phi i32 [ 0, %entry ], [ %sum.0.lcssa, %bb3 ] ; [#uses=1]
7477 ret i32 %sum.1.lcssa
477477 ; CHECK-LABEL: fpcmp_unanalyzable_branch:
478478 ; CHECK: # BB#0: # %entry
479479 ; CHECK: # BB#1: # %entry.if.then_crit_edge
480 ; CHECK: .LBB10_5: # %if.then
481 ; CHECK: .LBB10_6: # %if.end
480 ; CHECK: .LBB10_4: # %if.then
481 ; CHECK: .LBB10_5: # %if.end
482482 ; CHECK: # BB#3: # %exit
483483 ; CHECK: jne .LBB10_4
484 ; CHECK-NEXT: jnp .LBB10_6
485 ; CHECK: jmp .LBB10_5
484 ; CHECK-NEXT: jnp .LBB10_5
485 ; CHECK-NEXT: jmp .LBB10_4
486486
487487 entry:
488488 ; Note that this branch must be strongly biased toward
278278 define i8 @ctlz_i8_zero_test(i8 %n) {
279279 ; X32-LABEL: ctlz_i8_zero_test:
280280 ; X32: # BB#0:
281 ; X32-NEXT: movb {{[0-9]+}}(%esp), %al
282 ; X32-NEXT: testb %al, %al
283 ; X32-NEXT: je .LBB8_1
284 ; X32-NEXT: # BB#2: # %cond.false
285 ; X32-NEXT: movzbl %al, %eax
281 ; X32-NEXT: movb {{[0-9]+}}(%esp), %cl
282 ; X32-NEXT: movb $8, %al
283 ; X32-NEXT: testb %cl, %cl
284 ; X32-NEXT: je .LBB8_2
285 ; X32-NEXT: # BB#1: # %cond.false
286 ; X32-NEXT: movzbl %cl, %eax
286287 ; X32-NEXT: bsrl %eax, %eax
287288 ; X32-NEXT: xorl $7, %eax
289 ; X32-NEXT: .LBB8_2: # %cond.end
288290 ; X32-NEXT: # kill: %AL %AL %EAX
289291 ; X32-NEXT: retl
290 ; X32-NEXT: .LBB8_1:
291 ; X32-NEXT: movb $8, %al
292 ; X32-NEXT: # kill: %AL %AL %EAX
293 ; X32-NEXT: retl
294292 ;
295293 ; X64-LABEL: ctlz_i8_zero_test:
296294 ; X64: # BB#0:
295 ; X64-NEXT: movb $8, %al
297296 ; X64-NEXT: testb %dil, %dil
298 ; X64-NEXT: je .LBB8_1
299 ; X64-NEXT: # BB#2: # %cond.false
297 ; X64-NEXT: je .LBB8_2
298 ; X64-NEXT: # BB#1: # %cond.false
300299 ; X64-NEXT: movzbl %dil, %eax
301300 ; X64-NEXT: bsrl %eax, %eax
302301 ; X64-NEXT: xorl $7, %eax
303 ; X64-NEXT: # kill: %AL %AL %EAX
304 ; X64-NEXT: retq
305 ; X64-NEXT: .LBB8_1:
306 ; X64-NEXT: movb $8, %al
302 ; X64-NEXT: .LBB8_2: # %cond.end
307303 ; X64-NEXT: # kill: %AL %AL %EAX
308304 ; X64-NEXT: retq
309305 ;
330326 define i16 @ctlz_i16_zero_test(i16 %n) {
331327 ; X32-LABEL: ctlz_i16_zero_test:
332328 ; X32: # BB#0:
333 ; X32-NEXT: movzwl {{[0-9]+}}(%esp), %eax
334 ; X32-NEXT: testw %ax, %ax
335 ; X32-NEXT: je .LBB9_1
336 ; X32-NEXT: # BB#2: # %cond.false
337 ; X32-NEXT: bsrw %ax, %ax
329 ; X32-NEXT: movzwl {{[0-9]+}}(%esp), %ecx
330 ; X32-NEXT: movw $16, %ax
331 ; X32-NEXT: testw %cx, %cx
332 ; X32-NEXT: je .LBB9_2
333 ; X32-NEXT: # BB#1: # %cond.false
334 ; X32-NEXT: bsrw %cx, %ax
338335 ; X32-NEXT: xorl $15, %eax
336 ; X32-NEXT: .LBB9_2: # %cond.end
339337 ; X32-NEXT: # kill: %AX %AX %EAX
340338 ; X32-NEXT: retl
341 ; X32-NEXT: .LBB9_1:
342 ; X32-NEXT: movw $16, %ax
343 ; X32-NEXT: # kill: %AX %AX %EAX
344 ; X32-NEXT: retl
345339 ;
346340 ; X64-LABEL: ctlz_i16_zero_test:
347341 ; X64: # BB#0:
342 ; X64-NEXT: movw $16, %ax
348343 ; X64-NEXT: testw %di, %di
349 ; X64-NEXT: je .LBB9_1
350 ; X64-NEXT: # BB#2: # %cond.false
344 ; X64-NEXT: je .LBB9_2
345 ; X64-NEXT: # BB#1: # %cond.false
351346 ; X64-NEXT: bsrw %di, %ax
352347 ; X64-NEXT: xorl $15, %eax
353 ; X64-NEXT: # kill: %AX %AX %EAX
354 ; X64-NEXT: retq
355 ; X64-NEXT: .LBB9_1:
356 ; X64-NEXT: movw $16, %ax
348 ; X64-NEXT: .LBB9_2: # %cond.end
357349 ; X64-NEXT: # kill: %AX %AX %EAX
358350 ; X64-NEXT: retq
359351 ;
374366 define i32 @ctlz_i32_zero_test(i32 %n) {
375367 ; X32-LABEL: ctlz_i32_zero_test:
376368 ; X32: # BB#0:
377 ; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
378 ; X32-NEXT: testl %eax, %eax
379 ; X32-NEXT: je .LBB10_1
380 ; X32-NEXT: # BB#2: # %cond.false
381 ; X32-NEXT: bsrl %eax, %eax
382 ; X32-NEXT: xorl $31, %eax
383 ; X32-NEXT: retl
384 ; X32-NEXT: .LBB10_1:
385 ; X32-NEXT: movl $32, %eax
369 ; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
370 ; X32-NEXT: movl $32, %eax
371 ; X32-NEXT: testl %ecx, %ecx
372 ; X32-NEXT: je .LBB10_2
373 ; X32-NEXT: # BB#1: # %cond.false
374 ; X32-NEXT: bsrl %ecx, %eax
375 ; X32-NEXT: xorl $31, %eax
376 ; X32-NEXT: .LBB10_2: # %cond.end
386377 ; X32-NEXT: retl
387378 ;
388379 ; X64-LABEL: ctlz_i32_zero_test:
389380 ; X64: # BB#0:
381 ; X64-NEXT: movl $32, %eax
390382 ; X64-NEXT: testl %edi, %edi
391 ; X64-NEXT: je .LBB10_1
392 ; X64-NEXT: # BB#2: # %cond.false
383 ; X64-NEXT: je .LBB10_2
384 ; X64-NEXT: # BB#1: # %cond.false
393385 ; X64-NEXT: bsrl %edi, %eax
394386 ; X64-NEXT: xorl $31, %eax
395 ; X64-NEXT: retq
396 ; X64-NEXT: .LBB10_1:
397 ; X64-NEXT: movl $32, %eax
387 ; X64-NEXT: .LBB10_2: # %cond.end
398388 ; X64-NEXT: retq
399389 ;
400390 ; X32-CLZ-LABEL: ctlz_i32_zero_test:
473463 define i8 @cttz_i8_zero_test(i8 %n) {
474464 ; X32-LABEL: cttz_i8_zero_test:
475465 ; X32: # BB#0:
476 ; X32-NEXT: movb {{[0-9]+}}(%esp), %al
477 ; X32-NEXT: testb %al, %al
478 ; X32-NEXT: je .LBB12_1
479 ; X32-NEXT: # BB#2: # %cond.false
480 ; X32-NEXT: movzbl %al, %eax
466 ; X32-NEXT: movb {{[0-9]+}}(%esp), %cl
467 ; X32-NEXT: movb $8, %al
468 ; X32-NEXT: testb %cl, %cl
469 ; X32-NEXT: je .LBB12_2
470 ; X32-NEXT: # BB#1: # %cond.false
471 ; X32-NEXT: movzbl %cl, %eax
481472 ; X32-NEXT: bsfl %eax, %eax
473 ; X32-NEXT: .LBB12_2: # %cond.end
482474 ; X32-NEXT: # kill: %AL %AL %EAX
483475 ; X32-NEXT: retl
484 ; X32-NEXT: .LBB12_1
485 ; X32-NEXT: movb $8, %al
486 ; X32-NEXT: # kill: %AL %AL %EAX
487 ; X32-NEXT: retl
488476 ;
489477 ; X64-LABEL: cttz_i8_zero_test:
490478 ; X64: # BB#0:
479 ; X64-NEXT: movb $8, %al
491480 ; X64-NEXT: testb %dil, %dil
492 ; X64-NEXT: je .LBB12_1
493 ; X64-NEXT: # BB#2: # %cond.false
481 ; X64-NEXT: je .LBB12_2
482 ; X64-NEXT: # BB#1: # %cond.false
494483 ; X64-NEXT: movzbl %dil, %eax
495484 ; X64-NEXT: bsfl %eax, %eax
496 ; X64-NEXT: # kill: %AL %AL %EAX
497 ; X64-NEXT: retq
498 ; X64-NEXT: .LBB12_1:
499 ; X64-NEXT: movb $8, %al
485 ; X64-NEXT: .LBB12_2: # %cond.end
500486 ; X64-NEXT: # kill: %AL %AL %EAX
501487 ; X64-NEXT: retq
502488 ;
523509 define i16 @cttz_i16_zero_test(i16 %n) {
524510 ; X32-LABEL: cttz_i16_zero_test:
525511 ; X32: # BB#0:
526 ; X32-NEXT: movzwl {{[0-9]+}}(%esp), %eax
527 ; X32-NEXT: testw %ax, %ax
528 ; X32-NEXT: je .LBB13_1
529 ; X32-NEXT: # BB#2: # %cond.false
530 ; X32-NEXT: bsfw %ax, %ax
531 ; X32-NEXT: retl
532 ; X32-NEXT: .LBB13_1
512 ; X32-NEXT: movzwl {{[0-9]+}}(%esp), %ecx
533513 ; X32-NEXT: movw $16, %ax
514 ; X32-NEXT: testw %cx, %cx
515 ; X32-NEXT: je .LBB13_2
516 ; X32-NEXT: # BB#1: # %cond.false
517 ; X32-NEXT: bsfw %cx, %ax
518 ; X32-NEXT: .LBB13_2: # %cond.end
534519 ; X32-NEXT: retl
535520 ;
536521 ; X64-LABEL: cttz_i16_zero_test:
537522 ; X64: # BB#0:
523 ; X64-NEXT: movw $16, %ax
538524 ; X64-NEXT: testw %di, %di
539 ; X64-NEXT: je .LBB13_1
540 ; X64-NEXT: # BB#2: # %cond.false
525 ; X64-NEXT: je .LBB13_2
526 ; X64-NEXT: # BB#1: # %cond.false
541527 ; X64-NEXT: bsfw %di, %ax
542 ; X64-NEXT: retq
543 ; X64-NEXT: .LBB13_1:
544 ; X64-NEXT: movw $16, %ax
528 ; X64-NEXT: .LBB13_2: # %cond.end
545529 ; X64-NEXT: retq
546530 ;
547531 ; X32-CLZ-LABEL: cttz_i16_zero_test:
561545 define i32 @cttz_i32_zero_test(i32 %n) {
562546 ; X32-LABEL: cttz_i32_zero_test:
563547 ; X32: # BB#0:
564 ; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
565 ; X32-NEXT: testl %eax, %eax
566 ; X32-NEXT: je .LBB14_1
567 ; X32-NEXT: # BB#2: # %cond.false
568 ; X32-NEXT: bsfl %eax, %eax
569 ; X32-NEXT: retl
570 ; X32-NEXT: .LBB14_1
548 ; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
571549 ; X32-NEXT: movl $32, %eax
550 ; X32-NEXT: testl %ecx, %ecx
551 ; X32-NEXT: je .LBB14_2
552 ; X32-NEXT: # BB#1: # %cond.false
553 ; X32-NEXT: bsfl %ecx, %eax
554 ; X32-NEXT: .LBB14_2: # %cond.end
572555 ; X32-NEXT: retl
573556 ;
574557 ; X64-LABEL: cttz_i32_zero_test:
575558 ; X64: # BB#0:
559 ; X64-NEXT: movl $32, %eax
576560 ; X64-NEXT: testl %edi, %edi
577 ; X64-NEXT: je .LBB14_1
578 ; X64-NEXT: # BB#2: # %cond.false
561 ; X64-NEXT: je .LBB14_2
562 ; X64-NEXT: # BB#1: # %cond.false
579563 ; X64-NEXT: bsfl %edi, %eax
580 ; X64-NEXT: retq
581 ; X64-NEXT: .LBB14_1:
582 ; X64-NEXT: movl $32, %eax
564 ; X64-NEXT: .LBB14_2: # %cond.end
583565 ; X64-NEXT: retq
584566 ;
585567 ; X32-CLZ-LABEL: cttz_i32_zero_test:
659641 define i32 @ctlz_i32_fold_cmov(i32 %n) {
660642 ; X32-LABEL: ctlz_i32_fold_cmov:
661643 ; X32: # BB#0:
662 ; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
663 ; X32-NEXT: orl $1, %eax
664 ; X32-NEXT: je .LBB16_1
665 ; X32-NEXT: # BB#2: # %cond.false
666 ; X32-NEXT: bsrl %eax, %eax
667 ; X32-NEXT: xorl $31, %eax
668 ; X32-NEXT: retl
669 ; X32-NEXT: .LBB16_1
644 ; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
645 ; X32-NEXT: orl $1, %ecx
670646 ; X32-NEXT: movl $32, %eax
647 ; X32-NEXT: je .LBB16_2
648 ; X32-NEXT: # BB#1: # %cond.false
649 ; X32-NEXT: bsrl %ecx, %eax
650 ; X32-NEXT: xorl $31, %eax
651 ; X32-NEXT: .LBB16_2: # %cond.end
671652 ; X32-NEXT: retl
672653 ;
673654 ; X64-LABEL: ctlz_i32_fold_cmov:
674655 ; X64: # BB#0:
675656 ; X64-NEXT: orl $1, %edi
676 ; X64-NEXT: je .LBB16_1
677 ; X64-NEXT: # BB#2: # %cond.false
657 ; X64-NEXT: movl $32, %eax
658 ; X64-NEXT: je .LBB16_2
659 ; X64-NEXT: # BB#1: # %cond.false
678660 ; X64-NEXT: bsrl %edi, %eax
679661 ; X64-NEXT: xorl $31, %eax
680 ; X64-NEXT: retq
681 ; X64-NEXT: .LBB16_1:
682 ; X64-NEXT: movl $32, %eax
662 ; X64-NEXT: .LBB16_2: # %cond.end
683663 ; X64-NEXT: retq
684664 ;
685665 ; X32-CLZ-LABEL: ctlz_i32_fold_cmov:
735715 define i32 @ctlz_bsr_zero_test(i32 %n) {
736716 ; X32-LABEL: ctlz_bsr_zero_test:
737717 ; X32: # BB#0:
738 ; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
739 ; X32-NEXT: testl %eax, %eax
740 ; X32-NEXT: je .LBB18_1
741 ; X32-NEXT: # BB#2: # %cond.false
742 ; X32-NEXT: bsrl %eax, %eax
743 ; X32-NEXT: xorl $31, %eax
744 ; X32-NEXT: xorl $31, %eax
745 ; X32-NEXT: retl
746 ; X32-NEXT: .LBB18_1:
718 ; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
747719 ; X32-NEXT: movl $32, %eax
720 ; X32-NEXT: testl %ecx, %ecx
721 ; X32-NEXT: je .LBB18_2
722 ; X32-NEXT: # BB#1: # %cond.false
723 ; X32-NEXT: bsrl %ecx, %eax
724 ; X32-NEXT: xorl $31, %eax
725 ; X32-NEXT: .LBB18_2: # %cond.end
748726 ; X32-NEXT: xorl $31, %eax
749727 ; X32-NEXT: retl
750728 ;
751729 ; X64-LABEL: ctlz_bsr_zero_test:
752730 ; X64: # BB#0:
731 ; X64-NEXT: movl $32, %eax
753732 ; X64-NEXT: testl %edi, %edi
754 ; X64-NEXT: je .LBB18_1
755 ; X64-NEXT: # BB#2: # %cond.false
733 ; X64-NEXT: je .LBB18_2
734 ; X64-NEXT: # BB#1: # %cond.false
756735 ; X64-NEXT: bsrl %edi, %eax
757736 ; X64-NEXT: xorl $31, %eax
758 ; X64-NEXT: xorl $31, %eax
759 ; X64-NEXT: retq
760 ; X64-NEXT: .LBB18_1:
761 ; X64-NEXT: movl $32, %eax
737 ; X64-NEXT: .LBB18_2: # %cond.end
762738 ; X64-NEXT: xorl $31, %eax
763739 ; X64-NEXT: retq
764740 ;
99 ; CHECK-NEXT: testl %edx, %edx
1010 ; CHECK-NEXT: jle LBB0_1
1111 ; CHECK-NEXT: ## BB#4: ## %for.body.preheader
12 ; CHECK-NEXT: movslq %edx, %rax
13 ; CHECK-NEXT: xorl %ecx, %ecx
12 ; CHECK-NEXT: movslq %edx, %rcx
13 ; CHECK-NEXT: xorl %edx, %edx
1414 ; CHECK-NEXT: .p2align 4, 0x90
1515 ; CHECK-NEXT: LBB0_5: ## %for.body
1616 ; CHECK-NEXT: ## =>This Inner Loop Header: Depth=1
17 ; CHECK-NEXT: cmpl %edi, (%rsi,%rcx,4)
17 ; ### FIXME: This loop invariant should be hoisted
18 ; CHECK-NEXT: movb $1, %al
19 ; CHECK-NEXT: cmpl %edi, (%rsi,%rdx,4)
1820 ; CHECK-NEXT: je LBB0_6
1921 ; CHECK-NEXT: ## BB#2: ## %for.cond
2022 ; CHECK-NEXT: ## in Loop: Header=BB0_5 Depth=1
21 ; CHECK-NEXT: incq %rcx
22 ; CHECK-NEXT: cmpq %rax, %rcx
23 ; CHECK-NEXT: incq %rdx
24 ; CHECK-NEXT: cmpq %rcx, %rdx
2325 ; CHECK-NEXT: jl LBB0_5
2426 ; ### FIXME: BB#3 and LBB0_1 should be merged
2527 ; CHECK-NEXT: ## BB#3:
3032 ; CHECK-NEXT: xorl %eax, %eax
3133 ; CHECK-NEXT: ## kill: %AL %AL %EAX
3234 ; CHECK-NEXT: retq
33 ; CHECK-NEXT: LBB0_6:
34 ; CHECK-NEXT: movb $1, %al
35 ; CHECK-NEXT: LBB0_6: ## %cleanup
3536 ; CHECK-NEXT: ## kill: %AL %AL %EAX
3637 ; CHECK-NEXT: retq
3738 ;
None ; RUN: llc < %s -mtriple=x86_64-pc-linux | FileCheck %s
1
2 ; Checks if movl $1 is sinked to critical edge.
3 ; CHECK-NOT: movl $1
4 ; CHECK: jbe
5 ; CHECK: movl $1
6 define i32 @test(i32 %n, i32 %k) nounwind {
7 entry:
8 %cmp = icmp ugt i32 %k, %n
9 br i1 %cmp, label %ifthen, label %ifend, !prof !1
10
11 ifthen:
12 %y = add i32 %k, 2
13 br label %ifend
14
15 ifend:
16 %ret = phi i32 [ 1, %entry ] , [ %y, %ifthen]
17 ret i32 %ret
18 }
19
20 !1 = !{!"branch_weights", i32 100, i32 1}
1313 ifthen: ; preds = %entry
1414 ret i32 0
1515 ; CHECK: forbody{{$}}
16 ; There should be no mov instruction in the for body.
1716 ; CHECK-NOT: mov
18 ; CHECK: jbe
1917 forbody: ; preds = %forbody, %forcond.preheader
2018 %indvar = phi i32 [ 0, %forcond.preheader ], [ %divisor.02, %forbody ] ; [#uses=3]
2119 %accumulator.01 = phi i32 [ 1, %forcond.preheader ], [ %div, %forbody ] ; [#uses=1]
1313 br i1 %cmp44, label %afterfor, label %forbody
1414
1515 ; CHECK: %forcond.preheader
16 ; CHECK: testl
16 ; CHECK: movl $1
1717 ; CHECK-NOT: xorl
1818 ; CHECK-NOT: movl
1919 ; CHECK-NOT: LBB
2323 ; CHECK: %forbody{{$}}
2424 ; CHECK-NOT: mov
2525 ; CHECK: jbe
26 ; CHECK: movl $1
2726
2827 ifthen: ; preds = %entry
2928 ret i32 0
3636 ; ASM-LABEL: loop_csr: # @loop_csr
3737 ; ASM: #DEBUG_VALUE: loop_csr:o [bit_piece offset=0 size=32] <- 0
3838 ; ASM: #DEBUG_VALUE: loop_csr:o [bit_piece offset=32 size=32] <- 0
39 ; ASM: # BB#2: # %for.body.preheader
39 ; ASM: # BB#1: # %for.body.preheader
4040 ; ASM: xorl %edi, %edi
4141 ; ASM: xorl %esi, %esi
4242 ; ASM: .p2align 4, 0x90
43 ; ASM: .LBB0_3: # %for.body
43 ; ASM: .LBB0_2: # %for.body
4444 ; ASM: [[ox_start:\.Ltmp[0-9]+]]:
4545 ; ASM: #DEBUG_VALUE: loop_csr:o [bit_piece offset=0 size=32] <- %EDI
4646 ; ASM: .cv_loc 0 1 13 11 # t.c:13:11
5656 ; ASM: movl %eax, %esi
5757 ; ASM: #DEBUG_VALUE: loop_csr:o [bit_piece offset=32 size=32] <- %ESI
5858 ; ASM: cmpl n(%rip), %eax
59 ; ASM: jl .LBB0_3
59 ; ASM: jl .LBB0_2
6060 ; ASM: [[oy_end:\.Ltmp[0-9]+]]:
6161 ; ASM: addl %edi, %esi
6262 ; ASM: movl %esi, %eax