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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=i686-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X86
; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X64

define void @PR34855(<2 x i32> *%p0, <2 x i32> *%p1, <2 x i32> *%p2) {
; X86-LABEL: PR34855:
; X86:       # BB#0:
; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax
; X86-NEXT:    movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT:    movsd {{.*#+}} xmm0 = mem[0],zero
; X86-NEXT:    movlps %xmm0, (%eax)
; X86-NEXT:    retl
;
; X64-LABEL: PR34855:
; X64:       # BB#0:
; X64-NEXT:    movslq 4(%rdi), %rax
; X64-NEXT:    movq %rax, %xmm0
; X64-NEXT:    movslq (%rdi), %rax
; X64-NEXT:    movq %rax, %xmm1
; X64-NEXT:    punpcklqdq {{.*#+}} xmm1 = xmm1[0],xmm0[0]
; X64-NEXT:    pshufd {{.*#+}} xmm0 = xmm1[0,2,2,3]
; X64-NEXT:    movq %xmm0, (%rdx)
; X64-NEXT:    retq
  %tmp = load <2 x i32>, <2 x i32>* %p0, align 8
  %tmp1 = load <2 x i32>, <2 x i32>* %p1, align 8
  %mul = mul <2 x i32> zeroinitializer, %tmp1
  %mul1 = mul <2 x i32> <i32 -8190, i32 -8190>, %mul
  %mul2 = mul <2 x i32> <i32 3, i32 3>, %mul1
  %shr = ashr <2 x i32> %tmp, %mul2
  store <2 x i32> %shr, <2 x i32>* %p2, align 8
  ret void
}